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initial commit of work in progress code 

The V003 sub MCU code is mostly initially written, though needs to be tested and fixed.
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true 2024-10-12 21:59:33 -07:00
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/nametag8_CH592/build_softi2c
/nametag8_V003/obj

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ENTRY( _start )
__stack_size = 512;
PROVIDE( _stack_size = __stack_size );
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 448K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 24K
RAM2K (xrw) : ORIGIN = 0x20006000, LENGTH = 2K
}
SECTIONS
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/* .vector :
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*(.vector);
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/********************************** (C) COPYRIGHT *******************************
* File Name : core_riscv.c
* Author : WCH
* Version : V1.1.0
* Date : 2021/06/06
* Description : RISC-V Core Peripheral Access Layer Source File
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <stdint.h>
/* define compiler specific symbols */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/*********************************************************************
* @fn __get_MSTATUS
*
* @brief Return the Machine Status Register
*
* @return mstatus value
*/
uint32_t __get_MSTATUS(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mstatus" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MSTATUS
*
* @brief Set the Machine Status Register
*
* @param value - set mstatus value
*
* @return none
*/
void __set_MSTATUS(uint32_t value)
{
__ASM volatile ("csrw mstatus, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MISA
*
* @brief Return the Machine ISA Register
*
* @return misa value
*/
uint32_t __get_MISA(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "misa" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MISA
*
* @brief Set the Machine ISA Register
*
* @param value - set misa value
*
* @return none
*/
void __set_MISA(uint32_t value)
{
__ASM volatile ("csrw misa, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MTVEC
*
* @brief Return the Machine Trap-Vector Base-Address Register
*
* @return mtvec value
*/
uint32_t __get_MTVEC(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mtvec" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MTVEC
*
* @brief Set the Machine Trap-Vector Base-Address Register
*
* @param value - set mtvec value
*
* @return none
*/
void __set_MTVEC(uint32_t value)
{
__ASM volatile ("csrw mtvec, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MSCRATCH
*
* @brief Return the Machine Seratch Register
*
* @return mscratch value
*/
uint32_t __get_MSCRATCH(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mscratch" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MSCRATCH
*
* @brief Set the Machine Seratch Register
*
* @param value - set mscratch value
*
* @return none
*/
void __set_MSCRATCH(uint32_t value)
{
__ASM volatile ("csrw mscratch, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MEPC
*
* @brief Return the Machine Exception Program Register
*
* @return mepc value
*/
uint32_t __get_MEPC(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mepc" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MEPC
*
* @brief Set the Machine Exception Program Register
*
* @return mepc value
*/
void __set_MEPC(uint32_t value)
{
__ASM volatile ("csrw mepc, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MCAUSE
*
* @brief Return the Machine Cause Register
*
* @return mcause value
*/
uint32_t __get_MCAUSE(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mcause" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MEPC
*
* @brief Set the Machine Cause Register
*
* @return mcause value
*/
void __set_MCAUSE(uint32_t value)
{
__ASM volatile ("csrw mcause, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MTVAL
*
* @brief Return the Machine Trap Value Register
*
* @return mtval value
*/
uint32_t __get_MTVAL(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mtval" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __set_MTVAL
*
* @brief Set the Machine Trap Value Register
*
* @return mtval value
*/
void __set_MTVAL(uint32_t value)
{
__ASM volatile ("csrw mtval, %0" : : "r" (value) );
}
/*********************************************************************
* @fn __get_MVENDORID
*
* @brief Return Vendor ID Register
*
* @return mvendorid value
*/
uint32_t __get_MVENDORID(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mvendorid" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __get_MARCHID
*
* @brief Return Machine Architecture ID Register
*
* @return marchid value
*/
uint32_t __get_MARCHID(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "marchid" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __get_MIMPID
*
* @brief Return Machine Implementation ID Register
*
* @return mimpid value
*/
uint32_t __get_MIMPID(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mimpid" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __get_MHARTID
*
* @brief Return Hart ID Register
*
* @return mhartid value
*/
uint32_t __get_MHARTID(void)
{
uint32_t result;
__ASM volatile ( "csrr %0," "mhartid" : "=r" (result) );
return (result);
}
/*********************************************************************
* @fn __get_SP
*
* @brief Return SP Register
*
* @return SP value
*/
uint32_t __get_SP(void)
{
uint32_t result;
__ASM volatile ( "mv %0," "sp" : "=r"(result) : );
return (result);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : core_riscv.h
* Author : WCH
* Version : V1.1.0
* Date : 2023/04/10
* Description : CH592 RISC-V Core Peripheral Access Layer Header File
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CORE_RV3A_H__
#define __CORE_RV3A_H__
#ifdef __cplusplus
extern "C" {
#endif
/* IO definitions */
#ifdef __cplusplus
#define __I volatile /*!< defines 'read only' permissions */
#else
#define __I volatile const /*!< defines 'read only' permissions */
#endif
#define __O volatile /*!< defines 'write only' permissions */
#define __IO volatile /*!< defines 'read / write' permissions */
#define RV_STATIC_INLINE static inline
//typedef enum {SUCCESS = 0, ERROR = !SUCCESS} ErrorStatus;
typedef enum
{
DISABLE = 0,
ENABLE = !DISABLE
} FunctionalState;
typedef enum
{
RESET = 0,
SET = !RESET
} FlagStatus, ITStatus;
/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */
typedef struct
{
__I uint32_t ISR[8]; // 0
__I uint32_t IPR[8]; // 20H
__IO uint32_t ITHRESDR; // 40H
uint8_t RESERVED[4]; // 44H
__O uint32_t CFGR; // 48H
__I uint32_t GISR; // 4CH
__IO uint8_t VTFIDR[4]; // 50H
uint8_t RESERVED0[0x0C]; // 54H
__IO uint32_t VTFADDR[4]; // 60H
uint8_t RESERVED1[0x90]; // 70H
__O uint32_t IENR[8]; // 100H
uint8_t RESERVED2[0x60]; // 120H
__O uint32_t IRER[8]; // 180H
uint8_t RESERVED3[0x60]; // 1A0H
__O uint32_t IPSR[8]; // 200H
uint8_t RESERVED4[0x60]; // 220H
__O uint32_t IPRR[8]; // 280H
uint8_t RESERVED5[0x60]; // 2A0H
__IO uint32_t IACTR[8]; // 300H
uint8_t RESERVED6[0xE0]; // 320H
__IO uint8_t IPRIOR[256]; // 400H
uint8_t RESERVED7[0x810]; // 500H
__IO uint32_t SCTLR; // D10H
} PFIC_Type;
/* memory mapped structure for SysTick */
typedef struct
{
__IO uint32_t CTLR;
__IO uint32_t SR;
__IO uint64_t CNT;
__IO uint64_t CMP;
} SysTick_Type;
#define PFIC ((PFIC_Type *)0xE000E000)
#define SysTick ((SysTick_Type *)0xE000F000)
#define PFIC_KEY1 ((uint32_t)0xFA050000)
#define PFIC_KEY2 ((uint32_t)0xBCAF0000)
#define PFIC_KEY3 ((uint32_t)0xBEEF0000)
/* ########################## define #################################### */
#define __nop() __asm__ volatile("nop")
#define read_csr(reg) ({unsigned long __tmp; \
__asm__ volatile ("csrr %0, " #reg : "=r"(__tmp)); \
__tmp; })
#define write_csr(reg, val) ({ \
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
__asm__ volatile ("csrw " #reg ", %0" :: "i"(val)); \
else \
__asm__ volatile ("csrw " #reg ", %0" :: "r"(val)); })
#define PFIC_EnableAllIRQ() {write_csr(0x800, 0x88);__nop();__nop();}
#define PFIC_DisableAllIRQ() {write_csr(0x800, 0x80);__nop();__nop();}
/* ########################## PFIC functions #################################### */
/*********************************************************************
* @fn __risc_v_enable_irq
*
* @brief recover Global Interrupt
*
* @return mpie and mie bit in mstatus.
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __risc_v_enable_irq(uint32_t mpie_mie)
{
uint32_t result;
__asm volatile ("csrrs %0, 0x800, %1" : \
"=r"(result): "r"(mpie_mie) : "memory");
return result;
}
/*********************************************************************
* @fn __disable_irq
*
* @brief Disable Global Interrupt
*
* @return mpie and mie bit in mstatus.
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __risc_v_disable_irq(void)
{
uint32_t result;
__asm volatile ("csrrc %0, 0x800, %1" : \
"=r"(result): "r"(0x88) : "memory");
return result & 0x88;
}
/*******************************************************************************
* @fn PFIC_EnableIRQ
*
* @brief Enable Interrupt
*
* @param IRQn - Interrupt Numbers
*/
__attribute__((always_inline)) RV_STATIC_INLINE void PFIC_EnableIRQ(IRQn_Type IRQn)
{
PFIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn)&0x1F));
}
/*******************************************************************************
* @fn PFIC_DisableIRQ
*
* @brief Disable Interrupt
*
* @param IRQn - Interrupt Numbers
*/
__attribute__((always_inline)) RV_STATIC_INLINE void PFIC_DisableIRQ(IRQn_Type IRQn)
{
PFIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn)&0x1F));
__nop();
__nop();
}
/*******************************************************************************
* @fn PFIC_GetStatusIRQ
*
* @brief Get Interrupt Enable State
*
* @param IRQn - Interrupt Numbers
*
* @return 1: Interrupt Enable
* 0: Interrupt Disable
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t PFIC_GetStatusIRQ(IRQn_Type IRQn)
{
return ((uint32_t)((PFIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn)&0x1F))) ? 1 : 0));
}
/*******************************************************************************
* @fn PFIC_GetPendingIRQ
*
* @brief Get Interrupt Pending State
*
* @param IRQn - Interrupt Numbers
*
* @return 1: Interrupt Pending Enable
* 0: Interrupt Pending Disable
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t PFIC_GetPendingIRQ(IRQn_Type IRQn)
{
return ((uint32_t)((PFIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn)&0x1F))) ? 1 : 0));
}
/*******************************************************************************
* @fn PFIC_SetPendingIRQ
*
* @brief Set Interrupt Pending
*
* @param IRQn - Interrupt Numbers
*/
__attribute__((always_inline)) RV_STATIC_INLINE void PFIC_SetPendingIRQ(IRQn_Type IRQn)
{
PFIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn)&0x1F));
}
/*******************************************************************************
* @fn PFIC_ClearPendingIRQ
*
* @brief Clear Interrupt Pending
*
* @param IRQn - Interrupt Numbers
*/
__attribute__((always_inline)) RV_STATIC_INLINE void PFIC_ClearPendingIRQ(IRQn_Type IRQn)
{
PFIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn)&0x1F));
}
/*******************************************************************************
* @fn PFIC_GetActive
*
* @brief Get Interrupt Active State
*
* @param IRQn - Interrupt Numbers
*
* @return 1: Interrupt Active
* 0: Interrupt No Active.
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t PFIC_GetActive(IRQn_Type IRQn)
{
return ((uint32_t)((PFIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn)&0x1F))) ? 1 : 0));
}
/*******************************************************************************
* @fn PFIC_SetPriority
*
* @brief Set Interrupt Priority
*
* @param IRQn - Interrupt Numbers
* @param priority - bit7: pre-emption priority
* bit6-bit4: subpriority
*/
__attribute__((always_inline)) RV_STATIC_INLINE void PFIC_SetPriority(IRQn_Type IRQn, uint8_t priority)
{
PFIC->IPRIOR[(uint32_t)(IRQn)] = priority;
}
/*********************************************************************
* @fn SetVTFIRQ
*
* @brief Set VTF Interrupt
*
* @param addr - VTF interrupt service function base address.
* IRQn - Interrupt Numbers
* num - VTF Interrupt Numbers
* NewState - DISABLE or ENABLE
*
* @return none
*/
__attribute__((always_inline)) RV_STATIC_INLINE void SetVTFIRQ(uint32_t addr, IRQn_Type IRQn, uint8_t num, FunctionalState NewState){
if(num > 3) return ;
if (NewState != DISABLE)
{
PFIC->VTFIDR[num] = IRQn;
PFIC->VTFADDR[num] = ((addr&0xFFFFFFFE)|0x1);
}
else{
PFIC->VTFIDR[num] = IRQn;
PFIC->VTFADDR[num] = ((addr&0xFFFFFFFE)&(~0x1));
}
}
/*********************************************************************
* @fn _SEV
*
* @brief Set Event
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void _SEV(void)
{
PFIC->SCTLR |= (1<<3)|(1<<5);
}
/*********************************************************************
* @fn _WFE
*
* @brief Wait for Events
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void _WFE(void)
{
PFIC->SCTLR |= (1<<3);
asm volatile ("wfi");
}
/*********************************************************************
* @fn __WFE
*
* @brief Wait for Events
*
* @return None
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFE(void)
{
_SEV();
_WFE();
_WFE();
}
/*********************************************************************
* @fn __WFI
*
* @brief Wait for Interrupt
*/
__attribute__((always_inline)) RV_STATIC_INLINE void __WFI(void)
{
PFIC->SCTLR &= ~(1 << 3); // wfi
__asm__ volatile("wfi");
}
/*********************************************************************
* @fn PFIC_SystemReset
*
* @brief Initiate a system reset request
*/
__attribute__((always_inline)) RV_STATIC_INLINE void PFIC_SystemReset(void)
{
PFIC->CFGR = PFIC_KEY3 | (1 << 7);
}
/*********************************************************************
* @fn __AMOADD_W
*
* @brief Atomic Add with 32bit value
* Atomically ADD 32bit value with value in memory using amoadd.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be ADDed
*
*
* @return return memory value + add value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOADD_W(volatile int32_t *addr, int32_t value)
{
int32_t result;
__asm volatile ("amoadd.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOAND_W
*
* @brief Atomic And with 32bit value
* Atomically AND 32bit value with value in memory using amoand.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be ANDed
*
*
* @return return memory value & and value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOAND_W(volatile int32_t *addr, int32_t value)
{
int32_t result;
__asm volatile ("amoand.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOMAX_W
*
* @brief Atomic signed MAX with 32bit value
* @details Atomically signed max compare 32bit value with value in memory using amomax.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
*
* @return the bigger value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOMAX_W(volatile int32_t *addr, int32_t value)
{
int32_t result;
__asm volatile ("amomax.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOMAXU_W
*
* @brief Atomic unsigned MAX with 32bit value
* Atomically unsigned max compare 32bit value with value in memory using amomaxu.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
* @return return the bigger value
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOMAXU_W(volatile uint32_t *addr, uint32_t value)
{
uint32_t result;
__asm volatile ("amomaxu.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOMIN_W
*
* @brief Atomic signed MIN with 32bit value
* Atomically signed min compare 32bit value with value in memory using amomin.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
*
* @return the smaller value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOMIN_W(volatile int32_t *addr, int32_t value)
{
int32_t result;
__asm volatile ("amomin.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOMINU_W
*
* @brief Atomic unsigned MIN with 32bit value
* Atomically unsigned min compare 32bit value with value in memory using amominu.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be compared
*
*
* @return the smaller value
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOMINU_W(volatile uint32_t *addr, uint32_t value)
{
uint32_t result;
__asm volatile ("amominu.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOOR_W
*
* @brief Atomic OR with 32bit value
* @details Atomically OR 32bit value with value in memory using amoor.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be ORed
*
*
* @return return memory value | and value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOOR_W(volatile int32_t *addr, int32_t value)
{
int32_t result;
__asm volatile ("amoor.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/*********************************************************************
* @fn __AMOSWAP_W
*
* @brief Atomically swap new 32bit value into memory using amoswap.d.
* addr Address pointer to data, address need to be 4byte aligned
* newval New value to be stored into the address
*
* @return return the original value in memory
*/
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOSWAP_W(volatile uint32_t *addr, uint32_t newval)
{
uint32_t result;
__asm volatile ("amoswap.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(newval) : "memory");
return result;
}
/*********************************************************************
* @fn __AMOXOR_W
*
* @brief Atomic XOR with 32bit value
* @details Atomically XOR 32bit value with value in memory using amoxor.d.
* addr Address pointer to data, address need to be 4byte aligned
* value value to be XORed
*
*
* @return return memory value ^ and value
*/
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOXOR_W(volatile int32_t *addr, int32_t value)
{
int32_t result;
__asm volatile ("amoxor.w %0, %2, %1" : \
"=r"(result), "+A"(*addr) : "r"(value) : "memory");
return *addr;
}
/**
* @brief Return the Machine Status Register
*
* @return mstatus value
*/
uint32_t __get_MSTATUS(void);
/**
* @brief Return the Machine ISA Register
*
* @return misa value
*/
uint32_t __get_MISA(void);
/***
* @brief Return the Machine Trap-Vector Base-Address Register
*
* @return mtvec value
*/
uint32_t __get_MTVEC(void);
/**
* @brief Return the Machine Seratch Register
*
* @return mscratch value
*/
uint32_t __get_MSCRATCH(void);
/**
* @brief Return the Machine Exception Program Register
*
* @return mepc value
*/
uint32_t __get_MEPC(void);
/**
* @brief Return the Machine Cause Register
*
* @return mcause value
*/
uint32_t __get_MCAUSE(void);
/**
* @brief Return the Machine Trap Value Register
*
* @return mtval value
*/
uint32_t __get_MTVAL(void);
/**
* @brief Return Vendor ID Register
*
* @return mvendorid value
*/
uint32_t __get_MVENDORID(void);
/**
* @brief Return Machine Architecture ID Register
*
* @return marchid value
*/
uint32_t __get_MARCHID(void);
/**
* @brief Return Machine Implementation ID Register
*
* @return mimpid value
*/
uint32_t __get_MIMPID(void);
/**
* @brief Return Hart ID Register
*
* @return mhartid value
*/
uint32_t __get_MHARTID(void);
/**
* @brief Return SP Register
*
* @return SP value
*/
uint32_t __get_SP(void);
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFFFFFFFFFFF)
#define SysTick_CTLR_SWIE (1 << 31)
#define SysTick_CTLR_INIT (1 << 5)
#define SysTick_CTLR_MODE (1 << 4)
#define SysTick_CTLR_STRE (1 << 3)
#define SysTick_CTLR_STCLK (1 << 2)
#define SysTick_CTLR_STIE (1 << 1)
#define SysTick_CTLR_STE (1 << 0)
#define SysTick_SR_CNTIF (1 << 0)
RV_STATIC_INLINE uint32_t SysTick_Config(uint64_t ticks)
{
if((ticks - 1) > SysTick_LOAD_RELOAD_Msk)
return (1); /* Reload value impossible */
SysTick->CMP = ticks - 1; /* set reload register */
PFIC_EnableIRQ(SysTick_IRQn);
SysTick->CTLR = SysTick_CTLR_INIT |
SysTick_CTLR_STRE |
SysTick_CTLR_STCLK |
SysTick_CTLR_STIE |
SysTick_CTLR_STE; /* Enable SysTick IRQ and SysTick Timer */
return (0); /* Function successful */
}
#ifdef __cplusplus
}
#endif
#endif /* __CORE_RV3A_H__ */

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/********************************** (C) COPYRIGHT *******************************
* File Name : startup_CH59x.s
* Author : WCH
* Version : V1.0.0
* Date : 2021/02/25
* Description :
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
.section .init,"ax",@progbits
.global _start
.align 1
_start:
j handle_reset
.section .vector,"ax",@progbits
.align 1
_vector_base:
.option norvc;
.word 0
.word 0
.word NMI_Handler /* NMI Handler */
.word HardFault_Handler /* Hard Fault Handler */
.word 0xF5F9BDA9
.word Ecall_M_Mode_Handler /* 5 */
.word 0
.word 0
.word Ecall_U_Mode_Handler /* 8 */
.word Break_Point_Handler /* 9 */
.word 0
.word 0
.word SysTick_Handler /* SysTick Handler */
.word 0
.word SW_Handler /* SW Handler */
.word 0
/* External Interrupts */
.word TMR0_IRQHandler /* 0: TMR0 */
.word GPIOA_IRQHandler /* GPIOA */
.word GPIOB_IRQHandler /* GPIOB */
.word SPI0_IRQHandler /* SPI0 */
.word BB_IRQHandler /* BLEB */
.word LLE_IRQHandler /* BLEL */
.word USB_IRQHandler /* USB */
.word 0
.word TMR1_IRQHandler /* TMR1 */
.word TMR2_IRQHandler /* TMR2 */
.word UART0_IRQHandler /* UART0 */
.word UART1_IRQHandler /* UART1 */
.word RTC_IRQHandler /* RTC */
.word ADC_IRQHandler /* ADC */
.word I2C_IRQHandler /* I2C */
.word PWMX_IRQHandler /* PWMX */
.word TMR3_IRQHandler /* TMR3 */
.word UART2_IRQHandler /* UART2 */
.word UART3_IRQHandler /* UART3 */
.word WDOG_BAT_IRQHandler /* WDOG_BAT */
.option rvc;
.section .vector_handler, "ax", @progbits
.weak NMI_Handler
.weak HardFault_Handler
.weak Ecall_M_Mode_Handler
.weak Ecall_U_Mode_Handler
.weak Break_Point_Handler
.weak SysTick_Handler
.weak SW_Handler
.weak TMR0_IRQHandler
.weak GPIOA_IRQHandler
.weak GPIOB_IRQHandler
.weak SPI0_IRQHandler
.weak BB_IRQHandler
.weak LLE_IRQHandler
.weak USB_IRQHandler
.weak TMR1_IRQHandler
.weak TMR2_IRQHandler
.weak UART0_IRQHandler
.weak UART1_IRQHandler
.weak RTC_IRQHandler
.weak ADC_IRQHandler
.weak I2C_IRQHandler
.weak PWMX_IRQHandler
.weak TMR3_IRQHandler
.weak UART2_IRQHandler
.weak UART3_IRQHandler
.weak WDOG_BAT_IRQHandler
NMI_Handler:
HardFault_Handler:
Ecall_M_Mode_Handler:
Ecall_U_Mode_Handler:
Break_Point_Handler:
SysTick_Handler:
SW_Handler:
TMR0_IRQHandler:
GPIOA_IRQHandler:
GPIOB_IRQHandler:
SPI0_IRQHandler:
BB_IRQHandler:
LLE_IRQHandler:
USB_IRQHandler:
TMR1_IRQHandler:
TMR2_IRQHandler:
UART0_IRQHandler:
UART1_IRQHandler:
RTC_IRQHandler:
ADC_IRQHandler:
I2C_IRQHandler:
PWMX_IRQHandler:
TMR3_IRQHandler:
UART2_IRQHandler:
UART3_IRQHandler:
WDOG_BAT_IRQHandler:
1:
j 1b
.section .handle_reset,"ax",@progbits
.weak handle_reset
.align 1
handle_reset:
.option push
.option norelax
la gp, __global_pointer$
.option pop
1:
la sp, _eusrstack
/* Load highcode code section from flash to RAM */
2:
la a0, _highcode_lma
la a1, _highcode_vma_start
la a2, _highcode_vma_end
bgeu a1, a2, 2f
1:
lw t0, (a0)
sw t0, (a1)
addi a0, a0, 4
addi a1, a1, 4
bltu a1, a2, 1b
/* Load data section from flash to RAM */
2:
la a0, _data_lma
la a1, _data_vma
la a2, _edata
bgeu a1, a2, 2f
1:
lw t0, (a0)
sw t0, (a1)
addi a0, a0, 4
addi a1, a1, 4
bltu a1, a2, 1b
2:
/* clear bss section */
la a0, _sbss
la a1, _ebss
bgeu a0, a1, 2f
1:
sw zero, (a0)
addi a0, a0, 4
bltu a0, a1, 1b
2:
/* 流水线控制位 & 动态预测控制位 */
li t0, 0x1f
csrw 0xbc0, t0
/* 打开嵌套中断、硬件压栈功能 */
li t0, 0x3
csrw 0x804, t0
li t0, 0x88
csrw mstatus, t0
la t0, _vector_base
/* 配置向量表模式为绝对地址模式 */
ori t0, t0, 3
csrw mtvec, t0
la t0, main
csrw mepc, t0
mret

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_adc.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn ADC_DataCalib_Rough
*
* @brief 采样数据粗调,获取偏差值,必须先配置ADC后调用此函数获取校准值
*
* @param none
*
* @return 偏差
*/
signed short ADC_DataCalib_Rough(void) // 采样数据粗调,获取偏差值
{
uint16_t i;
uint32_t sum = 0;
uint8_t ch = 0; // 备份通道
uint8_t cfg = 0; // 备份
ch = R8_ADC_CHANNEL;
cfg = R8_ADC_CFG;
R8_ADC_CFG |= RB_ADC_OFS_TEST; // 进入测试模式
R8_ADC_CFG &= ~RB_ADC_DIFF_EN; // 关闭差分
R8_ADC_CONVERT |= RB_ADC_START;
while(R8_ADC_CONVERT & RB_ADC_START);
for(i = 0; i < 16; i++)
{
R8_ADC_CONVERT |= RB_ADC_START;
while(R8_ADC_CONVERT & RB_ADC_START);
sum += (~R16_ADC_DATA) & RB_ADC_DATA;
}
sum = (sum + 8) >> 4;
R8_ADC_CFG = cfg; // 恢复配置值
R8_ADC_CHANNEL = ch;
return (2048 - sum);
}
/*********************************************************************
* @fn ADC_ExtSingleChSampInit
*
* @brief 外部信号单通道采样初始化
*
* @param sp - refer to ADC_SampClkTypeDef
* @param ga - refer to ADC_SignalPGATypeDef
*
* @return none
*/
void ADC_ExtSingleChSampInit(ADC_SampClkTypeDef sp, ADC_SignalPGATypeDef ga)
{
R8_TKEY_CFG &= ~RB_TKEY_PWR_ON;
R8_ADC_CFG = RB_ADC_POWER_ON | RB_ADC_BUF_EN | (sp << 6) | ((ga&0xF) << 4);
if( ga & ADC_PGA_2_ )
{
R8_ADC_CONVERT |= RB_ADC_PGA_GAIN2;
}
else
{
R8_ADC_CONVERT &= ~RB_ADC_PGA_GAIN2;
}
}
/*********************************************************************
* @fn ADC_ExtDiffChSampInit
*
* @brief 外部信号差分通道采样初始化
*
* @param sp - refer to ADC_SampClkTypeDef
* @param ga - refer to ADC_SignalPGATypeDef
*
* @return none
*/
void ADC_ExtDiffChSampInit(ADC_SampClkTypeDef sp, ADC_SignalPGATypeDef ga)
{
R8_TKEY_CFG &= ~RB_TKEY_PWR_ON;
R8_ADC_CFG = RB_ADC_POWER_ON | RB_ADC_DIFF_EN | (sp << 6) | ((ga&0xF) << 4);
if( ga & ADC_PGA_2_ )
{
R8_ADC_CONVERT |= RB_ADC_PGA_GAIN2;
}
else
{
R8_ADC_CONVERT &= ~RB_ADC_PGA_GAIN2;
}
}
/*********************************************************************
* @fn ADC_InterTSSampInit
*
* @brief 内置温度传感器采样初始化
*
* @param none
*
* @return none
*/
void ADC_InterTSSampInit(void)
{
R8_TKEY_CFG &= ~RB_TKEY_PWR_ON;
R8_TEM_SENSOR = RB_TEM_SEN_PWR_ON;
R8_ADC_CHANNEL = CH_INTE_VTEMP;
R8_ADC_CFG = RB_ADC_POWER_ON | RB_ADC_DIFF_EN | (3 << 4);
R8_ADC_CONVERT &= ~RB_ADC_PGA_GAIN2;
}
/*********************************************************************
* @fn ADC_InterBATSampInit
*
* @brief 内置电池电压采样初始化
*
* @param none
*
* @return none
*/
void ADC_InterBATSampInit(void)
{
R8_TKEY_CFG &= ~RB_TKEY_PWR_ON;
R8_ADC_CHANNEL = CH_INTE_VBAT;
R8_ADC_CFG = RB_ADC_POWER_ON | RB_ADC_BUF_EN | (0 << 4); // 使用-12dB模式
R8_ADC_CONVERT &= ~RB_ADC_PGA_GAIN2;
}
/*********************************************************************
* @fn TouchKey_ChSampInit
*
* @brief 触摸按键通道采样初始化
*
* @param none
*
* @return none
*/
void TouchKey_ChSampInit(void)
{
R8_ADC_CFG = RB_ADC_POWER_ON | RB_ADC_BUF_EN | (ADC_PGA_0 << 4) | (SampleFreq_8 << 6);
R8_ADC_CONVERT &= ~RB_ADC_PGA_GAIN2;
R8_TKEY_CFG |= RB_TKEY_PWR_ON;
}
/*********************************************************************
* @fn ADC_ExcutSingleConver
*
* @brief ADC执行单次转换
*
* @param none
*
* @return ADC转换后的数据
*/
uint16_t ADC_ExcutSingleConver(void)
{
R8_ADC_CONVERT |= RB_ADC_START;
while(R8_ADC_CONVERT & RB_ADC_START);
return (R16_ADC_DATA & RB_ADC_DATA);
}
/*********************************************************************
* @fn TouchKey_ExcutSingleConver
*
* @brief TouchKey转换后数据
*
* @param charg - Touchkey充电时间,5bits有效, t=charg*Tadc
* @param disch - Touchkey放电时间,3bits有效, t=disch*Tadc
*
* @return 当前TouchKey等效数据
*/
uint16_t TouchKey_ExcutSingleConver(uint8_t charg, uint8_t disch)
{
R8_TKEY_COUNT = (disch << 5) | (charg & 0x1f);
R8_TKEY_CONVERT = RB_TKEY_START;
while(R8_TKEY_CONVERT & RB_TKEY_START);
return (R16_ADC_DATA & RB_ADC_DATA);
}
/*********************************************************************
* @fn ADC_AutoConverCycle
*
* @brief 设置连续 ADC的周期
*
* @param cycle - 采样周期计算方法为(256-cycle)*16*Tsys
*
* @return none
*/
void ADC_AutoConverCycle(uint8_t cycle)
{
R8_ADC_AUTO_CYCLE = cycle;
}
/*********************************************************************
* @fn ADC_DMACfg
*
* @brief 配置DMA功能
*
* @param s - 是否打开DMA功能
* @param startAddr - DMA 起始地址
* @param endAddr - DMA 结束地址
* @param m - 配置DMA模式
*
* @return none
*/
void ADC_DMACfg(uint8_t s, uint32_t startAddr, uint32_t endAddr, ADC_DMAModeTypeDef m)
{
if(s == DISABLE)
{
R8_ADC_CTRL_DMA &= ~(RB_ADC_DMA_ENABLE | RB_ADC_IE_DMA_END);
}
else
{
R16_ADC_DMA_BEG = startAddr&0xFFFF;
R16_ADC_DMA_END = endAddr&0xFFFF;
if(m)
{
R8_ADC_CTRL_DMA |= RB_ADC_DMA_LOOP | RB_ADC_IE_DMA_END | RB_ADC_DMA_ENABLE;
}
else
{
R8_ADC_CTRL_DMA &= ~RB_ADC_DMA_LOOP;
R8_ADC_CTRL_DMA |= RB_ADC_IE_DMA_END | RB_ADC_DMA_ENABLE;
}
}
}
/*********************************************************************
* @fn adc_to_temperature_celsius
*
* @brief Convert ADC value to temperature(Celsius)
*
* @param adc_val - adc value
*
* @return temperature (Celsius)
*/
int adc_to_temperature_celsius(uint16_t adc_val)
{
uint32_t C25 = 0;
int temp;
C25 = (*((PUINT32)ROM_CFG_TMP_25C));
/* current temperature = standard temperature + (adc deviation * adc linearity coefficient) */
temp = (((C25 >> 16) & 0xFFFF) ? ((C25 >> 16) & 0xFFFF) : 25) + \
(adc_val - ((int)(C25 & 0xFFFF))) * 100 / 283;
return (temp);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_clk.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn LClk32K_Select
*
* @brief 32K 低频时钟来源
*
* @param hc - 选择32K使用内部还是外部
*
* @return none
*/
void LClk32K_Select(LClk32KTypeDef hc)
{
uint8_t cfg = R8_CK32K_CONFIG;
if(hc == Clk32K_LSI)
{
cfg &= ~RB_CLK_OSC32K_XT;
LSECFG_Current(LSE_RCur_100);
}
else
{
cfg |= RB_CLK_OSC32K_XT;
}
sys_safe_access_enable();
R8_CK32K_CONFIG = cfg;
sys_safe_access_disable();
}
/*********************************************************************
* @fn LClk32K_Cfg
*
* @brief 32K 低频时钟电源配置
*
* @param hc - 选择内部32K还是外部32K
* @param s - 是否打开电源
*
* @return none
*/
void LClk32K_Cfg(LClk32KTypeDef hc, FunctionalState s)
{
uint8_t cfg = R8_CK32K_CONFIG;
if(hc == Clk32K_LSI)
{
if(s == DISABLE)
{
cfg &= ~RB_CLK_INT32K_PON;
}
else
{
cfg |= RB_CLK_INT32K_PON;
}
}
else
{
if(s == DISABLE)
{
cfg &= ~RB_CLK_XT32K_PON;
}
else
{
cfg |= RB_CLK_XT32K_PON;
}
}
sys_safe_access_enable();
R8_CK32K_CONFIG = cfg;
sys_safe_access_disable();
}
/*********************************************************************
* @fn HSECFG_Current
*
* @brief HSE晶体 偏置电流配置
*
* @param c - 75%,100%,125%,150%
*
* @return none
*/
void HSECFG_Current(HSECurrentTypeDef c)
{
uint8_t x32M_c;
x32M_c = R8_XT32M_TUNE;
x32M_c = (x32M_c & 0xfc) | (c & 0x03);
sys_safe_access_enable();
R8_XT32M_TUNE = x32M_c;
sys_safe_access_disable();
}
/*********************************************************************
* @fn HSECFG_Capacitance
*
* @brief HSE晶体 负载电容配置
*
* @param c - refer to HSECapTypeDef
*
* @return none
*/
void HSECFG_Capacitance(HSECapTypeDef c)
{
uint8_t x32M_c;
x32M_c = R8_XT32M_TUNE;
x32M_c = (x32M_c & 0x8f) | (c << 4);
sys_safe_access_enable();
R8_XT32M_TUNE = x32M_c;
sys_safe_access_disable();
}
/*********************************************************************
* @fn LSECFG_Current
*
* @brief LSE晶体 偏置电流配置
*
* @param c - 70%,100%,140%,200%
*
* @return none
*/
void LSECFG_Current(LSECurrentTypeDef c)
{
uint8_t x32K_c;
x32K_c = R8_XT32K_TUNE;
x32K_c = (x32K_c & 0xfc) | (c & 0x03);
sys_safe_access_enable();
R8_XT32K_TUNE = x32K_c;
sys_safe_access_disable();
}
/*********************************************************************
* @fn LSECFG_Capacitance
*
* @brief LSE晶体 负载电容配置
*
* @param c - refer to LSECapTypeDef
*
* @return none
*/
void LSECFG_Capacitance(LSECapTypeDef c)
{
uint8_t x32K_c;
x32K_c = R8_XT32K_TUNE;
x32K_c = (x32K_c & 0x0f) | (c << 4);
sys_safe_access_enable();
R8_XT32K_TUNE = x32K_c;
sys_safe_access_disable();
}
/*********************************************************************
* @fn Calibration_LSI
*
* @brief 校准内部32K时钟
*
* @param cali_Lv - 校准等级选择 Level_32 ：2.4ms 1000ppm (32M 主频) 1100ppm (60M 主频)
* Level_64 ：4.4ms 800ppm (32M 主频) 1000ppm (60M 主频)
* Level_128 ：8.4ms 600ppm (32M 主频) 800ppm (60M 主频)
*
* @return none
*/
void Calibration_LSI(Cali_LevelTypeDef cali_Lv)
{
UINT64 i;
long long cnt_offset;
UINT8 retry = 0;
UINT8 retry_all = 0;
INT32 freq_sys;
UINT32 cnt_32k = 0;
UINT32 irqv = 0;
freq_sys = GetSysClock();
sys_safe_access_enable();
R8_CK32K_CONFIG &= ~RB_CLK_OSC32K_FILT;
R8_CK32K_CONFIG |= RB_CLK_OSC32K_FILT;
sys_safe_access_disable();
LSECFG_Current(LSE_RCur_100);
while(1)
{
// 粗调
sys_safe_access_enable();
R8_OSC_CAL_CTRL &= ~RB_OSC_CNT_TOTAL;
R8_OSC_CAL_CTRL |= 1;
sys_safe_access_disable();
while(1)
{
sys_safe_access_enable();
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
R16_OSC_CAL_CNT |= RB_OSC_CAL_OV_CLR;
R16_OSC_CAL_CNT |= RB_OSC_CAL_IF;
sys_safe_access_disable();
while( (R8_OSC_CAL_CTRL & RB_OSC_CNT_EN) == 0 )
{
sys_safe_access_enable();
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
sys_safe_access_disable();
}
while(!(R8_OSC_CAL_CTRL & RB_OSC_CNT_HALT)); // 用于丢弃
SYS_DisableAllIrq(&irqv);
sys_safe_access_enable();
R8_OSC_CAL_CTRL &= ~RB_OSC_CNT_EN;
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
R16_OSC_CAL_CNT |= RB_OSC_CAL_OV_CLR;
R16_OSC_CAL_CNT |= RB_OSC_CAL_IF;
sys_safe_access_disable();
while( (R8_OSC_CAL_CTRL & RB_OSC_CNT_EN) == 0 )
{
sys_safe_access_enable();
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
sys_safe_access_disable();
}
while(R8_OSC_CAL_CTRL & RB_OSC_CNT_HALT);
cnt_32k = RTC_GetCycle32k();
while(RTC_GetCycle32k() == cnt_32k);
R16_OSC_CAL_CNT |= RB_OSC_CAL_OV_CLR;
SYS_RecoverIrq(irqv);
while(!(R8_OSC_CAL_CTRL & RB_OSC_CNT_HALT));
i = R16_OSC_CAL_CNT; // 实时校准后采样值
cnt_offset = (i & 0x3FFF) + R8_OSC_CAL_OV_CNT * 0x3FFF - 2000 * (freq_sys / 1000) / CAB_LSIFQ;
if(((cnt_offset > -37 * (freq_sys / 1000) / 60000) && (cnt_offset < 37 * (freq_sys / 1000) / 60000)) || retry > 2)
{
if(retry)
break;
}
retry++;
cnt_offset = (cnt_offset > 0) ? (((cnt_offset * 2) / (74 * (freq_sys/1000) / 60000)) + 1) / 2 : (((cnt_offset * 2) / (74 * (freq_sys/1000) / 60000 )) - 1) / 2;
sys_safe_access_enable();
R16_INT32K_TUNE += cnt_offset;
sys_safe_access_disable();
}
// 细调
// 配置细调参数后，丢弃2次捕获值（软件行为）上判断已有一次，这里只留一次
sys_safe_access_enable();
R8_OSC_CAL_CTRL &= ~RB_OSC_CNT_TOTAL;
R8_OSC_CAL_CTRL |= cali_Lv;
sys_safe_access_disable();
while( (R8_OSC_CAL_CTRL & RB_OSC_CNT_TOTAL) != cali_Lv )
{
sys_safe_access_enable();
R8_OSC_CAL_CTRL |= cali_Lv;
sys_safe_access_disable();
}
sys_safe_access_enable();
R8_OSC_CAL_CTRL &= ~RB_OSC_CNT_EN;
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
R16_OSC_CAL_CNT |= RB_OSC_CAL_OV_CLR;
R16_OSC_CAL_CNT |= RB_OSC_CAL_IF;
sys_safe_access_disable();
while( (R8_OSC_CAL_CTRL & RB_OSC_CNT_EN) == 0 )
{
sys_safe_access_enable();
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
sys_safe_access_disable();
}
while(!(R8_OSC_CAL_CTRL & RB_OSC_CNT_HALT)); // 用于丢弃
SYS_DisableAllIrq(&irqv);
sys_safe_access_enable();
R8_OSC_CAL_CTRL &= ~RB_OSC_CNT_EN;
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
R16_OSC_CAL_CNT |= RB_OSC_CAL_OV_CLR;
R16_OSC_CAL_CNT |= RB_OSC_CAL_IF;
sys_safe_access_disable();
while( (R8_OSC_CAL_CTRL & RB_OSC_CNT_EN) == 0 )
{
sys_safe_access_enable();
R8_OSC_CAL_CTRL |= RB_OSC_CNT_EN;
sys_safe_access_disable();
}
while(R8_OSC_CAL_CTRL & RB_OSC_CNT_HALT);
cnt_32k = RTC_GetCycle32k();
while(RTC_GetCycle32k() == cnt_32k);
R16_OSC_CAL_CNT |= RB_OSC_CAL_OV_CLR;
SYS_RecoverIrq(irqv);
while(!(R8_OSC_CAL_CTRL & RB_OSC_CNT_HALT));
sys_safe_access_enable();
R8_OSC_CAL_CTRL &= ~RB_OSC_CNT_EN;
sys_safe_access_disable();
i = R16_OSC_CAL_CNT; // 实时校准后采样值
cnt_offset = (i & 0x3FFF) + R8_OSC_CAL_OV_CNT * 0x3FFF - 4000 * (1 << cali_Lv) * (freq_sys / 1000000) / 256 * 1000/(CAB_LSIFQ/256);
cnt_offset = (cnt_offset > 0) ? ((((cnt_offset * 2*(100 )) / (1366 * ((1 << cali_Lv)/8) * (freq_sys/1000) / 60000)) + 1) / 2) : ((((cnt_offset * 2*(100)) / (1366 * ((1 << cali_Lv)/8) * (freq_sys/1000) / 60000)) - 1) / 2);
if((cnt_offset > 0)&&(((R16_INT32K_TUNE>>5)+cnt_offset)>0xFF))
{
if(retry_all>2)
{
sys_safe_access_enable();
R16_INT32K_TUNE |= (0xFF<<5);
sys_safe_access_disable();
return;
}
else
{
sys_safe_access_enable();
R16_INT32K_TUNE = (R16_INT32K_TUNE&0x1F)|(0x7F<<5);
sys_safe_access_disable();
}
}
else if((cnt_offset < 0)&&((R16_INT32K_TUNE>>5)<(-cnt_offset)))
{
if(retry_all>2)
{
sys_safe_access_enable();
R16_INT32K_TUNE &= 0x1F;
sys_safe_access_disable();
return;
}
else
{
sys_safe_access_enable();
R16_INT32K_TUNE = (R16_INT32K_TUNE&0x1F)|(0x7F<<5);
sys_safe_access_disable();
}
}
else
{
sys_safe_access_enable();
R16_INT32K_TUNE += (cnt_offset<<5);
sys_safe_access_disable();
return;
}
retry_all++;
}
}
/*********************************************************************
* @fn RTCInitTime
*
* @brief RTC时钟初始化当前时间
*
* @param y - 配置年，MAX_Y = BEGYEAR + 44
* @param mon - 配置月，MAX_MON = 12
* @param d - 配置日，MAX_D = 31
* @param h - 配置小时，MAX_H = 23
* @param m - 配置分钟，MAX_M = 59
* @param s - 配置秒，MAX_S = 59
*
* @return none
*/
void RTC_InitTime(uint16_t y, uint16_t mon, uint16_t d, uint16_t h, uint16_t m, uint16_t s)
{
uint32_t t;
uint16_t year, month, day, sec2, t32k;
volatile uint8_t clk_pin;
year = y;
month = mon;
day = 0;
while(year > BEGYEAR)
{
day += YearLength(year - 1);
year--;
}
while(month > 1)
{
day += monthLength(IsLeapYear(y), month - 2);
month--;
}
day += d - 1;
sec2 = (h % 24) * 1800 + m * 30 + s / 2;
t32k = (s & 1) ? (0x8000) : (0);
t = sec2;
t = t << 16 | t32k;
do
{
clk_pin = (R8_CK32K_CONFIG & RB_32K_CLK_PIN);
} while(clk_pin != (R8_CK32K_CONFIG & RB_32K_CLK_PIN));
if(!clk_pin)
{
while(!clk_pin)
{
do
{
clk_pin = (R8_CK32K_CONFIG & RB_32K_CLK_PIN);
} while(clk_pin != (R8_CK32K_CONFIG & RB_32K_CLK_PIN));
}
}
sys_safe_access_enable();
R32_RTC_TRIG = day;
R8_RTC_MODE_CTRL |= RB_RTC_LOAD_HI;
sys_safe_access_disable();
while((R32_RTC_TRIG & 0x3FFF) != (R32_RTC_CNT_DAY & 0x3FFF));
sys_safe_access_enable();
R32_RTC_TRIG = t;
R8_RTC_MODE_CTRL |= RB_RTC_LOAD_LO;
sys_safe_access_disable();
}
/*********************************************************************
* @fn RTC_GetTime
*
* @brief 获取当前时间
*
* @param py - 获取到的年，MAX_Y = BEGYEAR + 44
* @param pmon - 获取到的月，MAX_MON = 12
* @param pd - 获取到的日，MAX_D = 31
* @param ph - 获取到的小时，MAX_H = 23
* @param pm - 获取到的分钟，MAX_M = 59
* @param ps - 获取到的秒，MAX_S = 59
*
* @return none
*/
void RTC_GetTime(uint16_t *py, uint16_t *pmon, uint16_t *pd, uint16_t *ph, uint16_t *pm, uint16_t *ps)
{
uint32_t t;
uint16_t day, sec2, t32k;
day = R32_RTC_CNT_DAY & 0x3FFF;
sec2 = R16_RTC_CNT_2S;
t32k = R16_RTC_CNT_32K;
t = sec2 * 2 + ((t32k < 0x8000) ? 0 : 1);
*py = BEGYEAR;
while(day >= YearLength(*py))
{
day -= YearLength(*py);
(*py)++;
}
*pmon = 0;
while(day >= monthLength(IsLeapYear(*py), *pmon))
{
day -= monthLength(IsLeapYear(*py), *pmon);
(*pmon)++;
}
(*pmon)++;
*pd = day + 1;
*ph = t / 3600;
*pm = t % 3600 / 60;
*ps = t % 60;
}
/*********************************************************************
* @fn RTC_SetCycle32k
*
* @brief 基于LSE/LSI时钟，配置当前RTC 周期数
*
* @param cyc - 配置周期计数初值，MAX_CYC = 0xA8BFFFFF = 2831155199
*
* @return none
*/
void RTC_SetCycle32k(uint32_t cyc)
{
volatile uint8_t clk_pin;
do
{
clk_pin = (R8_CK32K_CONFIG & RB_32K_CLK_PIN);
} while((clk_pin != (R8_CK32K_CONFIG & RB_32K_CLK_PIN)) || (!clk_pin));
sys_safe_access_enable();
R32_RTC_TRIG = cyc;
R8_RTC_MODE_CTRL |= RB_RTC_LOAD_LO;
sys_safe_access_disable();
}
/*********************************************************************
* @fn RTC_GetCycle32k
*
* @brief 基于LSE/LSI时钟，获取当前RTC 周期数
*
* @param none
*
* @return 当前周期数，MAX_CYC = 0xA8BFFFFF = 2831155199
*/
uint32_t RTC_GetCycle32k(void)
{
volatile uint32_t i;
do
{
i = R32_RTC_CNT_32K;
} while(i != R32_RTC_CNT_32K);
return (i);
}
/*********************************************************************
* @fn RTC_TMRFunCfg
*
* @brief RTC定时模式配置（注意定时基准固定为32768Hz）
*
* @param t - refer to RTC_TMRCycTypeDef
*
* @return none
*/
void RTC_TMRFunCfg(RTC_TMRCycTypeDef t)
{
sys_safe_access_enable();
R8_RTC_MODE_CTRL &= ~(RB_RTC_TMR_EN | RB_RTC_TMR_MODE);
sys_safe_access_disable();
sys_safe_access_enable();
R8_RTC_MODE_CTRL |= RB_RTC_TMR_EN | (t);
sys_safe_access_disable();
}
/*********************************************************************
* @fn RTC_TRIGFunCfg
*
* @brief RTC时间触发模式配置
*
* @param cyc - 相对当前时间的触发间隔时间，基于LSE/LSI时钟周期数
*
* @return none
*/
void RTC_TRIGFunCfg(uint32_t cyc)
{
uint32_t t;
t = RTC_GetCycle32k() + cyc;
if(t > RTC_MAX_COUNT)
{
t -= RTC_MAX_COUNT;
}
sys_safe_access_enable();
R32_RTC_TRIG = t;
R8_RTC_MODE_CTRL |= RB_RTC_TRIG_EN;
sys_safe_access_disable();
}
/*********************************************************************
* @fn RTC_ModeFunDisable
*
* @brief RTC 模式功能关闭
*
* @param m - 需要关闭的当前模式
*
* @return none
*/
void RTC_ModeFunDisable(RTC_MODETypeDef m)
{
uint8_t i = 0;
if(m == RTC_TRIG_MODE)
{
i |= RB_RTC_TRIG_EN;
}
else if(m == RTC_TMR_MODE)
{
i |= RB_RTC_TMR_EN;
}
sys_safe_access_enable();
R8_RTC_MODE_CTRL &= ~(i);
sys_safe_access_disable();
}
/*********************************************************************
* @fn RTC_GetITFlag
*
* @brief 获取RTC中断标志
*
* @param f - refer to RTC_EVENTTypeDef
*
* @return 中断标志状态
*/
uint8_t RTC_GetITFlag(RTC_EVENTTypeDef f)
{
if(f == RTC_TRIG_EVENT)
{
return (R8_RTC_FLAG_CTRL & RB_RTC_TRIG_FLAG);
}
else
{
return (R8_RTC_FLAG_CTRL & RB_RTC_TMR_FLAG);
}
}
/*********************************************************************
* @fn RTC_ClearITFlag
*
* @brief 清除RTC中断标志
*
* @param f - refer to RTC_EVENTTypeDef
*
* @return none
*/
void RTC_ClearITFlag(RTC_EVENTTypeDef f)
{
switch(f)
{
case RTC_TRIG_EVENT:
R8_RTC_FLAG_CTRL = RB_RTC_TRIG_CLR;
break;
case RTC_TMR_EVENT:
R8_RTC_FLAG_CTRL = RB_RTC_TMR_CLR;
break;
default:
break;
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_flash.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/* RESET_EN */
#define RESET_Enable 0x00000008
#define RESET_Disable 0xFFFFFFF7
/* LOCKUP_RST_EN */
#define UART_NO_KEY_Enable 0x00000100
#define UART_NO_KEY_Disable 0xFFFFFEFF
/* BOOT_PIN */
#define BOOT_PIN_PB22 0x00000200
#define BOOT_PIN_PB11 0xFFFFFDFF
/* FLASH_WRProt */
#define FLASH_WRProt 0xFFF003FF
/*********************************************************************
* @fn FLASH_ROM_READ
*
* @brief Read Flash
*
* @param StartAddr - read address
* @param Buffer - read buffer
* @param len - read len
*
* @return none
*/
void FLASH_ROM_READ(uint32_t StartAddr, void *Buffer, uint32_t len)
{
uint32_t i, Length = (len + 3) >> 2;
uint32_t *pCode = (uint32_t *)StartAddr;
uint32_t *pBuf = (uint32_t *)Buffer;
for(i = 0; i < Length; i++)
{
*pBuf++ = *pCode++;
}
}
/*********************************************************************
* @fn UserOptionByteConfig
*
* @brief Configure User Option Byte.需在调用用户配置字生效函数后生效,且每次烧录后只能修改一次
* (使用该函数，必须使用官方提供的.S文件，同时调用该函数后，两次上电后，两线调试接口默认关闭)
*
* @param RESET_EN - 外部复位引脚使能
* @param BOOT_PIN - ENABLE-使用默认boot脚-PB22,DISABLE-使用boot脚-PB11
* @param UART_NO_KEY_EN - 串口免按键下载使能
* @param FLASHProt_Size - 写保护大小(单位4K)
*
* @return 0-Success, 1-Err
*/
uint8_t UserOptionByteConfig(FunctionalState RESET_EN, FunctionalState BOOT_PIN, FunctionalState UART_NO_KEY_EN,
uint32_t FLASHProt_Size)
{
uint32_t s, t;
FLASH_ROM_READ(0x14, &s, 4);
if(s == 0xF5F9BDA9)
{
s = 0;
FLASH_EEPROM_CMD(CMD_GET_ROM_INFO, 0x7EFFC, &s, 4);
s &= 0xFF;
if(RESET_EN == ENABLE)
s |= RESET_Enable;
else
s &= RESET_Disable;
/* bit[7:0]-bit[31-24] */
s |= ((~(s << 24)) & 0xFF000000); //高8位 配置信息取反；
if(BOOT_PIN == ENABLE)
s |= BOOT_PIN_PB22;
if(UART_NO_KEY_EN == ENABLE)
s |= UART_NO_KEY_Enable;
/* bit[23-10] */
s &= 0xFF0003FF;
s |= ((FLASHProt_Size << 10) | (5 << 20)) & 0x00FFFC00;
/*Write user option byte*/
FLASH_ROM_WRITE(0x14, &s, 4);
/* Verify user option byte */
FLASH_ROM_READ(0x14, &t, 4);
if(s == t)
return 0;
else
return 1;
}
return 1;
}
/*********************************************************************
* @fn UserOptionByteClose_SWD
*
* @brief 关两线调试接口，其余配置值保持不变.需在调用用户配置字生效函数后生效,且每次烧录后只能修改一次
* (使用该函数，必须使用官方提供的.S文件，同时调用该函数后，两次上电后，两线调试接口默认关闭)
*
* @return 0-Success, 1-Err
*/
uint8_t UserOptionByteClose_SWD(void)
{
uint32_t s, t;
FLASH_ROM_READ(0x14, &s, 4);
if(s == 0xF5F9BDA9)
{
FLASH_EEPROM_CMD(CMD_GET_ROM_INFO, 0x7EFFC, &s, 4);
s &= ~((1 << 4) | (1 << 7)); //禁用调试功能， 禁用SPI读写FLASH
/* bit[7:0]-bit[31-24] */
s &= 0x00FFFFFF;
s |= ((~(s << 24)) & 0xFF000000); //高8位 配置信息取反；
/*Write user option byte*/
FLASH_ROM_WRITE(0x14, &s, 4);
/* Verify user option byte */
FLASH_ROM_READ(0x14, &t, 4);
if(s == t)
return 0;
else
return 1;
}
return 1;
}
/*********************************************************************
* @fn UserOptionByte_Active
*
* @brief 用户配置字生效函数，执行后自动复位
*
* @return 0-Success, 1-Err
*/
void UserOptionByte_Active(void)
{
FLASH_ROM_SW_RESET();
sys_safe_access_enable();
R16_INT32K_TUNE = 0xFFFF;
sys_safe_access_disable();
sys_safe_access_enable();
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
sys_safe_access_disable();
while(1);
}
/*********************************************************************
* @fn GET_UNIQUE_ID
*
* @brief get 64 bit unique ID
*
* @param Buffer - Pointer to the buffer where data should be stored, Must be aligned to 4 bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
void GET_UNIQUE_ID(uint8_t *Buffer)
{
FLASH_EEPROM_CMD( CMD_GET_ROM_INFO, ROM_CFG_MAC_ADDR, Buffer, 0 );
Buffer[6] = 0;
Buffer[7] = 0;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_gpio.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn GPIOA_ModeCfg
*
* @brief GPIOA端口引脚模式配置
*
* @param pin - PA0-PA15
* @param mode - 输入输出类型
*
* @return none
*/
void GPIOA_ModeCfg(uint32_t pin, GPIOModeTypeDef mode)
{
switch(mode)
{
case GPIO_ModeIN_Floating:
R32_PA_PD_DRV &= ~pin;
R32_PA_PU &= ~pin;
R32_PA_DIR &= ~pin;
break;
case GPIO_ModeIN_PU:
R32_PA_PD_DRV &= ~pin;
R32_PA_PU |= pin;
R32_PA_DIR &= ~pin;
break;
case GPIO_ModeIN_PD:
R32_PA_PD_DRV |= pin;
R32_PA_PU &= ~pin;
R32_PA_DIR &= ~pin;
break;
case GPIO_ModeOut_PP_5mA:
R32_PA_PD_DRV &= ~pin;
R32_PA_DIR |= pin;
break;
case GPIO_ModeOut_PP_20mA:
R32_PA_PD_DRV |= pin;
R32_PA_DIR |= pin;
break;
default:
break;
}
}
/*********************************************************************
* @fn GPIOB_ModeCfg
*
* @brief GPIOB端口引脚模式配置
*
* @param pin - PB0-PB23
* @param mode - 输入输出类型
*
* @return none
*/
void GPIOB_ModeCfg(uint32_t pin, GPIOModeTypeDef mode)
{
switch(mode)
{
case GPIO_ModeIN_Floating:
R32_PB_PD_DRV &= ~pin;
R32_PB_PU &= ~pin;
R32_PB_DIR &= ~pin;
break;
case GPIO_ModeIN_PU:
R32_PB_PD_DRV &= ~pin;
R32_PB_PU |= pin;
R32_PB_DIR &= ~pin;
break;
case GPIO_ModeIN_PD:
R32_PB_PD_DRV |= pin;
R32_PB_PU &= ~pin;
R32_PB_DIR &= ~pin;
break;
case GPIO_ModeOut_PP_5mA:
R32_PB_PD_DRV &= ~pin;
R32_PB_DIR |= pin;
break;
case GPIO_ModeOut_PP_20mA:
R32_PB_PD_DRV |= pin;
R32_PB_DIR |= pin;
break;
default:
break;
}
}
/*********************************************************************
* @fn GPIOA_ITModeCfg
*
* @brief GPIOA引脚中断模式配置
*
* @param pin - PA0-PA15
* @param mode - 触发类型
*
* @return none
*/
void GPIOA_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode)
{
switch(mode)
{
case GPIO_ITMode_LowLevel: // 低电平触发
R16_PA_INT_MODE &= ~pin;
R32_PA_CLR |= pin;
break;
case GPIO_ITMode_HighLevel: // 高电平触发
R16_PA_INT_MODE &= ~pin;
R32_PA_OUT |= pin;
break;
case GPIO_ITMode_FallEdge: // 下降沿触发
R16_PA_INT_MODE |= pin;
R32_PA_CLR |= pin;
break;
case GPIO_ITMode_RiseEdge: // 上升沿触发
R16_PA_INT_MODE |= pin;
R32_PA_OUT |= pin;
break;
default:
break;
}
R16_PA_INT_IF = pin;
R16_PA_INT_EN |= pin;
}
/*********************************************************************
* @fn GPIOB_ITModeCfg
*
* @brief GPIOB引脚中断模式配置
*
* @param pin - PB0-PB23
* @param mode - 触发类型
*
* @return none
*/
void GPIOB_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode)
{
uint32_t Pin = pin | ((pin & (GPIO_Pin_22 | GPIO_Pin_23)) >> 14);
switch(mode)
{
case GPIO_ITMode_LowLevel: // 低电平触发
R16_PB_INT_MODE &= ~Pin;
R32_PB_CLR |= pin;
break;
case GPIO_ITMode_HighLevel: // 高电平触发
R16_PB_INT_MODE &= ~Pin;
R32_PB_OUT |= pin;
break;
case GPIO_ITMode_FallEdge: // 下降沿触发
R16_PB_INT_MODE |= Pin;
R32_PB_CLR |= pin;
break;
case GPIO_ITMode_RiseEdge: // 上升沿触发
R16_PB_INT_MODE |= Pin;
R32_PB_OUT |= pin;
break;
default:
break;
}
R16_PB_INT_IF = Pin;
R16_PB_INT_EN |= Pin;
}
/*********************************************************************
* @fn GPIOPinRemap
*
* @brief 外设功能引脚映射
*
* @param s - 是否使能映射
* @param perph - RB_RF_ANT_SW_EN - RF antenna switch control output on PA4/PA5/PA12/PA13/PA14/PA15
* RB_PIN_U0_INV - RXD0/RXD0_/TXD0/TXD0_ invert input/output
* RB_PIN_INTX - INTX: INT24/INT25 PB8/PB9 -> INT24_/INT25_ PB22/PB23
* RB_PIN_MODEM - MODEM: PA6/PA7 -> PB12/PB13
* RB_PIN_I2C - I2C: PB14/PB15 -> PB14/PB15
* RB_PIN_PWMX - PWMX: PA12/PA13 -> PA6/PA7
* RB_PIN_SPI0 - SPI0: PA12/PA13/PA14/PA15 -> PB12/PB13/PB14/PB15
* RB_PIN_UART3 - UART3: PA4/PA5 -> PA4/PA5
* RB_PIN_UART2 - UART2: PB22/PB23 -> PA6/PA7
* RB_PIN_UART1 - UART1: PA8/PA9 -> PB12/PB13
* RB_PIN_UART0 - UART0: PB4/PB7 -> PA15/PA14
* RB_PIN_TMR3 - TMR2: PB22 -> PB22
* RB_PIN_TMR2 - TMR2: PA11 -> PB11
* RB_PIN_TMR1 - TMR1: PA10 -> PB10
* RB_PIN_TMR0 - TMR0: PA9 -> PB23
*
* @return none
*/
void GPIOPinRemap(FunctionalState s, uint16_t perph)
{
if(s)
{
R16_PIN_ALTERNATE |= perph;
}
else
{
R16_PIN_ALTERNATE &= ~perph;
}
}
/*********************************************************************
* @fn GPIOAGPPCfg
*
* @brief 模拟外设GPIO引脚功能控制
*
* @param s - ENABLE - 打开模拟外设功能，关闭数字功能
* DISABLE - 启用数字功能，关闭模拟外设功能
* @param perph - RB_PIN_ADC8_9_IE - ADC/TKEY 9/8通道
* RB_PIN_ADC6_7_IE - ADC/TKEY 7/6通道
* RB_PIN_ADC10_IE - ADC/TKEY 10通道
* RB_PIN_ADC11_IE - ADC/TKEY 11 通道
* RB_PIN_USB2_DP_PU - USB2 U2D+引脚内部上拉电阻
* RB_PIN_USB2_IE - USB2引脚
* RB_PIN_USB_DP_PU - USB UD+引脚内部上拉电阻
* RB_PIN_USB_IE - USB 引脚
* RB_PIN_ADC0_IE - ADC/TKEY 0 通道
* RB_PIN_ADC1_IE - ADC/TKEY 1 通道
* RB_PIN_ADC12_IE - ADC/TKEY 12 通道
* RB_PIN_ADC13_IE - ADC/TKEY 13 通道
* RB_PIN_XT32K_IE - 32KHz晶振LSE引脚
* RB_PIN_ADC2_3_IE - ADC/TKEY 2/3 通道
* RB_PIN_ADC4_5_IE - ADC/TKEY 4/5 通道
*
* @return none
*/
void GPIOAGPPCfg(FunctionalState s, uint16_t perph)
{
if(s)
{
R16_PIN_ANALOG_IE |= perph;
}
else
{
R16_PIN_ANALOG_IE &= ~perph;
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_i2c.c
* Author : WCH
* Version : V1.0
* Date : 2021/03/15
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn I2C_Init
*
* @brief Initializes the I2Cx peripheral according to the specified
* parameters in the I2C_InitStruct.
*
* @param I2C_Mode - refer to I2C_ModeTypeDef
* @param I2C_ClockSpeed - Specifies the clock frequency(Hz).
* This parameter must be set to a value lower than 400kHz
* @param I2C_DutyCycle - Specifies the I2C fast mode duty cycle.refer to I2C_DutyTypeDef
* @param I2C_Ack - Enables or disables the acknowledgement.refer to I2C_AckTypeDef
* @param I2C_AckAddr - Specifies if 7-bit or 10-bit address is acknowledged.refer to I2C_AckAddrTypeDef
* @param I2C_OwnAddress1 - Specifies the first device own address.
* This parameter can be a 7-bit or 10-bit address.
*
* @return none
*/
void I2C_Init(I2C_ModeTypeDef I2C_Mode, UINT32 I2C_ClockSpeed, I2C_DutyTypeDef I2C_DutyCycle,
I2C_AckTypeDef I2C_Ack, I2C_AckAddrTypeDef I2C_AckAddr, UINT16 I2C_OwnAddress1)
{
uint32_t sysClock;
uint16_t tmpreg;
I2C_SoftwareResetCmd(ENABLE);
I2C_SoftwareResetCmd(DISABLE);
sysClock = GetSysClock();
R16_I2C_CTRL2 &= ~RB_I2C_FREQ;
R16_I2C_CTRL2 |= (sysClock / 1000000);
R16_I2C_CTRL1 &= ~RB_I2C_PE;
if(I2C_ClockSpeed <= 100000)
{
tmpreg = (sysClock / (I2C_ClockSpeed << 1)) & RB_I2C_CCR;
if(tmpreg < 0x04)
tmpreg = 0x04;
R16_I2C_RTR = (((sysClock / 1000000) + 1) > 0x3F) ? 0x3F : ((sysClock / 1000000) + 1);
}
else
{
if(I2C_DutyCycle == I2C_DutyCycle_2)
{
tmpreg = (sysClock / (I2C_ClockSpeed * 3)) & RB_I2C_CCR;
}
else
{
tmpreg = (sysClock / (I2C_ClockSpeed * 25)) & RB_I2C_CCR;
tmpreg |= I2C_DutyCycle_16_9;
}
if(tmpreg == 0)
{
tmpreg |= (uint16_t)0x0001;
}
tmpreg |= RB_I2C_F_S;
R16_I2C_RTR = (uint16_t)((((sysClock / 1000000) * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);
}
R16_I2C_CKCFGR = tmpreg;
R16_I2C_CTRL1 |= RB_I2C_PE;
R16_I2C_CTRL1 &= ~(RB_I2C_SMBUS | RB_I2C_SMBTYPE | RB_I2C_ACK);
R16_I2C_CTRL1 |= I2C_Mode | I2C_Ack;
R16_I2C_OADDR1 &= ~0xFFFF;
R16_I2C_OADDR1 |= I2C_AckAddr | I2C_OwnAddress1;
}
/*********************************************************************
* @fn I2C_Cmd
*
* @brief Enables or disables the specified I2C peripheral.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_Cmd(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_PE;
else
R16_I2C_CTRL1 &= ~RB_I2C_PE;
}
/*********************************************************************
* @fn I2C_GenerateSTART
*
* @brief Generates I2Cx communication START condition.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_GenerateSTART(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_START;
else
R16_I2C_CTRL1 &= ~RB_I2C_START;
}
/*********************************************************************
* @fn I2C_GenerateSTOP
*
* @brief Generates I2Cx communication STOP condition.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_GenerateSTOP(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_STOP;
else
R16_I2C_CTRL1 &= ~RB_I2C_STOP;
}
/*********************************************************************
* @fn I2C_AcknowledgeConfig
*
* @brief Enables or disables the specified I2C acknowledge feature.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_AcknowledgeConfig(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_ACK;
else
R16_I2C_CTRL1 &= ~RB_I2C_ACK;
}
/*********************************************************************
* @fn I2C_OwnAddress2Config
*
* @brief Configures the specified I2C own address2.
*
* @param Address - specifies the 7bit I2C own address2.
*
* @return none
*/
void I2C_OwnAddress2Config(uint8_t Address)
{
R16_I2C_OADDR2 &= ~RB_I2C_ADD2;
R16_I2C_OADDR2 |= (uint16_t)(Address & RB_I2C_ADD2);
}
/*********************************************************************
* @fn I2C_DualAddressCmd
*
* @brief Enables or disables the specified I2C dual addressing mode.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_DualAddressCmd(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_OADDR2 |= RB_I2C_ENDUAL;
else
R16_I2C_OADDR2 &= ~RB_I2C_ENDUAL;
}
/*********************************************************************
* @fn I2C_GeneralCallCmd
*
* @brief Enables or disables the specified I2C general call feature.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_GeneralCallCmd(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_ENGC;
else
R16_I2C_CTRL1 &= ~RB_I2C_ENGC;
}
/*********************************************************************
* @fn I2C_ITConfig
*
* @brief Enables or disables the specified I2C interrupts.
*
* @param I2C_IT - specifies the I2C interrupts sources to be enabled or disabled.
* I2C_IT_BUF - Buffer interrupt mask.
* I2C_IT_EVT - Event interrupt mask.
* I2C_IT_ERR - Error interrupt mask.
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_ITConfig(I2C_ITTypeDef I2C_IT, FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL2 |= I2C_IT;
else
R16_I2C_CTRL2 &= (uint16_t)~I2C_IT;
}
/*********************************************************************
* @fn I2C_SendData
*
* @brief Sends a data byte through the I2Cx peripheral.
*
* @param Data - Byte to be transmitted.
*
* @return none
*/
void I2C_SendData(uint8_t Data)
{
R16_I2C_DATAR = Data;
}
/*********************************************************************
* @fn I2C_ReceiveData
*
* @brief Returns the most recent received data by the I2Cx peripheral.
*
* @return The value of the received data.
*/
uint8_t I2C_ReceiveData(void)
{
return (uint8_t)R16_I2C_DATAR;
}
/*********************************************************************
* @fn I2C_Send7bitAddress
*
* @brief Transmits the address byte to select the slave device.
*
* @param Address - specifies the slave address which will be transmitted.
* @param I2C_Direction - specifies whether the I2C device will be a Transmitter or a Receiver.
* I2C_Direction_Transmitter - Transmitter mode.
* I2C_Direction_Receiver - Receiver mode.
*
* @return none
*/
void I2C_Send7bitAddress(uint8_t Address, uint8_t I2C_Direction)
{
if(I2C_Direction != I2C_Direction_Transmitter)
Address |= OADDR1_ADD0_Set;
else
Address &= OADDR1_ADD0_Reset;
R16_I2C_DATAR = Address;
}
/*********************************************************************
* @fn I2C_SoftwareResetCmd
*
* @brief Enables or disables the specified I2C software reset.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_SoftwareResetCmd(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_SWRST;
else
R16_I2C_CTRL1 &= ~RB_I2C_SWRST;
}
/*********************************************************************
* @fn I2C_NACKPositionConfig
*
* @brief Selects the specified I2C NACK position in master receiver mode.
*
* @param I2C_NACKPosition - specifies the NACK position.
* I2C_NACKPosition_Next - indicates that the next byte will be the last received byte.
* I2C_NACKPosition_Current - indicates that current byte is the last received byte.
*
* @return none
*/
void I2C_NACKPositionConfig(uint16_t I2C_NACKPosition)
{
if(I2C_NACKPosition == I2C_NACKPosition_Next)
R16_I2C_CTRL1 |= I2C_NACKPosition_Next;
else
R16_I2C_CTRL1 &= I2C_NACKPosition_Current;
}
/*********************************************************************
* @fn I2C_SMBusAlertConfig
*
* @brief Drives the SMBusAlert pin high or low for the specified I2C.
*
* @param I2C_SMBusAlert - specifies SMBAlert pin level.
* I2C_SMBusAlert_Low - SMBAlert pin driven low.
* I2C_SMBusAlert_High - SMBAlert pin driven high.
*
* @return none
*/
void I2C_SMBusAlertConfig(uint16_t I2C_SMBusAlert)
{
if(I2C_SMBusAlert == I2C_SMBusAlert_Low)
R16_I2C_CTRL1 |= I2C_SMBusAlert_Low;
else
R16_I2C_CTRL1 &= I2C_SMBusAlert_High;
}
/*********************************************************************
* @fn I2C_TransmitPEC
*
* @brief Enables or disables the specified I2C PEC transfer.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_TransmitPEC(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_PEC;
else
R16_I2C_CTRL1 &= ~RB_I2C_PEC;
}
/*********************************************************************
* @fn I2C_PECPositionConfig
*
* @brief Selects the specified I2C PEC position.
*
* @param I2C_PECPosition - specifies the PEC position.
* I2C_PECPosition_Next - indicates that the next byte is PEC.
* I2C_PECPosition_Current - indicates that current byte is PEC.
*
* @return none
*/
void I2C_PECPositionConfig(uint16_t I2C_PECPosition)
{
if(I2C_PECPosition == I2C_PECPosition_Next)
R16_I2C_CTRL1 |= I2C_PECPosition_Next;
else
R16_I2C_CTRL1 &= I2C_PECPosition_Current;
}
/*********************************************************************
* @fn I2C_CalculatePEC
*
* @brief Enables or disables the PEC value calculation of the transferred bytes.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_CalculatePEC(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_ENPEC;
else
R16_I2C_CTRL1 &= ~RB_I2C_ENPEC;
}
/*********************************************************************
* @fn I2C_GetPEC
*
* @brief Returns the PEC value for the specified I2C.
*
* @return The PEC value.
*/
uint8_t I2C_GetPEC(void)
{
return (R16_I2C_STAR2 >> 8);
}
/*********************************************************************
* @fn I2C_ARPCmd
*
* @brief Enables or disables the specified I2C ARP.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_ARPCmd(FunctionalState NewState)
{
if(NewState != DISABLE)
R16_I2C_CTRL1 |= RB_I2C_EBARP;
else
R16_I2C_CTRL1 &= ~RB_I2C_EBARP;
}
/*********************************************************************
* @fn I2C_StretchClockCmd
*
* @brief Enables or disables the specified I2C Clock stretching.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_StretchClockCmd(FunctionalState NewState)
{
if(NewState == DISABLE)
R16_I2C_CTRL1 |= RB_I2C_NOSTRETCH;
else
R16_I2C_CTRL1 &= ~RB_I2C_NOSTRETCH;
}
/*********************************************************************
* @fn I2C_FastModeDutyCycleConfig
*
* @brief Selects the specified I2C fast mode duty cycle.
*
* @param I2C_DutyCycle - specifies the fast mode duty cycle.
* I2C_DutyCycle_2 - I2C fast mode Tlow/Thigh = 2.
* I2C_DutyCycle_16_9 - I2C fast mode Tlow/Thigh = 16/9.
*
* @return none
*/
void I2C_FastModeDutyCycleConfig(uint16_t I2C_DutyCycle)
{
if(I2C_DutyCycle != I2C_DutyCycle_16_9)
R16_I2C_CKCFGR &= ~I2C_DutyCycle_16_9;
else
R16_I2C_CKCFGR |= I2C_DutyCycle_16_9;
}
/*********************************************************************
* @fn I2C_CheckEvent
*
* @brief Checks whether the last I2Cx Event is equal to the one passed as parameter.
*
* @param I2C_EVENT - specifies the event to be checked.
* I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1.
* I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1.
* I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1.
* I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1.
* I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1.
* I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2.
* (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2.
* (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2.
* I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3.
* (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3.
* (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3.
* I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2.
* I2C_EVENT_SLAVE_STOP_DETECTED : EV4.
* I2C_EVENT_MASTER_MODE_SELECT : EV5.
* I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6.
* I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6.
* I2C_EVENT_MASTER_BYTE_RECEIVED : EV7.
* I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8.
* I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2.
* I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9.
*
* @return 1 - SUCCESS or 0 - ERROR.
*/
uint8_t I2C_CheckEvent(uint32_t I2C_EVENT)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
uint8_t status = 0;
flag1 = R16_I2C_STAR1;
flag2 = R16_I2C_STAR2;
flag2 = flag2 << 16;
lastevent = (flag1 | flag2) & FLAG_Mask;
if((lastevent & I2C_EVENT) == I2C_EVENT)
{
status = !0;
}
else
{
status = 0;
}
return status;
}
/*********************************************************************
* @fn I2C_GetLastEvent
*
* @brief Returns the last I2Cx Event.
*
* @return The last event.
*/
uint32_t I2C_GetLastEvent(void)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
flag1 = R16_I2C_STAR1;
flag2 = R16_I2C_STAR2;
flag2 = flag2 << 16;
lastevent = (flag1 | flag2) & FLAG_Mask;
return lastevent;
}
/*********************************************************************
* @fn I2C_GetFlagStatus
*
* @brief Checks whether the last I2Cx Event is equal to the one passed as parameter.
*
* @param I2C_FLAG - specifies the flag to check.
* I2C_FLAG_DUALF - Dual flag (Slave mode).
* I2C_FLAG_SMBHOST - SMBus host header (Slave mode).
* I2C_FLAG_SMBDEFAULT - SMBus default header (Slave mode).
* I2C_FLAG_GENCALL - General call header flag (Slave mode).
* I2C_FLAG_TRA - Transmitter/Receiver flag.
* I2C_FLAG_BUSY - Bus busy flag.
* I2C_FLAG_MSL - Master/Slave flag.
* I2C_FLAG_SMBALERT - SMBus Alert flag.
* I2C_FLAG_TIMEOUT - Timeout or Tlow error flag.
* I2C_FLAG_PECERR - PEC error in reception flag.
* I2C_FLAG_OVR - Overrun/Underrun flag (Slave mode).
* I2C_FLAG_AF - Acknowledge failure flag.
* I2C_FLAG_ARLO - Arbitration lost flag (Master mode).
* I2C_FLAG_BERR - Bus error flag.
* I2C_FLAG_TXE - Data register empty flag (Transmitter).
* I2C_FLAG_RXNE - Data register not empty (Receiver) flag.
* I2C_FLAG_STOPF - Stop detection flag (Slave mode).
* I2C_FLAG_ADD10 - 10-bit header sent flag (Master mode).
* I2C_FLAG_BTF - Byte transfer finished flag.
* I2C_FLAG_ADDR - Address sent flag (Master mode) "ADSL"
* Address matched flag (Slave mode)"ENDA".
* I2C_FLAG_SB - Start bit flag (Master mode).
*
* @return FlagStatus - SET or RESET.
*/
FlagStatus I2C_GetFlagStatus(uint32_t I2C_FLAG)
{
FlagStatus bitstatus = RESET;
__IO uint32_t i2creg = 0, i2cxbase = 0;
i2cxbase = (uint32_t)BA_I2C;
i2creg = I2C_FLAG >> 28;
I2C_FLAG &= FLAG_Mask;
if(i2creg != 0)
{
i2cxbase += 0x14;
}
else
{
I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
i2cxbase += 0x18;
}
if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn I2C_ClearFlag
*
* @brief Clears the I2Cx's pending flags.
*
* @param I2C_FLAG - specifies the flag to clear.
* I2C_FLAG_SMBALERT - SMBus Alert flag.
* I2C_FLAG_TIMEOUT - Timeout or Tlow error flag.
* I2C_FLAG_PECERR - PEC error in reception flag.
* I2C_FLAG_OVR - Overrun/Underrun flag (Slave mode).
* I2C_FLAG_AF - Acknowledge failure flag.
* I2C_FLAG_ARLO - Arbitration lost flag (Master mode).
* I2C_FLAG_BERR - Bus error flag.
*
* @return none
*/
void I2C_ClearFlag(uint32_t I2C_FLAG)
{
uint32_t flagpos = 0;
flagpos = I2C_FLAG & FLAG_Mask;
R16_I2C_STAR1 = (uint16_t)~flagpos;
}
/*********************************************************************
* @fn I2C_GetITStatus
*
* @brief Checks whether the specified I2C interrupt has occurred or not.
*
* @param II2C_IT - specifies the interrupt source to check.
* I2C_FLAG_SMBALERT - SMBus Alert flag.
* I2C_FLAG_TIMEOUT - Timeout or Tlow error flag.
* I2C_FLAG_PECERR - PEC error in reception flag.
* I2C_FLAG_OVR - Overrun/Underrun flag (Slave mode).
* I2C_FLAG_AF - Acknowledge failure flag.
* I2C_FLAG_ARLO - Arbitration lost flag (Master mode).
* I2C_FLAG_BERR - Bus error flag.
* I2C_FLAG_TXE - Data register empty flag (Transmitter).
* I2C_FLAG_RXNE - Data register not empty (Receiver) flag.
* I2C_FLAG_STOPF - Stop detection flag (Slave mode).
* I2C_FLAG_ADD10 - 10-bit header sent flag (Master mode).
* I2C_FLAG_BTF - Byte transfer finished flag.
* I2C_FLAG_ADDR - Address sent flag (Master mode) "ADSL"
* Address matched flag (Slave mode)"ENDA".
* I2C_FLAG_SB - Start bit flag (Master mode).
*
* @return none
*/
ITStatus I2C_GetITStatus(uint32_t I2C_IT)
{
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (R16_I2C_CTRL2));
I2C_IT &= FLAG_Mask;
if(((R16_I2C_STAR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn I2C_ClearITPendingBit
*
* @brief Clears the I2Cx interrupt pending bits.
*
* @param I2C_IT - specifies the interrupt pending bit to clear.
* I2C_IT_SMBALERT - SMBus Alert interrupt.
* I2C_IT_TIMEOUT - Timeout or Tlow error interrupt.
* I2C_IT_PECERR - PEC error in reception interrupt.
* I2C_IT_OVR - Overrun/Underrun interrupt (Slave mode).
* I2C_IT_AF - Acknowledge failure interrupt.
* I2C_IT_ARLO - Arbitration lost interrupt (Master mode).
* I2C_IT_BERR - Bus error interrupt.
*
* @return none
*/
void I2C_ClearITPendingBit(uint32_t I2C_IT)
{
uint32_t flagpos = 0;
flagpos = I2C_IT & FLAG_Mask;
R16_I2C_STAR1 = (uint16_t)~flagpos;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_lcd.c
* Author : WCH
* Version : V1.0
* Date : 2018/12/15
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
#include "CH59x_lcd.h"
/*******************************************************************************
* Function Name : LCD_DefInit
* Description : LCD段式屏驱动初始化配置
* Input : duty 占空比
* bias 偏压比
* Return : None
*******************************************************************************/
void LCD_Init(LCDDutyTypeDef duty, LCDBiasTypeDef bias)
{
R32_PIN_CONFIG2 = 0xfffeff3f; // 关闭数字输入
R16_PIN_ALTERNATE |= RB_DEBUG_EN; // 操作LCD时，需关闭debug
R32_LCD_CMD = 0x1ffff << 8;
R32_LCD_CMD |= RB_LCD_SYS_EN | RB_LCD_ON |
(LCD_CLK_128 << 5) |
(duty << 3) |
(bias << 2);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_pwm.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn PWMX_CycleCfg
*
* @brief PWM4-PWM11周期配置
*
* @param cyc - refer to PWMX_CycleTypeDef
*
* @return none
*/
void PWMX_CycleCfg(PWMX_CycleTypeDef cyc)
{
switch(cyc)
{
case PWMX_Cycle_256:
R8_PWM_CONFIG = R8_PWM_CONFIG & 0xf0;
break;
case PWMX_Cycle_255:
R8_PWM_CONFIG = (R8_PWM_CONFIG & 0xf0) | 0x01;
break;
case PWMX_Cycle_128:
R8_PWM_CONFIG = (R8_PWM_CONFIG & 0xf0) | (1 << 2);
break;
case PWMX_Cycle_127:
R8_PWM_CONFIG = (R8_PWM_CONFIG & 0xf0) | (1 << 2) | 0x01;
break;
case PWMX_Cycle_64:
R8_PWM_CONFIG = (R8_PWM_CONFIG & 0xf0) | (2 << 2);
break;
case PWMX_Cycle_63:
R8_PWM_CONFIG = (R8_PWM_CONFIG & 0xf0) | (2 << 2) | 0x01;
break;
default:
break;
}
}
/*********************************************************************
* @fn PWMX_16bit_CycleCfg
*
* @brief PWM4-PWM9 16位周期配置
*
* @param cyc - 16位周期
*
* @return none
*/
void PWMX_16bit_CycleCfg(uint16_t cyc)
{
R8_PWM_CONFIG = (R8_PWM_CONFIG & 0xf0) | (3 << 2);
R32_PWM_REG_CYCLE = cyc;
}
/*********************************************************************
* @fn PWMX_16bit_ACTOUT
*
* @brief PWM4-PWM9 通道16位输出波形配置
*
* @param ch - select channel of pwm, refer to channel of PWM define
* @param da - effective pulse width
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param s - control pwmx function, ENABLE or DISABLE
*
* @return none
*/
void PWMX_16bit_ACTOUT(uint8_t ch, uint16_t da, PWMX_PolarTypeDef pr, FunctionalState s)
{
uint8_t i;
if(s == DISABLE)
{
R8_PWM_OUT_EN &= ~(ch);
}
else
{
(pr) ? (R8_PWM_POLAR |= (ch)) : (R8_PWM_POLAR &= ~(ch));
for(i = 0; i < 6; i++)
{
if((ch >> i) & 1)
{
if(i<4)
{
*((volatile uint16_t *)((&R16_PWM4_DATA) + i)) = da;
}
else
{
*((volatile uint16_t *)((&R16_PWM8_DATA) + (i-4))) = da;
}
}
}
R8_PWM_OUT_EN |= (ch);
}
}
/*********************************************************************
* @fn PWMX_ACTOUT
*
* @brief PWM4-PWM11通道输出波形配置
*
* @param ch - select channel of pwm, refer to channel of PWM define
* @param da - effective pulse width
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param s - control pwmx function, ENABLE or DISABLE
*
* @return none
*/
void PWMX_ACTOUT(uint8_t ch, uint8_t da, PWMX_PolarTypeDef pr, FunctionalState s)
{
uint8_t i;
if(s == DISABLE)
{
R8_PWM_OUT_EN &= ~(ch);
}
else
{
(pr) ? (R8_PWM_POLAR |= (ch)) : (R8_PWM_POLAR &= ~(ch));
for(i = 0; i < 8; i++)
{
if((ch >> i) & 1)
{
*((volatile uint8_t *)((&R8_PWM4_DATA) + i)) = da;
}
}
R8_PWM_OUT_EN |= (ch);
}
}
/*********************************************************************
* @fn PWMX_AlterOutCfg
*
* @brief PWM 交替输出模式配置
*
* @param ch - select group of PWM alternate output
* RB_PWM4_5_STAG_EN - PWM4 和 PWM5 通道交替输出
* RB_PWM6_7_STAG_EN - PWM6 和 PWM7 通道交替输出
* RB_PWM8_9_STAG_EN - PWM8 和 PWM9 通道交替输出
* RB_PWM10_11_STAG_EN - PWM10 和 PWM11 通道交替输出
* @param s - control pwmx function, ENABLE or DISABLE
*
* @return none
*/
void PWMX_AlterOutCfg(uint8_t ch, FunctionalState s)
{
if(s == DISABLE)
{
R8_PWM_CONFIG &= ~(ch);
}
else
{
R8_PWM_CONFIG |= (ch);
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_pwr.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn PWR_DCDCCfg
*
* @brief 启用内部DC/DC电源，用于节约系统功耗
*
* @param s - 是否打开DCDC电源
*
* @return none
*/
void PWR_DCDCCfg(FunctionalState s)
{
uint16_t adj = R16_AUX_POWER_ADJ;
uint16_t plan = R16_POWER_PLAN;
if(s == DISABLE)
{
adj &= ~RB_DCDC_CHARGE;
plan &= ~(RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE); // 旁路 DC/DC
sys_safe_access_enable();
R16_AUX_POWER_ADJ = adj;
R16_POWER_PLAN = plan;
sys_safe_access_disable();
}
else
{
uint32_t HW_Data[2];
FLASH_EEPROM_CMD(CMD_GET_ROM_INFO, ROM_CFG_ADR_HW, HW_Data, 0);
if((HW_Data[0]) & (1 << 13))
{
return;
}
adj |= RB_DCDC_CHARGE;
plan |= RB_PWR_DCDC_PRE;
sys_safe_access_enable();
R16_AUX_POWER_ADJ = adj;
R16_POWER_PLAN = plan;
sys_safe_access_disable();
DelayUs(10);
sys_safe_access_enable();
R16_POWER_PLAN |= RB_PWR_DCDC_EN;
sys_safe_access_disable();
}
}
/*********************************************************************
* @fn PWR_UnitModCfg
*
* @brief 可控单元模块的电源控制
*
* @param s - 是否打开电源
* @param unit - please refer to unit of controllable power supply
*
* @return none
*/
void PWR_UnitModCfg(FunctionalState s, uint8_t unit)
{
uint8_t ck32k_cfg = R8_CK32K_CONFIG;
if(s == DISABLE) //关闭
{
ck32k_cfg &= ~(unit & 0x03);
}
else //打开
{
ck32k_cfg |= (unit & 0x03);
}
sys_safe_access_enable();
R8_CK32K_CONFIG = ck32k_cfg;
sys_safe_access_disable();
}
/*********************************************************************
* @fn PWR_PeriphClkCfg
*
* @brief 外设时钟控制位
*
* @param s - 是否打开对应外设时钟
* @param perph - please refer to Peripher CLK control bit define
*
* @return none
*/
void PWR_PeriphClkCfg(FunctionalState s, uint16_t perph)
{
uint32_t sleep_ctrl = R32_SLEEP_CONTROL;
if(s == DISABLE)
{
sleep_ctrl |= perph;
}
else
{
sleep_ctrl &= ~perph;
}
sys_safe_access_enable();
R32_SLEEP_CONTROL = sleep_ctrl;
sys_safe_access_disable();
}
/*********************************************************************
* @fn PWR_PeriphWakeUpCfg
*
* @brief 睡眠唤醒源配置
*
* @param s - 是否打开此外设睡眠唤醒功能
* @param perph - 需要设置的唤醒源
* RB_SLP_USB_WAKE - USB 为唤醒源
* RB_SLP_RTC_WAKE - RTC 为唤醒源
* RB_SLP_GPIO_WAKE - GPIO 为唤醒源
* RB_SLP_BAT_WAKE - BAT 为唤醒源
* @param mode - refer to WakeUP_ModeypeDef
*
* @return none
*/
void PWR_PeriphWakeUpCfg(FunctionalState s, uint8_t perph, WakeUP_ModeypeDef mode)
{
uint8_t m;
if(s == DISABLE)
{
sys_safe_access_enable();
R8_SLP_WAKE_CTRL &= ~perph;
sys_safe_access_disable();
if(perph & RB_SLP_GPIO_WAKE)
{
sys_safe_access_enable();
R8_SLP_WAKE_CTRL &= ~RB_GPIO_WAKE_MODE;
sys_safe_access_disable();
}
}
else
{
switch(mode)
{
case Short_Delay:
m = 0x01;
break;
case Long_Delay:
m = 0x00;
break;
default:
m = 0x01;
break;
}
sys_safe_access_enable();
R8_SLP_WAKE_CTRL |= RB_WAKE_EV_MODE | perph;
sys_safe_access_disable();
if(perph & RB_SLP_GPIO_WAKE)
{
sys_safe_access_enable();
R8_SLP_WAKE_CTRL |= RB_GPIO_WAKE_MODE;
sys_safe_access_disable();
}
sys_safe_access_enable();
R8_SLP_POWER_CTRL &= ~(RB_WAKE_DLY_MOD);
sys_safe_access_disable();
sys_safe_access_enable();
R8_SLP_POWER_CTRL |= m;
sys_safe_access_disable();
}
}
/*********************************************************************
* @fn PowerMonitor
*
* @brief 电源监控
*
* @param s - 是否打开此功能
* @param vl - refer to VolM_LevelypeDef
*
* @return none
*/
void PowerMonitor(FunctionalState s, VolM_LevelypeDef vl)
{
uint8_t ctrl = R8_BAT_DET_CTRL;
uint8_t cfg = R8_BAT_DET_CFG;
if(s == DISABLE)
{
sys_safe_access_enable();
R8_BAT_DET_CTRL = 0;
sys_safe_access_disable();
}
else
{
if(vl & 0x80)
{
cfg = vl & 0x03;
ctrl = RB_BAT_MON_EN | ((vl >> 2) & 1);
}
else
{
cfg = vl & 0x03;
ctrl = RB_BAT_DET_EN;
}
sys_safe_access_enable();
R8_BAT_DET_CTRL = ctrl;
R8_BAT_DET_CFG = cfg;
sys_safe_access_disable();
mDelayuS(1);
sys_safe_access_enable();
R8_BAT_DET_CTRL |= RB_BAT_LOW_IE | RB_BAT_LOWER_IE;
sys_safe_access_disable();
}
}
/*********************************************************************
* @fn LowPower_Idle
*
* @brief 低功耗-Idle模式
*
* @param none
*
* @return none
*/
__HIGH_CODE
void LowPower_Idle(void)
{
FLASH_ROM_SW_RESET();
R8_FLASH_CTRL = 0x04; //flash关闭
PFIC->SCTLR &= ~(1 << 2); // sleep
__WFI();
__nop();
__nop();
}
/*********************************************************************
* @fn LowPower_Halt
*
* @brief 低功耗-Halt模式，此低功耗切到HSI/5时钟运行，唤醒后需要用户自己重新选择系统时钟源
*
* @param none
*
* @return none
*/
__HIGH_CODE
void LowPower_Halt(void)
{
uint8_t x32Kpw, x32Mpw;
FLASH_ROM_SW_RESET();
R8_FLASH_CTRL = 0x04; //flash关闭
x32Kpw = R8_XT32K_TUNE;
x32Mpw = R8_XT32M_TUNE;
x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%额定电流
x32Kpw = (x32Kpw & 0xfc) | 0x01; // LSE驱动电流降低到额定电流
sys_safe_access_enable();
R8_BAT_DET_CTRL = 0; // 关闭电压监控
sys_safe_access_disable();
sys_safe_access_enable();
R8_XT32K_TUNE = x32Kpw;
R8_XT32M_TUNE = x32Mpw;
sys_safe_access_disable();
sys_safe_access_enable();
R8_PLL_CONFIG |= (1 << 5);
sys_safe_access_disable();
PFIC->SCTLR |= (1 << 2); //deep sleep
__WFI();
__nop();
__nop();
sys_safe_access_enable();
R8_PLL_CONFIG &= ~(1 << 5);
sys_safe_access_disable();
}
/*******************************************************************************
* Function Name : LowPower_Sleep
* Description : 低功耗-Sleep模式。
注意当主频为80M时，睡眠唤醒中断不可调用flash内代码，且退出此函数前需要加上30us延迟。
* Input : rm:
RB_PWR_RAM2K - 2K retention SRAM 供电
RB_PWR_RAM24K - 24K main SRAM 供电
RB_PWR_EXTEND - USB 和 BLE 单元保留区域供电
RB_PWR_XROM - FlashROM 供电
NULL - 以上单元都断电
* Return : None
*******************************************************************************/
__HIGH_CODE
void LowPower_Sleep(uint16_t rm)
{
__attribute__((aligned(4))) uint8_t MacAddr[6] = {0};
uint8_t x32Kpw, x32Mpw;
uint16_t power_plan;
GetMACAddress(MacAddr);
x32Kpw = R8_XT32K_TUNE;
x32Mpw = R8_XT32M_TUNE;
x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%额定电流
x32Kpw = (x32Kpw & 0xfc) | 0x01; // LSE驱动电流降低到额定电流
sys_safe_access_enable();
R8_BAT_DET_CTRL = 0; // 关闭电压监控
sys_safe_access_disable();
sys_safe_access_enable();
R8_XT32K_TUNE = x32Kpw;
R8_XT32M_TUNE = x32Mpw;
sys_safe_access_disable();
sys_safe_access_enable();
R16_POWER_PLAN &= ~RB_XT_PRE_EN;
sys_safe_access_disable();
PFIC->SCTLR |= (1 << 2); //deep sleep
power_plan = R16_POWER_PLAN & (RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE);
power_plan |= RB_PWR_PLAN_EN | RB_PWR_CORE | rm | (2<<11);
sys_safe_access_enable();
R8_SLP_POWER_CTRL |= RB_RAM_RET_LV;
R16_POWER_PLAN = power_plan;
sys_safe_access_disable();
if((rm & RB_XT_PRE_EN) == 0)
{
sys_safe_access_enable();
R8_PLL_CONFIG |= (1 << 5);
sys_safe_access_disable();
}
__WFI();
__nop();
__nop();
sys_safe_access_enable();
R16_POWER_PLAN &= ~RB_XT_PRE_EN;
sys_safe_access_disable();
if((rm & RB_XT_PRE_EN) == 0)
{
sys_safe_access_enable();
R8_PLL_CONFIG &= ~(1 << 5);
sys_safe_access_disable();
DelayUs(20);
}
}
/*********************************************************************
* @fn LowPower_Shutdown
*
* @brief 低功耗-Shutdown模式，此低功耗切到HSI/5时钟运行，唤醒后需要用户自己重新选择系统时钟源
* @note 注意调用此函数，DCDC功能强制关闭，唤醒后可以手动再次打开
*
* @param rm - 供电模块选择
* RB_PWR_RAM2K - 2K retention SRAM 供电
* RB_PWR_RAM16K - 16K main SRAM 供电
* NULL - 以上单元都断电
*
* @return none
*/
__HIGH_CODE
void LowPower_Shutdown(uint16_t rm)
{
uint8_t x32Kpw, x32Mpw;
FLASH_ROM_SW_RESET();
x32Kpw = R8_XT32K_TUNE;
x32Mpw = R8_XT32M_TUNE;
x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%额定电流
x32Kpw = (x32Kpw & 0xfc) | 0x01; // LSE驱动电流降低到额定电流
sys_safe_access_enable();
R8_BAT_DET_CTRL = 0; // 关闭电压监控
sys_safe_access_disable();
sys_safe_access_enable();
R8_XT32K_TUNE = x32Kpw;
R8_XT32M_TUNE = x32Mpw;
sys_safe_access_disable();
SetSysClock(CLK_SOURCE_HSE_6_4MHz);
PFIC->SCTLR |= (1 << 2); //deep sleep
sys_safe_access_enable();
R8_SLP_POWER_CTRL |= RB_RAM_RET_LV;
sys_safe_access_disable();
sys_safe_access_enable();
R16_POWER_PLAN = RB_PWR_PLAN_EN | rm;
sys_safe_access_disable();
__WFI();
__nop();
__nop();
FLASH_ROM_SW_RESET();
sys_safe_access_enable();
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
sys_safe_access_disable();
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_SPI0.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn SPI0_MasterDefInit
*
* @brief 主机模式默认初始化：模式0+3线全双工+8MHz
*
* @param none
*
* @return none
*/
void SPI0_MasterDefInit(void)
{
R8_SPI0_CLOCK_DIV = 4; // 主频时钟4分频
R8_SPI0_CTRL_MOD = RB_SPI_ALL_CLEAR;
R8_SPI0_CTRL_MOD = RB_SPI_MOSI_OE | RB_SPI_SCK_OE;
R8_SPI0_CTRL_CFG |= RB_SPI_AUTO_IF; // 访问BUFFER/FIFO自动清除IF_BYTE_END标志
R8_SPI0_CTRL_CFG &= ~RB_SPI_DMA_ENABLE; // 不启动DMA方式
}
/*********************************************************************
* @fn SPI0_CLKCfg
*
* @brief SPI0 基准时钟配置，= d*Tsys
*
* @param c - 时钟分频系数
*
* @return none
*/
void SPI0_CLKCfg(uint8_t c)
{
if(c == 2)
{
R8_SPI0_CTRL_CFG |= RB_SPI_MST_DLY_EN;
}
else
{
R8_SPI0_CTRL_CFG &= ~RB_SPI_MST_DLY_EN;
}
R8_SPI0_CLOCK_DIV = c;
}
/*********************************************************************
* @fn SPI0_DataMode
*
* @brief 设置数据流模式
*
* @param m - 数据流模式 refer to ModeBitOrderTypeDef
*
* @return none
*/
void SPI0_DataMode(ModeBitOrderTypeDef m)
{
switch(m)
{
case Mode0_LowBitINFront:
R8_SPI0_CTRL_MOD &= ~RB_SPI_MST_SCK_MOD;
R8_SPI0_CTRL_CFG |= RB_SPI_BIT_ORDER;
break;
case Mode0_HighBitINFront:
R8_SPI0_CTRL_MOD &= ~RB_SPI_MST_SCK_MOD;
R8_SPI0_CTRL_CFG &= ~RB_SPI_BIT_ORDER;
break;
case Mode3_LowBitINFront:
R8_SPI0_CTRL_MOD |= RB_SPI_MST_SCK_MOD;
R8_SPI0_CTRL_CFG |= RB_SPI_BIT_ORDER;
break;
case Mode3_HighBitINFront:
R8_SPI0_CTRL_MOD |= RB_SPI_MST_SCK_MOD;
R8_SPI0_CTRL_CFG &= ~RB_SPI_BIT_ORDER;
break;
default:
break;
}
}
/*********************************************************************
* @fn SPI0_MasterSendByte
*
* @brief 发送单字节 (buffer)
*
* @param d - 发送字节
*
* @return none
*/
void SPI0_MasterSendByte(uint8_t d)
{
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR;
R8_SPI0_BUFFER = d;
while(!(R8_SPI0_INT_FLAG & RB_SPI_FREE));
}
/*********************************************************************
* @fn SPI0_MasterRecvByte
*
* @brief 接收单字节 (buffer)
*
* @param none
*
* @return 接收到的字节
*/
uint8_t SPI0_MasterRecvByte(void)
{
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR;
R8_SPI0_BUFFER = 0xFF; // 启动传输
while(!(R8_SPI0_INT_FLAG & RB_SPI_FREE));
return (R8_SPI0_BUFFER);
}
/*********************************************************************
* @fn SPI0_MasterTrans
*
* @brief 使用FIFO连续发送多字节
*
* @param pbuf - 待发送的数据内容首地址
* @param len - 请求发送的数据长度，最大4095
*
* @return none
*/
void SPI0_MasterTrans(uint8_t *pbuf, uint16_t len)
{
uint16_t sendlen;
sendlen = len;
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR; // 设置数据方向为输出
R16_SPI0_TOTAL_CNT = sendlen; // 设置要发送的数据长度
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END;
while(sendlen)
{
if(R8_SPI0_FIFO_COUNT < SPI_FIFO_SIZE)
{
R8_SPI0_FIFO = *pbuf;
pbuf++;
sendlen--;
}
}
while(R8_SPI0_FIFO_COUNT != 0); // 等待FIFO中的数据全部发送完成
}
/*********************************************************************
* @fn SPI0_MasterRecv
*
* @brief 使用FIFO连续接收多字节
*
* @param pbuf - 待接收的数据首地址
* @param len - 待接收的数据长度，最大4095
*
* @return none
*/
void SPI0_MasterRecv(uint8_t *pbuf, uint16_t len)
{
uint16_t readlen;
readlen = len;
R8_SPI0_CTRL_MOD |= RB_SPI_FIFO_DIR; // 设置数据方向为输入
R16_SPI0_TOTAL_CNT = len; // 设置需要接收的数据长度，FIFO方向为输入长度不为0则会启动传输 */
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END;
while(readlen)
{
if(R8_SPI0_FIFO_COUNT)
{
*pbuf = R8_SPI0_FIFO;
pbuf++;
readlen--;
}
}
}
/*********************************************************************
* @fn SPI0_MasterDMATrans
*
* @brief DMA方式连续发送数据
*
* @param pbuf - 待发送数据起始地址,需要四字节对其
* @param len - 待发送数据长度
*
* @return none
*/
void SPI0_MasterDMATrans(uint8_t *pbuf, uint16_t len)
{
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR;
R16_SPI0_DMA_BEG = (uint32_t)pbuf;
R16_SPI0_DMA_END = (uint32_t)(pbuf + len);
R16_SPI0_TOTAL_CNT = len;
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END | RB_SPI_IF_DMA_END;
R8_SPI0_CTRL_CFG |= RB_SPI_DMA_ENABLE;
while(!(R8_SPI0_INT_FLAG & RB_SPI_IF_CNT_END));
R8_SPI0_CTRL_CFG &= ~RB_SPI_DMA_ENABLE;
}
/*********************************************************************
* @fn SPI0_MasterDMARecv
*
* @brief DMA方式连续接收数据
*
* @param pbuf - 待接收数据存放起始地址,需要四字节对其
* @param len - 待接收数据长度
*
* @return none
*/
void SPI0_MasterDMARecv(uint8_t *pbuf, uint16_t len)
{
R8_SPI0_CTRL_MOD |= RB_SPI_FIFO_DIR;
R16_SPI0_DMA_BEG = (uint32_t)pbuf;
R16_SPI0_DMA_END = (uint32_t)(pbuf + len);
R16_SPI0_TOTAL_CNT = len;
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END | RB_SPI_IF_DMA_END;
R8_SPI0_CTRL_CFG |= RB_SPI_DMA_ENABLE;
while(!(R8_SPI0_INT_FLAG & RB_SPI_IF_CNT_END));
R8_SPI0_CTRL_CFG &= ~RB_SPI_DMA_ENABLE;
}
/*********************************************************************
* @fn SPI0_SlaveInit
*
* @brief 设备模式默认初始化，建议设置MISO的GPIO对应为输入模式
*
* @return none
*/
void SPI0_SlaveInit(void)
{
R8_SPI0_CTRL_MOD = RB_SPI_ALL_CLEAR;
R8_SPI0_CTRL_MOD = RB_SPI_MISO_OE | RB_SPI_MODE_SLAVE;
R8_SPI0_CTRL_CFG |= RB_SPI_AUTO_IF;
}
/*********************************************************************
* @fn SPI0_SlaveRecvByte
*
* @brief 从机模式，接收一字节数据
*
* @return 接收到数据
*/
uint8_t SPI0_SlaveRecvByte(void)
{
R8_SPI0_CTRL_MOD |= RB_SPI_FIFO_DIR;
while(R8_SPI0_FIFO_COUNT == 0);
return R8_SPI0_FIFO;
}
/*********************************************************************
* @fn SPI0_SlaveSendByte
*
* @brief 从机模式，发送一字节数据
*
* @param d - 待发送数据
*
* @return none
*/
void SPI0_SlaveSendByte(uint8_t d)
{
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR;
R8_SPI0_FIFO = d;
while(R8_SPI0_FIFO_COUNT != 0); // 等待发送完成
}
/*********************************************************************
* @fn SPI0_SlaveRecv
*
* @brief 从机模式，接收多字节数据
*
* @param pbuf - 接收收数据存放起始地址
* @param len - 请求接收数据长度
*
* @return none
*/
__HIGH_CODE
void SPI0_SlaveRecv(uint8_t *pbuf, uint16_t len)
{
uint16_t revlen;
revlen = len;
R8_SPI0_CTRL_MOD |= RB_SPI_FIFO_DIR;
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END;
while(revlen)
{
if(R8_SPI0_FIFO_COUNT)
{
*pbuf = R8_SPI0_FIFO;
pbuf++;
revlen--;
}
}
}
/*********************************************************************
* @fn SPI0_SlaveTrans
*
* @brief 从机模式，发送多字节数据
*
* @param pbuf - 待发送的数据内容首地址
* @param len - 请求发送的数据长度，最大4095
*
* @return none
*/
__HIGH_CODE
void SPI0_SlaveTrans(uint8_t *pbuf, uint16_t len)
{
uint16_t sendlen;
sendlen = len;
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR; // 设置数据方向为输出
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END;
while(sendlen)
{
if(R8_SPI0_FIFO_COUNT < SPI_FIFO_SIZE)
{
R8_SPI0_FIFO = *pbuf;
pbuf++;
sendlen--;
}
}
while(R8_SPI0_FIFO_COUNT != 0); // 等待FIFO中的数据全部发送完成
}
/*********************************************************************
* @fn SPI0_SlaveDMARecv
*
* @brief DMA方式连续接收数据
*
* @param pbuf - 待接收数据存放起始地址,需要四字节对其
* @param len - 待接收数据长度
*
* @return none
*/
void SPI0_SlaveDMARecv(uint8_t *pbuf, uint16_t len)
{
R8_SPI0_CTRL_MOD |= RB_SPI_FIFO_DIR;
R16_SPI0_DMA_BEG = (uint32_t)pbuf;
R16_SPI0_DMA_END = (uint32_t)(pbuf + len);
R16_SPI0_TOTAL_CNT = len;
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END | RB_SPI_IF_DMA_END;
R8_SPI0_CTRL_CFG |= RB_SPI_DMA_ENABLE;
while(!(R8_SPI0_INT_FLAG & RB_SPI_IF_CNT_END));
R8_SPI0_CTRL_CFG &= ~RB_SPI_DMA_ENABLE;
}
/*********************************************************************
* @fn SPI0_SlaveDMATrans
*
* @brief DMA方式连续发送数据
*
* @param pbuf - 待发送数据起始地址,需要四字节对其
* @param len - 待发送数据长度
*
* @return none
*/
void SPI0_SlaveDMATrans(uint8_t *pbuf, uint16_t len)
{
R8_SPI0_CTRL_MOD &= ~RB_SPI_FIFO_DIR;
R16_SPI0_DMA_BEG = (uint32_t)pbuf;
R16_SPI0_DMA_END = (uint32_t)(pbuf + len);
R16_SPI0_TOTAL_CNT = len;
R8_SPI0_INT_FLAG = RB_SPI_IF_CNT_END | RB_SPI_IF_DMA_END;
R8_SPI0_CTRL_CFG |= RB_SPI_DMA_ENABLE;
while(!(R8_SPI0_INT_FLAG & RB_SPI_IF_CNT_END));
R8_SPI0_CTRL_CFG &= ~RB_SPI_DMA_ENABLE;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_SYS.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn SetSysClock
*
* @brief 配置系统运行时钟
*
* @param sc - 系统时钟源选择 refer to SYS_CLKTypeDef
*
* @return none
*/
__HIGH_CODE
void SetSysClock(SYS_CLKTypeDef sc)
{
sys_safe_access_enable();
R8_PLL_CONFIG &= ~(1 << 5); //
sys_safe_access_disable();
if(sc & 0x20) // HSE div
{
sys_safe_access_enable();
R32_CLK_SYS_CFG = (0 << 6) | (sc & 0x1f) | RB_TX_32M_PWR_EN | RB_PLL_PWR_EN;
__nop();
__nop();
__nop();
__nop();
sys_safe_access_disable();
sys_safe_access_enable();
SAFEOPERATE;
R8_FLASH_CFG = 0X51;
sys_safe_access_disable();
}
else if(sc & 0x40) // PLL div
{
sys_safe_access_enable();
R32_CLK_SYS_CFG = (1 << 6) | (sc & 0x1f) | RB_TX_32M_PWR_EN | RB_PLL_PWR_EN;
__nop();
__nop();
__nop();
__nop();
sys_safe_access_disable();
sys_safe_access_enable();
R8_FLASH_CFG = 0X52;
sys_safe_access_disable();
}
else
{
sys_safe_access_enable();
R32_CLK_SYS_CFG |= RB_CLK_SYS_MOD;
sys_safe_access_disable();
}
//更改FLASH clk的驱动能力
sys_safe_access_enable();
R8_PLL_CONFIG |= 1 << 7;
sys_safe_access_disable();
}
/*********************************************************************
* @fn GetSysClock
*
* @brief 获取当前系统时钟
*
* @param none
*
* @return Hz
*/
uint32_t GetSysClock(void)
{
uint16_t rev;
rev = R32_CLK_SYS_CFG & 0xff;
if((rev & 0x40) == (0 << 6))
{ // 32M进行分频
return (32000000 / (rev & 0x1f));
}
else if((rev & RB_CLK_SYS_MOD) == (1 << 6))
{ // PLL进行分频
return (480000000 / (rev & 0x1f));
}
else
{ // 32K做主频
return (32000);
}
}
/*********************************************************************
* @fn SYS_GetInfoSta
*
* @brief 获取当前系统信息状态
*
* @param i - refer to SYS_InfoStaTypeDef
*
* @return 是否开启
*/
uint8_t SYS_GetInfoSta(SYS_InfoStaTypeDef i)
{
if(i == STA_SAFEACC_ACT)
{
return (R8_SAFE_ACCESS_SIG & RB_SAFE_ACC_ACT);
}
else
{
return (R8_GLOB_CFG_INFO & (1 << i));
}
}
/*********************************************************************
* @fn SYS_ResetExecute
*
* @brief 执行系统软件复位
*
* @param none
*
* @return none
*/
__HIGH_CODE
void SYS_ResetExecute(void)
{
FLASH_ROM_SW_RESET();
sys_safe_access_enable();
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
sys_safe_access_disable();
}
/*********************************************************************
* @fn SYS_DisableAllIrq
*
* @brief 关闭所有中断，并保留当前中断值
*
* @param pirqv - 当前保留中断值
*
* @return none
*/
void SYS_DisableAllIrq(uint32_t *pirqv)
{
*pirqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24);
PFIC->IRER[0] = 0xffffffff;
PFIC->IRER[1] = 0xffffffff;
}
/*********************************************************************
* @fn SYS_RecoverIrq
*
* @brief 恢复之前关闭的中断值
*
* @param irq_status - 当前保留中断值
*
* @return none
*/
void SYS_RecoverIrq(uint32_t irq_status)
{
PFIC->IENR[0] = (irq_status << 8);
PFIC->IENR[1] = (irq_status >> 24);
}
/*********************************************************************
* @fn SYS_GetSysTickCnt
*
* @brief 获取当前系统(SYSTICK)计数值
*
* @param none
*
* @return 当前计数值
*/
uint32_t SYS_GetSysTickCnt(void)
{
uint32_t val;
val = SysTick->CNT;
return (val);
}
/*********************************************************************
* @fn WWDG_ITCfg
*
* @brief 看门狗定时器溢出中断使能
*
* @param s - 溢出是否中断
*
* @return none
*/
void WWDG_ITCfg(FunctionalState s)
{
uint8_t ctrl = R8_RST_WDOG_CTRL;
if(s == DISABLE)
{
ctrl &= ~RB_WDOG_INT_EN;
}
else
{
ctrl |= RB_WDOG_INT_EN;
}
sys_safe_access_enable();
R8_RST_WDOG_CTRL = ctrl;
sys_safe_access_disable();
}
/*********************************************************************
* @fn WWDG_ResetCfg
*
* @brief 看门狗定时器复位功能
*
* @param s - 溢出是否复位
*
* @return none
*/
void WWDG_ResetCfg(FunctionalState s)
{
uint8_t ctrl = R8_RST_WDOG_CTRL;
if(s == DISABLE)
{
ctrl &= ~RB_WDOG_RST_EN;
}
else
{
ctrl |= RB_WDOG_RST_EN;
}
sys_safe_access_enable();
R8_RST_WDOG_CTRL = ctrl;
sys_safe_access_disable();
}
/*********************************************************************
* @fn WWDG_ClearFlag
*
* @brief 清除看门狗中断标志，重新加载计数值也可清除
*
* @param none
*
* @return none
*/
void WWDG_ClearFlag(void)
{
sys_safe_access_enable();
R8_RST_WDOG_CTRL |= RB_WDOG_INT_FLAG;
sys_safe_access_disable();
}
/*********************************************************************
* @fn HardFault_Handler
*
* @brief 硬件错误中断，进入后执行复位，复位类型为上电复位
*
* @param none
*
* @return none
*/
__INTERRUPT
__HIGH_CODE
__attribute__((weak))
void HardFault_Handler(void)
{
FLASH_ROM_SW_RESET();
sys_safe_access_enable();
R16_INT32K_TUNE = 0xFFFF;
sys_safe_access_disable();
sys_safe_access_enable();
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
sys_safe_access_disable();
while(1);
}
/*********************************************************************
* @fn mDelayuS
*
* @brief uS 延时
*
* @param t - 时间参数
*
* @return none
*/
__HIGH_CODE
void mDelayuS(uint16_t t)
{
uint32_t i;
#if(FREQ_SYS == 80000000)
i = t * 20;
#elif(FREQ_SYS == 60000000)
i = t * 15;
#elif(FREQ_SYS == 48000000)
i = t * 12;
#elif(FREQ_SYS == 40000000)
i = t * 10;
#elif(FREQ_SYS == 32000000)
i = t << 3;
#elif(FREQ_SYS == 24000000)
i = t * 6;
#elif(FREQ_SYS == 16000000)
i = t << 2;
#elif(FREQ_SYS == 8000000)
i = t << 1;
#elif(FREQ_SYS == 4000000)
i = t;
#elif(FREQ_SYS == 2000000)
i = t >> 1;
#elif(FREQ_SYS == 1000000)
i = t >> 2;
#else
i = t << 1;
#endif
do
{
__nop();
} while(--i);
}
/*********************************************************************
* @fn mDelaymS
*
* @brief mS 延时
*
* @param t - 时间参数
*
* @return none
*/
__HIGH_CODE
void mDelaymS(uint16_t t)
{
uint16_t i;
for(i = 0; i < t; i++)
{
mDelayuS(1000);
}
}
#ifdef DEBUG
int _write(int fd, char *buf, int size)
{
int i;
for(i = 0; i < size; i++)
{
#if DEBUG == Debug_UART0
while(R8_UART0_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
R8_UART0_THR = *buf++; /* 发送数据 */
#elif DEBUG == Debug_UART1
while(R8_UART1_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
R8_UART1_THR = *buf++; /* 发送数据 */
#elif DEBUG == Debug_UART2
while(R8_UART2_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
R8_UART2_THR = *buf++; /* 发送数据 */
#elif DEBUG == Debug_UART3
while(R8_UART3_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
R8_UART3_THR = *buf++; /* 发送数据 */
#endif
}
return size;
}
#endif

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_timer0.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn TMR0_TimerInit
*
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*
* @return none
*/
void TMR0_TimerInit(uint32_t t)
{
R32_TMR0_CNT_END = t;
R8_TMR0_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR0_CTRL_MOD = RB_TMR_COUNT_EN;
}
/*********************************************************************
* @fn TMR0_EXTSingleCounterInit
*
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*
* @return none
*/
void TMR0_EXTSingleCounterInit(CapModeTypeDef cap)
{
R8_TMR0_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR0_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_CAP_COUNT | RB_TMR_MODE_IN | (cap << 6);
}
/*********************************************************************
* @fn TMR0_PWMInit
*
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*
* @return none
*/
void TMR0_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts)
{
R8_TMR0_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR0_CTRL_MOD = (pr << 4) | (ts << 6);
}
/*********************************************************************
* @fn TMR0_CapInit
*
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*
* @return none
*/
void TMR0_CapInit(CapModeTypeDef cap)
{
R8_TMR0_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR0_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_MODE_IN | (cap << 6);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_timer1.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn TMR1_TimerInit
*
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*
* @return none
*/
void TMR1_TimerInit(uint32_t t)
{
R32_TMR1_CNT_END = t;
R8_TMR1_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR1_CTRL_MOD = RB_TMR_COUNT_EN;
}
/*********************************************************************
* @fn TMR1_EXTSingleCounterInit
*
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*
* @return none
*/
void TMR1_EXTSingleCounterInit(CapModeTypeDef cap)
{
R8_TMR1_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR1_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_CAP_COUNT | RB_TMR_MODE_IN | (cap << 6);
}
/*********************************************************************
* @fn TMR1_PWMInit
*
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*
* @return none
*/
void TMR1_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts)
{
R8_TMR1_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR1_CTRL_MOD = (pr << 4) | (ts << 6);
}
/*********************************************************************
* @fn TMR1_CapInit
*
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*
* @return none
*/
void TMR1_CapInit(CapModeTypeDef cap)
{
R8_TMR1_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR1_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_MODE_IN | (cap << 6);
}
/*********************************************************************
* @fn TMR1_DMACfg
*
* @brief 配置DMA功能
*
* @param s - 是否打开DMA功能
* @param startAddr - DMA 起始地址
* @param endAddr - DMA 结束地址
* @param m - 配置DMA模式
*
* @return none
*/
void TMR1_DMACfg(uint8_t s, uint16_t startAddr, uint16_t endAddr, DMAModeTypeDef m)
{
if(s == DISABLE)
{
R8_TMR1_CTRL_DMA = 0;
}
else
{
R16_TMR1_DMA_BEG = startAddr;
R16_TMR1_DMA_END = endAddr;
if(m)
R8_TMR1_CTRL_DMA = RB_TMR_DMA_LOOP | RB_TMR_DMA_ENABLE;
else
R8_TMR1_CTRL_DMA = RB_TMR_DMA_ENABLE;
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_timer2.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn TMR2_TimerInit
*
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*
* @return none
*/
void TMR2_TimerInit(uint32_t t)
{
R32_TMR2_CNT_END = t;
R8_TMR2_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR2_CTRL_MOD = RB_TMR_COUNT_EN;
}
/*********************************************************************
* @fn TMR2_EXTSingleCounterInit
*
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*
* @return none
*/
void TMR2_EXTSingleCounterInit(CapModeTypeDef cap)
{
R8_TMR2_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR2_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_CAP_COUNT | RB_TMR_MODE_IN | (cap << 6);
}
/*********************************************************************
* @fn TMR2_PWMInit
*
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*
* @return none
*/
void TMR2_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts)
{
R8_TMR2_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR2_CTRL_MOD = (pr << 4) | (ts << 6);
}
/*********************************************************************
* @fn TMR2_CapInit
*
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*
* @return none
*/
void TMR2_CapInit(CapModeTypeDef cap)
{
R8_TMR2_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR2_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_MODE_IN | (cap << 6);
}
/*********************************************************************
* @fn TMR2_DMACfg
*
* @brief 配置DMA功能
*
* @param s - 是否打开DMA功能
* @param startAddr - DMA 起始地址
* @param endAddr - DMA 结束地址
* @param m - 配置DMA模式
*
* @return none
*/
void TMR2_DMACfg(uint8_t s, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef m)
{
if(s == DISABLE)
{
R8_TMR2_CTRL_DMA = 0;
}
else
{
R16_TMR2_DMA_BEG = startAddr&0xFFFF;
R16_TMR2_DMA_END = endAddr&0xFFFF;
if(m)
R8_TMR2_CTRL_DMA = RB_TMR_DMA_LOOP | RB_TMR_DMA_ENABLE;
else
R8_TMR2_CTRL_DMA = RB_TMR_DMA_ENABLE;
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_timer3.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn TMR3_TimerInit
*
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*
* @return none
*/
void TMR3_TimerInit(uint32_t t)
{
R32_TMR3_CNT_END = t;
R8_TMR3_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR3_CTRL_MOD = RB_TMR_COUNT_EN;
}
/*********************************************************************
* @fn TMR3_EXTSingleCounterInit
*
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*
* @return none
*/
void TMR3_EXTSingleCounterInit(CapModeTypeDef cap)
{
R8_TMR3_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR3_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_CAP_COUNT | RB_TMR_MODE_IN | (cap << 6);
}
/*********************************************************************
* @fn TMR3_PWMInit
*
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*
* @return none
*/
void TMR3_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts)
{
R8_TMR3_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR3_CTRL_MOD = (pr << 4) | (ts << 6);
}
/*********************************************************************
* @fn TMR3_CapInit
*
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*
* @return none
*/
void TMR3_CapInit(CapModeTypeDef cap)
{
R8_TMR3_CTRL_MOD = RB_TMR_ALL_CLEAR;
R8_TMR3_CTRL_MOD = RB_TMR_COUNT_EN | RB_TMR_MODE_IN | (cap << 6);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_uart0.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn UART0_DefInit
*
* @brief 串口默认初始化配置
*
* @param none
*
* @return none
*/
void UART0_DefInit(void)
{
UART0_BaudRateCfg(115200);
R8_UART0_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开，触发点4字节
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
R8_UART0_DIV = 1;
}
/*********************************************************************
* @fn UART0_BaudRateCfg
*
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*
* @return none
*/
void UART0_BaudRateCfg(uint32_t baudrate)
{
uint32_t x;
x = 10 * GetSysClock() / 8 / baudrate;
x = (x + 5) / 10;
R16_UART0_DL = (uint16_t)x;
}
/*********************************************************************
* @fn UART0_ByteTrigCfg
*
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*
* @return none
*/
void UART0_ByteTrigCfg(UARTByteTRIGTypeDef b)
{
R8_UART0_FCR = (R8_UART0_FCR & ~RB_FCR_FIFO_TRIG) | (b << 6);
}
/*********************************************************************
* @fn UART0_INTCfg
*
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*
* @return none
*/
void UART0_INTCfg(FunctionalState s, uint8_t i)
{
if(s)
{
R8_UART0_IER |= i;
R8_UART0_MCR |= RB_MCR_INT_OE;
}
else
{
R8_UART0_IER &= ~i;
}
}
/*********************************************************************
* @fn UART0_Reset
*
* @brief 串口软件复位
*
* @param none
*
* @return none
*/
void UART0_Reset(void)
{
R8_UART0_IER = RB_IER_RESET;
}
/*********************************************************************
* @fn UART0_SendString
*
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*
* @return none
*/
void UART0_SendString(uint8_t *buf, uint16_t l)
{
uint16_t len = l;
while(len)
{
if(R8_UART0_TFC != UART_FIFO_SIZE)
{
R8_UART0_THR = *buf++;
len--;
}
}
}
/*********************************************************************
* @fn UART0_RecvString
*
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART0_RecvString(uint8_t *buf)
{
uint16_t len = 0;
while(R8_UART0_RFC)
{
*buf++ = R8_UART0_RBR;
len++;
}
return (len);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_uart1.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn UART1_DefInit
*
* @brief 串口默认初始化配置
*
* @param none
*
* @return none
*/
void UART1_DefInit(void)
{
UART1_BaudRateCfg(115200);
R8_UART1_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开，触发点4字节
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
R8_UART1_DIV = 1;
}
/*********************************************************************
* @fn UART1_BaudRateCfg
*
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*
* @return none
*/
void UART1_BaudRateCfg(uint32_t baudrate)
{
uint32_t x;
x = 10 * GetSysClock() / 8 / baudrate;
x = (x + 5) / 10;
R16_UART1_DL = (uint16_t)x;
}
/*********************************************************************
* @fn UART1_ByteTrigCfg
*
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*
* @return none
*/
void UART1_ByteTrigCfg(UARTByteTRIGTypeDef b)
{
R8_UART1_FCR = (R8_UART1_FCR & ~RB_FCR_FIFO_TRIG) | (b << 6);
}
/*********************************************************************
* @fn UART1_INTCfg
*
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*
* @return none
*/
void UART1_INTCfg(FunctionalState s, uint8_t i)
{
if(s)
{
R8_UART1_IER |= i;
R8_UART1_MCR |= RB_MCR_INT_OE;
}
else
{
R8_UART1_IER &= ~i;
}
}
/*********************************************************************
* @fn UART1_Reset
*
* @brief 串口软件复位
*
* @param none
*
* @return none
*/
void UART1_Reset(void)
{
R8_UART1_IER = RB_IER_RESET;
}
/*********************************************************************
* @fn UART1_SendString
*
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*
* @return none
*/
void UART1_SendString(uint8_t *buf, uint16_t l)
{
uint16_t len = l;
while(len)
{
if(R8_UART1_TFC != UART_FIFO_SIZE)
{
R8_UART1_THR = *buf++;
len--;
}
}
}
/*********************************************************************
* @fn UART1_RecvString
*
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART1_RecvString(uint8_t *buf)
{
uint16_t len = 0;
while(R8_UART1_RFC)
{
*buf++ = R8_UART1_RBR;
len++;
}
return (len);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_uart2.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn UART2_DefInit
*
* @brief 串口默认初始化配置
*
* @param none
*
* @return none
*/
void UART2_DefInit(void)
{
UART2_BaudRateCfg(115200);
R8_UART2_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开，触发点4字节
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
R8_UART2_DIV = 1;
}
/*********************************************************************
* @fn UART2_BaudRateCfg
*
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*
* @return none
*/
void UART2_BaudRateCfg(uint32_t baudrate)
{
uint32_t x;
x = 10 * GetSysClock() / 8 / baudrate;
x = (x + 5) / 10;
R16_UART2_DL = (uint16_t)x;
}
/*********************************************************************
* @fn UART2_ByteTrigCfg
*
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*
* @return none
*/
void UART2_ByteTrigCfg(UARTByteTRIGTypeDef b)
{
R8_UART2_FCR = (R8_UART2_FCR & ~RB_FCR_FIFO_TRIG) | (b << 6);
}
/*********************************************************************
* @fn UART2_INTCfg
*
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*
* @return none
*/
void UART2_INTCfg(FunctionalState s, uint8_t i)
{
if(s)
{
R8_UART2_IER |= i;
R8_UART2_MCR |= RB_MCR_INT_OE;
}
else
{
R8_UART2_IER &= ~i;
}
}
/*********************************************************************
* @fn UART2_Reset
*
* @brief 串口软件复位
*
* @param none
*
* @return none
*/
void UART2_Reset(void)
{
R8_UART2_IER = RB_IER_RESET;
}
/*********************************************************************
* @fn UART2_SendString
*
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*
* @return none
*/
void UART2_SendString(uint8_t *buf, uint16_t l)
{
uint16_t len = l;
while(len)
{
if(R8_UART2_TFC != UART_FIFO_SIZE)
{
R8_UART2_THR = *buf++;
len--;
}
}
}
/*********************************************************************
* @fn UART2_RecvString
*
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART2_RecvString(uint8_t *buf)
{
uint16_t len = 0;
while(R8_UART2_RFC)
{
*buf++ = R8_UART2_RBR;
len++;
}
return (len);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_uart3.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
/*********************************************************************
* @fn UART3_DefInit
*
* @brief 串口默认初始化配置
*
* @param none
*
* @return none
*/
void UART3_DefInit(void)
{
UART3_BaudRateCfg(115200);
R8_UART3_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开，触发点4字节
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
R8_UART3_DIV = 1;
}
/*********************************************************************
* @fn UART3_BaudRateCfg
*
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*
* @return none
*/
void UART3_BaudRateCfg(uint32_t baudrate)
{
uint32_t x;
x = 10 * GetSysClock() / 8 / baudrate;
x = (x + 5) / 10;
R16_UART3_DL = (uint16_t)x;
}
/*********************************************************************
* @fn UART3_ByteTrigCfg
*
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*
* @return none
*/
void UART3_ByteTrigCfg(UARTByteTRIGTypeDef b)
{
R8_UART3_FCR = (R8_UART3_FCR & ~RB_FCR_FIFO_TRIG) | (b << 6);
}
/*********************************************************************
* @fn UART3_INTCfg
*
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*
* @return none
*/
void UART3_INTCfg(FunctionalState s, uint8_t i)
{
if(s)
{
R8_UART3_IER |= i;
R8_UART3_MCR |= RB_MCR_INT_OE;
}
else
{
R8_UART3_IER &= ~i;
}
}
/*********************************************************************
* @fn UART3_Reset
*
* @brief 串口软件复位
*
* @param none
*
* @return none
*/
void UART3_Reset(void)
{
R8_UART3_IER = RB_IER_RESET;
}
/*********************************************************************
* @fn UART3_SendString
*
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*
* @return none
*/
void UART3_SendString(uint8_t *buf, uint16_t l)
{
uint16_t len = l;
while(len)
{
if(R8_UART3_TFC != UART_FIFO_SIZE)
{
R8_UART3_THR = *buf++;
len--;
}
}
}
/*********************************************************************
* @fn UART3_RecvString
*
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART3_RecvString(uint8_t *buf)
{
uint16_t len = 0;
while(R8_UART3_RFC)
{
*buf++ = R8_UART3_RBR;
len++;
}
return (len);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_usbdev.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
uint8_t *pEP0_RAM_Addr;
uint8_t *pEP1_RAM_Addr;
uint8_t *pEP2_RAM_Addr;
uint8_t *pEP3_RAM_Addr;
/*********************************************************************
* @fn USB_DeviceInit
*
* @brief USB设备功能初始化，4个端点，8个通道。
*
* @param none
*
* @return none
*/
void USB_DeviceInit(void)
{
R8_USB_CTRL = 0x00; // 先设定模式,取消 RB_UC_CLR_ALL
R8_UEP4_1_MOD = RB_UEP4_RX_EN | RB_UEP4_TX_EN | RB_UEP1_RX_EN | RB_UEP1_TX_EN; // 端点4 OUT+IN,端点1 OUT+IN
R8_UEP2_3_MOD = RB_UEP2_RX_EN | RB_UEP2_TX_EN | RB_UEP3_RX_EN | RB_UEP3_TX_EN; // 端点2 OUT+IN,端点3 OUT+IN
R16_UEP0_DMA = (uint16_t)(uint32_t)pEP0_RAM_Addr;
R16_UEP1_DMA = (uint16_t)(uint32_t)pEP1_RAM_Addr;
R16_UEP2_DMA = (uint16_t)(uint32_t)pEP2_RAM_Addr;
R16_UEP3_DMA = (uint16_t)(uint32_t)pEP3_RAM_Addr;
R8_UEP0_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK;
R8_UEP1_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG;
R8_UEP2_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG;
R8_UEP3_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG;
R8_UEP4_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK;
R8_USB_DEV_AD = 0x00;
R8_USB_CTRL = RB_UC_DEV_PU_EN | RB_UC_INT_BUSY | RB_UC_DMA_EN; // 启动USB设备及DMA，在中断期间中断标志未清除前自动返回NAK
R16_PIN_ANALOG_IE |= RB_PIN_USB_IE | RB_PIN_USB_DP_PU; // 防止USB端口浮空及上拉电阻
R8_USB_INT_FG = 0xFF; // 清中断标志
R8_UDEV_CTRL = RB_UD_PD_DIS | RB_UD_PORT_EN; // 允许USB端口
R8_USB_INT_EN = RB_UIE_SUSPEND | RB_UIE_BUS_RST | RB_UIE_TRANSFER;
}
/*********************************************************************
* @fn DevEP1_IN_Deal
*
* @brief 端点1数据上传
*
* @param l - 上传数据长度(<64B)
*
* @return none
*/
void DevEP1_IN_Deal(uint8_t l)
{
R8_UEP1_T_LEN = l;
R8_UEP1_CTRL = (R8_UEP1_CTRL & ~MASK_UEP_T_RES) | UEP_T_RES_ACK;
}
/*********************************************************************
* @fn DevEP2_IN_Deal
*
* @brief 端点2数据上传
*
* @param l - 上传数据长度(<64B)
*
* @return none
*/
void DevEP2_IN_Deal(uint8_t l)
{
R8_UEP2_T_LEN = l;
R8_UEP2_CTRL = (R8_UEP2_CTRL & ~MASK_UEP_T_RES) | UEP_T_RES_ACK;
}
/*********************************************************************
* @fn DevEP3_IN_Deal
*
* @brief 端点3数据上传
*
* @param l - 上传数据长度(<64B)
*
* @return none
*/
void DevEP3_IN_Deal(uint8_t l)
{
R8_UEP3_T_LEN = l;
R8_UEP3_CTRL = (R8_UEP3_CTRL & ~MASK_UEP_T_RES) | UEP_T_RES_ACK;
}
/*********************************************************************
* @fn DevEP4_IN_Deal
*
* @brief 端点4数据上传
*
* @param l - 上传数据长度(<64B)
*
* @return none
*/
void DevEP4_IN_Deal(uint8_t l)
{
R8_UEP4_T_LEN = l;
R8_UEP4_CTRL = (R8_UEP4_CTRL & ~MASK_UEP_T_RES) | UEP_T_RES_ACK;
}

695
nametag8_CH592/StdPeriphDriver/CH59x_usbhostBase.c Normal file
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@ -0,0 +1,695 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_usbhost.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
#if DISK_LIB_ENABLE
#include "CHRV3UFI.H"
#endif
uint8_t UsbDevEndp0Size; // USB设备的端点0的最大包尺寸
uint8_t FoundNewDev;
_RootHubDev ThisUsbDev; //ROOT口
_DevOnHubPort DevOnHubPort[HUB_MAX_PORTS]; // 假定:不超过1个外部HUB,每个外部HUB不超过HUB_MAX_PORTS个端口(多了不管)
uint8_t *pHOST_RX_RAM_Addr;
uint8_t *pHOST_TX_RAM_Addr;
/*获取设备描述符*/
__attribute__((aligned(4))) const uint8_t SetupGetDevDescr[] = {USB_REQ_TYP_IN, USB_GET_DESCRIPTOR, 0x00,
USB_DESCR_TYP_DEVICE, 0x00, 0x00, sizeof(USB_DEV_DESCR), 0x00};
/*获取配置描述符*/
__attribute__((aligned(4))) const uint8_t SetupGetCfgDescr[] = {USB_REQ_TYP_IN, USB_GET_DESCRIPTOR, 0x00,
USB_DESCR_TYP_CONFIG, 0x00, 0x00, 0x04, 0x00};
/*设置USB地址*/
__attribute__((aligned(4))) const uint8_t SetupSetUsbAddr[] = {USB_REQ_TYP_OUT, USB_SET_ADDRESS, USB_DEVICE_ADDR, 0x00,
0x00, 0x00, 0x00, 0x00};
/*设置USB配置*/
__attribute__((aligned(4))) const uint8_t SetupSetUsbConfig[] = {USB_REQ_TYP_OUT, USB_SET_CONFIGURATION, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00};
/*设置USB接口配置*/
__attribute__((aligned(4))) const uint8_t SetupSetUsbInterface[] = {USB_REQ_RECIP_INTERF, USB_SET_INTERFACE, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00};
/*清除端点STALL*/
__attribute__((aligned(4))) const uint8_t SetupClrEndpStall[] = {USB_REQ_TYP_OUT | USB_REQ_RECIP_ENDP, USB_CLEAR_FEATURE,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
/*********************************************************************
* @fn DisableRootHubPort
*
* @brief 关闭ROOT-HUB端口,实际上硬件已经自动关闭,此处只是清除一些结构状态
*
* @param none
*
* @return none
*/
void DisableRootHubPort(void)
{
#ifdef FOR_ROOT_UDISK_ONLY
CHRV3DiskStatus = DISK_DISCONNECT;
#endif
#ifndef DISK_BASE_BUF_LEN
ThisUsbDev.DeviceStatus = ROOT_DEV_DISCONNECT;
ThisUsbDev.DeviceAddress = 0x00;
#endif
}
/*********************************************************************
* @fn AnalyzeRootHub
*
* @brief 分析ROOT-HUB状态,处理ROOT-HUB端口的设备插拔事件
* 如果设备拔出,函数中调用DisableRootHubPort()函数,将端口关闭,插入事件,置相应端口的状态位
*
* @param none
*
* @return 返回ERR_SUCCESS为没有情况,返回ERR_USB_CONNECT为检测到新连接,返回ERR_USB_DISCON为检测到断开
*/
uint8_t AnalyzeRootHub(void)
{
uint8_t s;
s = ERR_SUCCESS;
if(R8_USB_MIS_ST & RB_UMS_DEV_ATTACH)
{ // 设备存在
#ifdef DISK_BASE_BUF_LEN
if(CHRV3DiskStatus == DISK_DISCONNECT
#else
if(ThisUsbDev.DeviceStatus == ROOT_DEV_DISCONNECT // 检测到有设备插入
#endif
|| (R8_UHOST_CTRL & RB_UH_PORT_EN) == 0x00)
{ // 检测到有设备插入,但尚未允许,说明是刚插入
DisableRootHubPort(); // 关闭端口
#ifdef DISK_BASE_BUF_LEN
CHRV3DiskStatus = DISK_CONNECT;
#else
ThisUsbDev.DeviceSpeed = R8_USB_MIS_ST & RB_UMS_DM_LEVEL ? 0 : 1;
ThisUsbDev.DeviceStatus = ROOT_DEV_CONNECTED; //置连接标志
#endif
PRINT("USB dev in\n");
s = ERR_USB_CONNECT;
}
}
#ifdef DISK_BASE_BUF_LEN
else if(CHRV3DiskStatus >= DISK_CONNECT)
{
#else
else if(ThisUsbDev.DeviceStatus >= ROOT_DEV_CONNECTED)
{ //检测到设备拔出
#endif
DisableRootHubPort(); // 关闭端口
PRINT("USB dev out\n");
if(s == ERR_SUCCESS)
{
s = ERR_USB_DISCON;
}
}
// R8_USB_INT_FG = RB_UIF_DETECT; // 清中断标志
return (s);
}
/*********************************************************************
* @fn SetHostUsbAddr
*
* @brief 设置USB主机当前操作的USB设备地址
*
* @param addr - USB设备地址
*
* @return none
*/
void SetHostUsbAddr(uint8_t addr)
{
R8_USB_DEV_AD = (R8_USB_DEV_AD & RB_UDA_GP_BIT) | (addr & MASK_USB_ADDR);
}
/*********************************************************************
* @fn SetUsbSpeed
*
* @brief 设置当前USB速度
*
* @param FullSpeed - USB速度
*
* @return none
*/
void SetUsbSpeed(uint8_t FullSpeed)
{
#ifndef DISK_BASE_BUF_LEN
if(FullSpeed) // 全速
{
R8_USB_CTRL &= ~RB_UC_LOW_SPEED; // 全速
R8_UH_SETUP &= ~RB_UH_PRE_PID_EN; // 禁止PRE PID
}
else
{
R8_USB_CTRL |= RB_UC_LOW_SPEED; // 低速
}
#endif
(void)FullSpeed;
}
/*********************************************************************
* @fn ResetRootHubPort
*
* @brief 检测到设备后,复位总线,为枚举设备准备,设置为默认为全速
*
* @param none
*
* @return none
*/
void ResetRootHubPort(void)
{
UsbDevEndp0Size = DEFAULT_ENDP0_SIZE; //USB设备的端点0的最大包尺寸
SetHostUsbAddr(0x00);
R8_UHOST_CTRL &= ~RB_UH_PORT_EN; // 关掉端口
SetUsbSpeed(1); // 默认为全速
R8_UHOST_CTRL = (R8_UHOST_CTRL & ~RB_UH_LOW_SPEED) | RB_UH_BUS_RESET; // 默认为全速,开始复位
mDelaymS(15); // 复位时间10mS到20mS
R8_UHOST_CTRL = R8_UHOST_CTRL & ~RB_UH_BUS_RESET; // 结束复位
mDelayuS(250);
R8_USB_INT_FG = RB_UIF_DETECT; // 清中断标志
}
/*********************************************************************
* @fn EnableRootHubPort
*
* @brief 使能ROOT-HUB端口,相应的bUH_PORT_EN置1开启端口,设备断开可能导致返回失败
*
* @param none
*
* @return 返回ERR_SUCCESS为检测到新连接,返回ERR_USB_DISCON为无连接
*/
uint8_t EnableRootHubPort(void)
{
#ifdef DISK_BASE_BUF_LEN
if(CHRV3DiskStatus < DISK_CONNECT)
CHRV3DiskStatus = DISK_CONNECT;
#else
if(ThisUsbDev.DeviceStatus < ROOT_DEV_CONNECTED)
ThisUsbDev.DeviceStatus = ROOT_DEV_CONNECTED;
#endif
if(R8_USB_MIS_ST & RB_UMS_DEV_ATTACH)
{ // 有设备
#ifndef DISK_BASE_BUF_LEN
if((R8_UHOST_CTRL & RB_UH_PORT_EN) == 0x00)
{ // 尚未使能
ThisUsbDev.DeviceSpeed = (R8_USB_MIS_ST & RB_UMS_DM_LEVEL) ? 0 : 1;
if(ThisUsbDev.DeviceSpeed == 0)
{
R8_UHOST_CTRL |= RB_UH_LOW_SPEED; // 低速
}
}
#endif
R8_UHOST_CTRL |= RB_UH_PORT_EN; //使能HUB端口
return (ERR_SUCCESS);
}
return (ERR_USB_DISCON);
}
#ifndef DISK_BASE_BUF_LEN
/*********************************************************************
* @fn SelectHubPort
*
* @brief 选定需要操作的HUB口
*
* @param HubPortIndex - 选择操作指定的ROOT-HUB端口的外部HUB的指定端口
*
* @return None
*/
void SelectHubPort(uint8_t HubPortIndex)
{
if(HubPortIndex) // 选择操作指定的ROOT-HUB端口的外部HUB的指定端口
{
SetHostUsbAddr(DevOnHubPort[HubPortIndex - 1].DeviceAddress); // 设置USB主机当前操作的USB设备地址
SetUsbSpeed(DevOnHubPort[HubPortIndex - 1].DeviceSpeed); // 设置当前USB速度
if(DevOnHubPort[HubPortIndex - 1].DeviceSpeed == 0) // 通过外部HUB与低速USB设备通讯需要前置ID
{
R8_UEP1_CTRL |= RB_UH_PRE_PID_EN; // 启用PRE PID
mDelayuS(100);
}
}
else
{
SetHostUsbAddr(ThisUsbDev.DeviceAddress); // 设置USB主机当前操作的USB设备地址
SetUsbSpeed(ThisUsbDev.DeviceSpeed); // 设置USB设备的速度
}
}
#endif
/*********************************************************************
* @fn WaitUSB_Interrupt
*
* @brief 等待USB中断
*
* @param none
*
* @return 返回ERR_SUCCESS 数据接收或者发送成功,返回ERR_USB_UNKNOWN 数据接收或者发送失败
*/
uint8_t WaitUSB_Interrupt(void)
{
uint16_t i;
for(i = WAIT_USB_TOUT_200US; i != 0 && (R8_USB_INT_FG & RB_UIF_TRANSFER) == 0; i--)
{
;
}
return ((R8_USB_INT_FG & RB_UIF_TRANSFER) ? ERR_SUCCESS : ERR_USB_UNKNOWN);
}
/*********************************************************************
* @fn USBHostTransact
*
* @brief 传输事务,输入目的端点地址/PID令牌,同步标志,以20uS为单位的NAK重试总时间(0则不重试,0xFFFF无限重试),返回0成功,超时/出错重试
* 本子程序着重于易理解,而在实际应用中,为了提供运行速度,应该对本子程序代码进行优化
*
* @param endp_pid - 令牌和地址, 高4位是token_pid令牌, 低4位是端点地址
* @param tog - 同步标志
* @param timeout - 超时时间
*
* @return ERR_USB_UNKNOWN 超时，可能硬件异常
* ERR_USB_DISCON 设备断开
* ERR_USB_CONNECT 设备连接
* ERR_SUCCESS 传输完成
*/
uint8_t USBHostTransact(uint8_t endp_pid, uint8_t tog, uint32_t timeout)
{
uint8_t TransRetry;
uint8_t s, r;
uint16_t i;
R8_UH_RX_CTRL = R8_UH_TX_CTRL = tog;
TransRetry = 0;
do
{
R8_UH_EP_PID = endp_pid; // 指定令牌PID和目的端点号
R8_USB_INT_FG = RB_UIF_TRANSFER;
for(i = WAIT_USB_TOUT_200US; i != 0 && (R8_USB_INT_FG & RB_UIF_TRANSFER) == 0; i--)
{
;
}
R8_UH_EP_PID = 0x00; // 停止USB传输
if((R8_USB_INT_FG & RB_UIF_TRANSFER) == 0)
{
return (ERR_USB_UNKNOWN);
}
if(R8_USB_INT_FG & RB_UIF_DETECT)
{ // USB设备插拔事件
// mDelayuS( 200 ); // 等待传输完成
R8_USB_INT_FG = RB_UIF_DETECT;
s = AnalyzeRootHub(); // 分析ROOT-HUB状态
if(s == ERR_USB_CONNECT)
FoundNewDev = 1;
#ifdef DISK_BASE_BUF_LEN
if(CHRV3DiskStatus == DISK_DISCONNECT)
{
return (ERR_USB_DISCON);
} // USB设备断开事件
if(CHRV3DiskStatus == DISK_CONNECT)
{
return (ERR_USB_CONNECT);
} // USB设备连接事件
#else
if(ThisUsbDev.DeviceStatus == ROOT_DEV_DISCONNECT)
{
return (ERR_USB_DISCON);
} // USB设备断开事件
if(ThisUsbDev.DeviceStatus == ROOT_DEV_CONNECTED)
{
return (ERR_USB_CONNECT);
} // USB设备连接事件
#endif
mDelayuS(200); // 等待传输完成
}
if(R8_USB_INT_FG & RB_UIF_TRANSFER) // 传输完成事件
{
if(R8_USB_INT_ST & RB_UIS_TOG_OK)
{
return (ERR_SUCCESS);
}
r = R8_USB_INT_ST & MASK_UIS_H_RES; // USB设备应答状态
if(r == USB_PID_STALL)
{
return (r | ERR_USB_TRANSFER);
}
if(r == USB_PID_NAK)
{
if(timeout == 0)
{
return (r | ERR_USB_TRANSFER);
}
if(timeout < 0xFFFFFFFF)
{
timeout--;
}
--TransRetry;
}
else
switch(endp_pid >> 4)
{
case USB_PID_SETUP:
case USB_PID_OUT:
if(r)
{
return (r | ERR_USB_TRANSFER);
} // 不是超时/出错,意外应答
break; // 超时重试
case USB_PID_IN:
if(r == USB_PID_DATA0 || r == USB_PID_DATA1)
{ // 不同步则需丢弃后重试
} // 不同步重试
else if(r)
{
return (r | ERR_USB_TRANSFER);
} // 不是超时/出错,意外应答
break; // 超时重试
default:
return (ERR_USB_UNKNOWN); // 不可能的情况
break;
}
}
else
{ // 其它中断,不应该发生的情况
R8_USB_INT_FG = 0xFF; /* 清中断标志 */
}
mDelayuS(15);
} while(++TransRetry < 3);
return (ERR_USB_TRANSFER); // 应答超时
}
/*********************************************************************
* @fn HostCtrlTransfer
*
* @brief 执行控制传输,8字节请求码在pSetupReq中,DataBuf为可选的收发缓冲区
*
* @param DataBuf - 如果需要接收和发送数据,那么DataBuf需指向有效缓冲区用于存放后续数据
* @param RetLen - 实际成功收发的总长度保存在RetLen指向的字节变量中
*
* @return ERR_USB_BUF_OVER IN状态阶段出错
* ERR_SUCCESS 数据交换成功
*/
uint8_t HostCtrlTransfer(uint8_t *DataBuf, uint8_t *RetLen)
{
uint16_t RemLen = 0;
uint8_t s, RxLen, RxCnt, TxCnt;
uint8_t *pBuf;
uint8_t *pLen;
pBuf = DataBuf;
pLen = RetLen;
mDelayuS(200);
if(pLen)
{
*pLen = 0; // 实际成功收发的总长度
}
R8_UH_TX_LEN = sizeof(USB_SETUP_REQ);
s = USBHostTransact(USB_PID_SETUP << 4 | 0x00, 0x00, 200000 / 20); // SETUP阶段,200mS超时
if(s != ERR_SUCCESS)
{
return (s);
}
R8_UH_RX_CTRL = R8_UH_TX_CTRL = RB_UH_R_TOG | RB_UH_R_AUTO_TOG | RB_UH_T_TOG | RB_UH_T_AUTO_TOG; // 默认DATA1
R8_UH_TX_LEN = 0x01; // 默认无数据故状态阶段为IN
RemLen = pSetupReq->wLength;
PRINT("wLength: %x\n", RemLen);
if(RemLen && pBuf) // 需要收发数据
{
PRINT("bRequestType: %x\n", pSetupReq->bRequestType);
if(pSetupReq->bRequestType & USB_REQ_TYP_IN) // 收
{
while(RemLen)
{
mDelayuS(200);
s = USBHostTransact(USB_PID_IN << 4 | 0x00, R8_UH_RX_CTRL, 200000 / 20); // IN数据
if(s != ERR_SUCCESS)
{
return (s);
}
RxLen = R8_USB_RX_LEN < RemLen ? R8_USB_RX_LEN : RemLen;
RemLen -= RxLen;
if(pLen)
{
*pLen += RxLen; // 实际成功收发的总长度
}
for(RxCnt = 0; RxCnt != RxLen; RxCnt++)
{
*pBuf = pHOST_RX_RAM_Addr[RxCnt];
pBuf++;
}
if(R8_USB_RX_LEN == 0 || (R8_USB_RX_LEN & (UsbDevEndp0Size - 1)))
{
break; // 短包
}
}
R8_UH_TX_LEN = 0x00; // 状态阶段为OUT
}
else // 发
{
while(RemLen)
{
mDelayuS(200);
R8_UH_TX_LEN = RemLen >= UsbDevEndp0Size ? UsbDevEndp0Size : RemLen;
for(TxCnt = 0; TxCnt != R8_UH_TX_LEN; TxCnt++)
{
pHOST_TX_RAM_Addr[TxCnt] = *pBuf;
pBuf++;
}
s = USBHostTransact(USB_PID_OUT << 4 | 0x00, R8_UH_TX_CTRL, 200000 / 20); // OUT数据
if(s != ERR_SUCCESS)
{
return (s);
}
RemLen -= R8_UH_TX_LEN;
if(pLen)
{
*pLen += R8_UH_TX_LEN; // 实际成功收发的总长度
}
}
PRINT("Send: %d\n", *pLen);
// R8_UH_TX_LEN = 0x01; // 状态阶段为IN
}
}
mDelayuS(200);
s = USBHostTransact((R8_UH_TX_LEN ? USB_PID_IN << 4 | 0x00 : USB_PID_OUT << 4 | 0x00), RB_UH_R_TOG | RB_UH_T_TOG, 200000 / 20); // STATUS阶段
if(s != ERR_SUCCESS)
{
return (s);
}
if(R8_UH_TX_LEN == 0)
{
return (ERR_SUCCESS); // 状态OUT
}
if(R8_USB_RX_LEN == 0)
{
return (ERR_SUCCESS); // 状态IN,检查IN状态返回数据长度
}
return (ERR_USB_BUF_OVER); // IN状态阶段错误
}
/*********************************************************************
* @fn CopySetupReqPkg
*
* @brief 复制控制传输的请求包
*
* @param pReqPkt - 控制请求包地址
*
* @return none
*/
void CopySetupReqPkg(const uint8_t *pReqPkt) // 复制控制传输的请求包
{
uint8_t i;
for(i = 0; i != sizeof(USB_SETUP_REQ); i++)
{
((uint8_t *)pSetupReq)[i] = *pReqPkt;
pReqPkt++;
}
}
/*********************************************************************
* @fn CtrlGetDeviceDescr
*
* @brief 获取设备描述符,返回在 pHOST_TX_RAM_Addr 中
*
* @param none
*
* @return ERR_USB_BUF_OVER 描述符长度错误
* ERR_SUCCESS 成功
*/
uint8_t CtrlGetDeviceDescr(void)
{
uint8_t s;
uint8_t len;
UsbDevEndp0Size = DEFAULT_ENDP0_SIZE;
CopySetupReqPkg(SetupGetDevDescr);
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
UsbDevEndp0Size = ((PUSB_DEV_DESCR)Com_Buffer)->bMaxPacketSize0; // 端点0最大包长度,这是简化处理,正常应该先获取前8字节后立即更新UsbDevEndp0Size再继续
if(len < ((PUSB_SETUP_REQ)SetupGetDevDescr)->wLength)
{
return (ERR_USB_BUF_OVER); // 描述符长度错误
}
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn CtrlGetConfigDescr
*
* @brief 获取配置描述符,返回在 pHOST_TX_RAM_Addr 中
*
* @param none
*
* @return ERR_USB_BUF_OVER 描述符长度错误
* ERR_SUCCESS 成功
*/
uint8_t CtrlGetConfigDescr(void)
{
uint8_t s;
uint8_t len;
CopySetupReqPkg(SetupGetCfgDescr);
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
if(len < ((PUSB_SETUP_REQ)SetupGetCfgDescr)->wLength)
{
return (ERR_USB_BUF_OVER); // 返回长度错误
}
len = ((PUSB_CFG_DESCR)Com_Buffer)->wTotalLength;
CopySetupReqPkg(SetupGetCfgDescr);
pSetupReq->wLength = len; // 完整配置描述符的总长度
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
#ifdef DISK_BASE_BUF_LEN
if(len > 64)
len = 64;
memcpy(TxBuffer, Com_Buffer, len); //U盘操作时，需要拷贝到TxBuffer
#endif
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn CtrlSetUsbAddress
*
* @brief 设置USB设备地址
*
* @param addr - 设备地址
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlSetUsbAddress(uint8_t addr)
{
uint8_t s;
CopySetupReqPkg(SetupSetUsbAddr);
pSetupReq->wValue = addr; // USB设备地址
s = HostCtrlTransfer(NULL, NULL); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
SetHostUsbAddr(addr); // 设置USB主机当前操作的USB设备地址
mDelaymS(10); // 等待USB设备完成操作
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn CtrlSetUsbConfig
*
* @brief 设置USB设备配置
*
* @param cfg - 配置值
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlSetUsbConfig(uint8_t cfg)
{
CopySetupReqPkg(SetupSetUsbConfig);
pSetupReq->wValue = cfg; // USB设备配置
return (HostCtrlTransfer(NULL, NULL)); // 执行控制传输
}
/*********************************************************************
* @fn CtrlClearEndpStall
*
* @brief 清除端点STALL
*
* @param endp - 端点地址
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlClearEndpStall(uint8_t endp)
{
CopySetupReqPkg(SetupClrEndpStall); // 清除端点的错误
pSetupReq->wIndex = endp; // 端点地址
return (HostCtrlTransfer(NULL, NULL)); // 执行控制传输
}
/*********************************************************************
* @fn CtrlSetUsbIntercace
*
* @brief 设置USB设备接口
*
* @param cfg - 配置值
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlSetUsbIntercace(uint8_t cfg)
{
CopySetupReqPkg(SetupSetUsbInterface);
pSetupReq->wValue = cfg; // USB设备配置
return (HostCtrlTransfer(NULL, NULL)); // 执行控制传输
}
/*********************************************************************
* @fn USB_HostInit
*
* @brief USB主机功能初始化
*
* @param none
*
* @return none
*/
void USB_HostInit(void)
{
R8_USB_CTRL = RB_UC_HOST_MODE;
R8_UHOST_CTRL = 0;
R8_USB_DEV_AD = 0x00;
R8_UH_EP_MOD = RB_UH_EP_TX_EN | RB_UH_EP_RX_EN;
R16_UH_RX_DMA = (uint16_t)(uint32_t)pHOST_RX_RAM_Addr;
R16_UH_TX_DMA = (uint16_t)(uint32_t)pHOST_TX_RAM_Addr;
R8_UH_RX_CTRL = 0x00;
R8_UH_TX_CTRL = 0x00;
R8_USB_CTRL = RB_UC_HOST_MODE | RB_UC_INT_BUSY | RB_UC_DMA_EN;
R8_UH_SETUP = RB_UH_SOF_EN;
R8_USB_INT_FG = 0xFF;
DisableRootHubPort();
R8_USB_INT_EN = RB_UIE_TRANSFER | RB_UIE_DETECT;
FoundNewDev = 0;
}

840
nametag8_CH592/StdPeriphDriver/CH59x_usbhostClass.c Normal file
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@ -0,0 +1,840 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_usbhost.c
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
#if DISK_LIB_ENABLE
#include "CHRV3UFI.H"
#endif
/* 设置HID上传速率 */
__attribute__((aligned(4))) const uint8_t SetupSetHIDIdle[] = {0x21, HID_SET_IDLE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
/* 获取HID设备报表描述符 */
__attribute__((aligned(4))) const uint8_t SetupGetHIDDevReport[] = {0x81, USB_GET_DESCRIPTOR, 0x00, USB_DESCR_TYP_REPORT,
0x00, 0x00, 0x41, 0x00};
/* 获取HUB描述符 */
__attribute__((aligned(4))) const uint8_t SetupGetHubDescr[] = {HUB_GET_HUB_DESCRIPTOR, HUB_GET_DESCRIPTOR, 0x00,
USB_DESCR_TYP_HUB, 0x00, 0x00, sizeof(USB_HUB_DESCR), 0x00};
__attribute__((aligned(4))) uint8_t Com_Buffer[128]; // 定义用户临时缓冲区,枚举时用于处理描述符,枚举结束也可以用作普通临时缓冲区
/*********************************************************************
* @fn AnalyzeHidIntEndp
*
* @brief 从描述符中分析出HID中断端点的地址,如果HubPortIndex是0保存到ROOTHUB，如果是非零值则保存到HUB下结构体
*
* @param buf - 待分析数据缓冲区地址 HubPortIndex：0表示根HUB，非0表示外部HUB下的端口号
*
* @return 端点数
*/
uint8_t AnalyzeHidIntEndp(uint8_t *buf, uint8_t HubPortIndex)
{
uint8_t i, s, l;
s = 0;
if(HubPortIndex)
{
memset(DevOnHubPort[HubPortIndex - 1].GpVar, 0, sizeof(DevOnHubPort[HubPortIndex - 1].GpVar)); //清空数组
}
else
{
memset(ThisUsbDev.GpVar, 0, sizeof(ThisUsbDev.GpVar)); //清空数组
}
for(i = 0; i < ((PUSB_CFG_DESCR)buf)->wTotalLength; i += l) // 搜索中断端点描述符,跳过配置描述符和接口描述符
{
if(((PUSB_ENDP_DESCR)(buf + i))->bDescriptorType == USB_DESCR_TYP_ENDP // 是端点描述符
&& (((PUSB_ENDP_DESCR)(buf + i))->bmAttributes & USB_ENDP_TYPE_MASK) == USB_ENDP_TYPE_INTER // 是中断端点
&& (((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_DIR_MASK)) // 是IN端点
{ // 保存中断端点的地址,位7用于同步标志位,清0
if(HubPortIndex)
{
DevOnHubPort[HubPortIndex - 1].GpVar[s] = ((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_ADDR_MASK;
}
else
{
ThisUsbDev.GpVar[s] = ((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_ADDR_MASK; // 中断端点的地址，可以根据需要保存wMaxPacketSize和bInterval
}
PRINT("%02x ", (uint16_t)ThisUsbDev.GpVar[s]);
s++;
if(s >= 4)
{
break; //只分析4个端点
}
}
l = ((PUSB_ENDP_DESCR)(buf + i))->bLength; // 当前描述符长度,跳过
if(l > 16)
{
break;
}
}
PRINT("\n");
return (s);
}
/*********************************************************************
* @fn AnalyzeBulkEndp
*
* @brief 分析出批量端点,GpVar[0]、GpVar[1]存放上传端点。GpVar[2]、GpVar[3]存放下传端点
*
* @param buf - 待分析数据缓冲区地址 HubPortIndex：0表示根HUB，非0表示外部HUB下的端口号
*
* @return 0
*/
uint8_t AnalyzeBulkEndp(uint8_t *buf, uint8_t HubPortIndex)
{
uint8_t i, s1, s2, l;
s1 = 0;
s2 = 2;
if(HubPortIndex)
{
memset(DevOnHubPort[HubPortIndex - 1].GpVar, 0, sizeof(DevOnHubPort[HubPortIndex - 1].GpVar)); //清空数组
}
else
{
memset(ThisUsbDev.GpVar, 0, sizeof(ThisUsbDev.GpVar)); //清空数组
}
for(i = 0; i < ((PUSB_CFG_DESCR)buf)->wTotalLength; i += l) // 搜索中断端点描述符,跳过配置描述符和接口描述符
{
if((((PUSB_ENDP_DESCR)(buf + i))->bDescriptorType == USB_DESCR_TYP_ENDP) // 是端点描述符
&& ((((PUSB_ENDP_DESCR)(buf + i))->bmAttributes & USB_ENDP_TYPE_MASK) == USB_ENDP_TYPE_BULK)) // 是中断端点
{
if(HubPortIndex)
{
if(((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_DIR_MASK)
{
DevOnHubPort[HubPortIndex - 1].GpVar[s1++] = ((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_ADDR_MASK;
}
else
{
DevOnHubPort[HubPortIndex - 1].GpVar[s2++] = ((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_ADDR_MASK;
}
}
else
{
if(((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_DIR_MASK)
{
ThisUsbDev.GpVar[s1++] = ((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_ADDR_MASK;
}
else
{
ThisUsbDev.GpVar[s2++] = ((PUSB_ENDP_DESCR)(buf + i))->bEndpointAddress & USB_ENDP_ADDR_MASK;
}
}
if(s1 == 2)
{
s1 = 1;
}
if(s2 == 4)
{
s2 = 3;
}
}
l = ((PUSB_ENDP_DESCR)(buf + i))->bLength; // 当前描述符长度,跳过
if(l > 16)
{
break;
}
}
return (0);
}
/*********************************************************************
* @fn InitRootDevice
*
* @brief 初始化指定ROOT-HUB端口的USB设备
*
* @param none
*
* @return 错误码
*/
uint8_t InitRootDevice(void)
{
uint8_t i, s;
uint8_t cfg, dv_cls, if_cls;
PRINT("Reset host port\n");
ResetRootHubPort(); // 检测到设备后,复位相应端口的USB总线
for(i = 0, s = 0; i < 100; i++)
{ // 等待USB设备复位后重新连接,100mS超时
mDelaymS(1);
if(EnableRootHubPort() == ERR_SUCCESS)
{ // 使能端口
i = 0;
s++;
if(s > 100)
{
break; // 已经稳定连接100mS
}
}
}
if(i)
{ // 复位后设备没有连接
DisableRootHubPort();
PRINT("Disable host port because of disconnect\n");
return (ERR_USB_DISCON);
}
SetUsbSpeed(ThisUsbDev.DeviceSpeed); // 设置当前USB速度
PRINT("GetDevDescr: ");
s = CtrlGetDeviceDescr(); // 获取设备描述符
if(s == ERR_SUCCESS)
{
for(i = 0; i < ((PUSB_SETUP_REQ)SetupGetDevDescr)->wLength; i++)
{
PRINT("x%02X ", (uint16_t)(Com_Buffer[i]));
}
PRINT("\n");
ThisUsbDev.DeviceVID = ((PUSB_DEV_DESCR)Com_Buffer)->idVendor; //保存VID PID信息
ThisUsbDev.DevicePID = ((PUSB_DEV_DESCR)Com_Buffer)->idProduct;
dv_cls = ((PUSB_DEV_DESCR)Com_Buffer)->bDeviceClass;
s = CtrlSetUsbAddress(((PUSB_SETUP_REQ)SetupSetUsbAddr)->wValue);
if(s == ERR_SUCCESS)
{
ThisUsbDev.DeviceAddress = ((PUSB_SETUP_REQ)SetupSetUsbAddr)->wValue; // 保存USB地址
PRINT("GetCfgDescr: ");
s = CtrlGetConfigDescr();
if(s == ERR_SUCCESS)
{
for(i = 0; i < ((PUSB_CFG_DESCR)Com_Buffer)->wTotalLength; i++)
{
PRINT("x%02X ", (uint16_t)(Com_Buffer[i]));
}
PRINT("\n");
/* 分析配置描述符,获取端点数据/各端点地址/各端点大小等,更新变量endp_addr和endp_size等 */
cfg = ((PUSB_CFG_DESCR)Com_Buffer)->bConfigurationValue;
if_cls = ((PUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceClass; // 接口类代码
if((dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_STORAGE))
{ // 是USB存储类设备,基本上确认是U盘
#ifdef FOR_ROOT_UDISK_ONLY
CHRV3DiskStatus = DISK_USB_ADDR;
return (ERR_SUCCESS);
}
else
{
return (ERR_USB_UNSUPPORT);
}
#else
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS;
ThisUsbDev.DeviceType = USB_DEV_CLASS_STORAGE;
PRINT("USB-Disk Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
}
else if((dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_PRINTER) && ((PUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceSubClass == 0x01)
{ // 是打印机类设备
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
// 需保存端点信息以便主程序进行USB传输
ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS;
ThisUsbDev.DeviceType = USB_DEV_CLASS_PRINTER;
PRINT("USB-Print Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
}
else if((dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_HID) && ((PUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceSubClass <= 0x01)
{ // 是HID类设备,键盘/鼠标等
// 从描述符中分析出HID中断端点的地址
s = AnalyzeHidIntEndp(Com_Buffer, 0); // 从描述符中分析出HID中断端点的地址
PRINT("AnalyzeHidIntEndp %02x\n", (uint16_t)s);
// 保存中断端点的地址,位7用于同步标志位,清0
if_cls = ((PUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceProtocol;
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
s = CtrlGetHIDDeviceReport(dv_cls); //获取报表描述符
if(s == ERR_SUCCESS)
{
for(i = 0; i < 64; i++)
{
PRINT("x%02X ", (uint16_t)(Com_Buffer[i]));
}
PRINT("\n");
}
// 需保存端点信息以便主程序进行USB传输
ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS;
if(if_cls == 1)
{
ThisUsbDev.DeviceType = DEV_TYPE_KEYBOARD;
// 进一步初始化,例如设备键盘指示灯LED等
PRINT("USB-Keyboard Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
else if(if_cls == 2)
{
ThisUsbDev.DeviceType = DEV_TYPE_MOUSE;
// 为了以后查询鼠标状态,应该分析描述符,取得中断端口的地址,长度等信息
PRINT("USB-Mouse Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
s = ERR_USB_UNSUPPORT;
}
}
else if(dv_cls == USB_DEV_CLASS_HUB)
{ // 是HUB类设备,集线器等
s = CtrlGetHubDescr();
if(s == ERR_SUCCESS)
{
PRINT("Max Port:%02X ", (((PXUSB_HUB_DESCR)Com_Buffer)->bNbrPorts));
ThisUsbDev.GpHUBPortNum = ((PXUSB_HUB_DESCR)Com_Buffer)->bNbrPorts; // 保存HUB的端口数量
if(ThisUsbDev.GpHUBPortNum > HUB_MAX_PORTS)
{
ThisUsbDev.GpHUBPortNum = HUB_MAX_PORTS; // 因为定义结构DevOnHubPort时人为假定每个HUB不超过HUB_MAX_PORTS个端口
}
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS;
ThisUsbDev.DeviceType = USB_DEV_CLASS_HUB;
//需保存端点信息以便主程序进行USB传输,本来中断端点可用于HUB事件通知,但本程序使用查询状态控制传输代替
//给HUB各端口上电,查询各端口状态,初始化有设备连接的HUB端口,初始化设备
for(i = 1; i <= ThisUsbDev.GpHUBPortNum; i++) // 给HUB各端口都上电
{
DevOnHubPort[i - 1].DeviceStatus = ROOT_DEV_DISCONNECT; // 清外部HUB端口上设备的状态
s = HubSetPortFeature(i, HUB_PORT_POWER);
if(s != ERR_SUCCESS)
{
PRINT("Ext-HUB Port_%1d# power on error\n", (uint16_t)i); // 端口上电失败
}
}
PRINT("USB-HUB Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
}
}
else
{ // 可以进一步分析
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
// 需保存端点信息以便主程序进行USB传输
ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS;
ThisUsbDev.DeviceType = DEV_TYPE_UNKNOW;
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS); /* 未知设备初始化成功 */
}
}
#endif
}
}
}
PRINT("InitRootDev Err = %02X\n", (uint16_t)s);
#ifdef FOR_ROOT_UDISK_ONLY
CHRV3DiskStatus = DISK_CONNECT;
#else
ThisUsbDev.DeviceStatus = ROOT_DEV_FAILED;
#endif
SetUsbSpeed(1); // 默认为全速
return (s);
}
/*********************************************************************
* @fn InitDevOnHub
*
* @brief 初始化枚举外部HUB后的二级USB设备
*
* @param HubPortIndex - 指定外部HUB
*
* @return 错误码
*/
uint8_t InitDevOnHub(uint8_t HubPortIndex)
{
uint8_t i, s, cfg, dv_cls, if_cls;
uint8_t ifc;
PRINT("Init dev @ExtHub-port_%1d ", (uint16_t)HubPortIndex);
if(HubPortIndex == 0)
{
return (ERR_USB_UNKNOWN);
}
SelectHubPort(HubPortIndex); // 选择操作指定的ROOT-HUB端口的外部HUB的指定端口,选择速度
PRINT("GetDevDescr: ");
s = CtrlGetDeviceDescr(); // 获取设备描述符
if(s != ERR_SUCCESS)
{
return (s);
}
DevOnHubPort[HubPortIndex - 1].DeviceVID = ((uint16_t)((PUSB_DEV_DESCR)Com_Buffer)->idVendor); //保存VID PID信息
DevOnHubPort[HubPortIndex - 1].DevicePID = ((uint16_t)((PUSB_DEV_DESCR)Com_Buffer)->idProduct);
dv_cls = ((PUSB_DEV_DESCR)Com_Buffer)->bDeviceClass; // 设备类代码
cfg = (1 << 4) + HubPortIndex; // 计算出一个USB地址,避免地址重叠
s = CtrlSetUsbAddress(cfg); // 设置USB设备地址
if(s != ERR_SUCCESS)
{
return (s);
}
DevOnHubPort[HubPortIndex - 1].DeviceAddress = cfg; // 保存分配的USB地址
PRINT("GetCfgDescr: ");
s = CtrlGetConfigDescr(); // 获取配置描述符
if(s != ERR_SUCCESS)
{
return (s);
}
cfg = ((PUSB_CFG_DESCR)Com_Buffer)->bConfigurationValue;
for(i = 0; i < ((PUSB_CFG_DESCR)Com_Buffer)->wTotalLength; i++)
{
PRINT("x%02X ", (uint16_t)(Com_Buffer[i]));
}
PRINT("\n");
/* 分析配置描述符,获取端点数据/各端点地址/各端点大小等,更新变量endp_addr和endp_size等 */
if_cls = ((PXUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceClass; // 接口类代码
if(dv_cls == 0x00 && if_cls == USB_DEV_CLASS_STORAGE) // 是USB存储类设备,基本上确认是U盘
{
AnalyzeBulkEndp(Com_Buffer, HubPortIndex);
for(i = 0; i != 4; i++)
{
PRINT("%02x ", (uint16_t)DevOnHubPort[HubPortIndex - 1].GpVar[i]);
}
PRINT("\n");
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
DevOnHubPort[HubPortIndex - 1].DeviceStatus = ROOT_DEV_SUCCESS;
DevOnHubPort[HubPortIndex - 1].DeviceType = USB_DEV_CLASS_STORAGE;
PRINT("USB-Disk Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
}
else if((dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_HID) && (((PXUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceSubClass <= 0x01)) // 是HID类设备,键盘/鼠标等
{
ifc = ((PXUSB_CFG_DESCR_LONG)Com_Buffer)->cfg_descr.bNumInterfaces;
s = AnalyzeHidIntEndp(Com_Buffer, HubPortIndex); // 从描述符中分析出HID中断端点的地址
PRINT("AnalyzeHidIntEndp %02x\n", (uint16_t)s);
if_cls = ((PXUSB_CFG_DESCR_LONG)Com_Buffer)->itf_descr.bInterfaceProtocol;
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
for(dv_cls = 0; dv_cls < ifc; dv_cls++)
{
s = CtrlGetHIDDeviceReport(dv_cls); //获取报表描述符
if(s == ERR_SUCCESS)
{
for(i = 0; i < 64; i++)
{
PRINT("x%02X ", (uint16_t)(Com_Buffer[i]));
}
PRINT("\n");
}
}
//需保存端点信息以便主程序进行USB传输
DevOnHubPort[HubPortIndex - 1].DeviceStatus = ROOT_DEV_SUCCESS;
if(if_cls == 1)
{
DevOnHubPort[HubPortIndex - 1].DeviceType = DEV_TYPE_KEYBOARD;
//进一步初始化,例如设备键盘指示灯LED等
if(ifc > 1)
{
PRINT("USB_DEV_CLASS_HID Ready\n");
DevOnHubPort[HubPortIndex - 1].DeviceType = USB_DEV_CLASS_HID; //复合HID设备
}
PRINT("USB-Keyboard Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
else if(if_cls == 2)
{
DevOnHubPort[HubPortIndex - 1].DeviceType = DEV_TYPE_MOUSE;
//为了以后查询鼠标状态,应该分析描述符,取得中断端口的地址,长度等信息
if(ifc > 1)
{
PRINT("USB_DEV_CLASS_HID Ready\n");
DevOnHubPort[HubPortIndex - 1].DeviceType = USB_DEV_CLASS_HID; //复合HID设备
}
PRINT("USB-Mouse Ready\n");
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS);
}
s = ERR_USB_UNSUPPORT;
}
}
else if(dv_cls == USB_DEV_CLASS_HUB) // 是HUB类设备,集线器等
{
DevOnHubPort[HubPortIndex - 1].DeviceType = USB_DEV_CLASS_HUB;
PRINT("This program don't support Level 2 HUB\n"); // 需要支持多级HUB级联请参考本程序进行扩展
s = HubClearPortFeature(i, HUB_PORT_ENABLE); // 禁止HUB端口
if(s != ERR_SUCCESS)
{
return (s);
}
s = ERR_USB_UNSUPPORT;
}
else //其他设备
{
AnalyzeBulkEndp(Com_Buffer, HubPortIndex); //分析出批量端点
for(i = 0; i != 4; i++)
{
PRINT("%02x ", (uint16_t)DevOnHubPort[HubPortIndex - 1].GpVar[i]);
}
PRINT("\n");
s = CtrlSetUsbConfig(cfg); // 设置USB设备配置
if(s == ERR_SUCCESS)
{
//需保存端点信息以便主程序进行USB传输
DevOnHubPort[HubPortIndex - 1].DeviceStatus = ROOT_DEV_SUCCESS;
DevOnHubPort[HubPortIndex - 1].DeviceType = dv_cls ? dv_cls : if_cls;
SetUsbSpeed(1); // 默认为全速
return (ERR_SUCCESS); //未知设备初始化成功
}
}
PRINT("InitDevOnHub Err = %02X\n", (uint16_t)s);
DevOnHubPort[HubPortIndex - 1].DeviceStatus = ROOT_DEV_FAILED;
SetUsbSpeed(1); // 默认为全速
return (s);
}
/*********************************************************************
* @fn EnumHubPort
*
* @brief 枚举指定ROOT-HUB端口上的外部HUB集线器的各个端口,检查各端口有无连接或移除事件并初始化二级USB设备
*
* @param RootHubIndex - ROOT_HUB0和ROOT_HUB1
*
* @return 错误码
*/
uint8_t EnumHubPort()
{
uint8_t i, s;
for(i = 1; i <= ThisUsbDev.GpHUBPortNum; i++) // 查询集线器的端口是否有变化
{
SelectHubPort(0); // 选择操作指定的ROOT-HUB端口,设置当前USB速度以及被操作设备的USB地址
s = HubGetPortStatus(i); // 获取端口状态
if(s != ERR_SUCCESS)
{
return (s); // 可能是该HUB断开了
}
if(((Com_Buffer[0] & (1 << (HUB_PORT_CONNECTION & 0x07))) && (Com_Buffer[2] & (1 << (HUB_C_PORT_CONNECTION & 0x07)))) || (Com_Buffer[2] == 0x10))
{ // 发现有设备连接
DevOnHubPort[i - 1].DeviceStatus = ROOT_DEV_CONNECTED; // 有设备连接
DevOnHubPort[i - 1].DeviceAddress = 0x00;
s = HubGetPortStatus(i); // 获取端口状态
if(s != ERR_SUCCESS)
{
return (s); // 可能是该HUB断开了
}
DevOnHubPort[i - 1].DeviceSpeed = Com_Buffer[1] & (1 << (HUB_PORT_LOW_SPEED & 0x07)) ? 0 : 1; // 低速还是全速
if(DevOnHubPort[i - 1].DeviceSpeed)
{
PRINT("Found full speed device on port %1d\n", (uint16_t)i);
}
else
{
PRINT("Found low speed device on port %1d\n", (uint16_t)i);
}
mDelaymS(200); // 等待设备上电稳定
s = HubSetPortFeature(i, HUB_PORT_RESET); // 对有设备连接的端口复位
if(s != ERR_SUCCESS)
{
return (s); // 可能是该HUB断开了
}
PRINT("Reset port and then wait in\n");
do // 查询复位端口,直到复位完成,把完成后的状态显示出来
{
mDelaymS(1);
s = HubGetPortStatus(i);
if(s != ERR_SUCCESS)
{
return (s); // 可能是该HUB断开了
}
} while(Com_Buffer[0] & (1 << (HUB_PORT_RESET & 0x07))); // 端口正在复位则等待
mDelaymS(100);
s = HubClearPortFeature(i, HUB_C_PORT_RESET); // 清除复位完成标志
// s = HubSetPortFeature( i, HUB_PORT_ENABLE ); // 启用HUB端口
s = HubClearPortFeature(i, HUB_C_PORT_CONNECTION); // 清除连接或移除变化标志
if(s != ERR_SUCCESS)
{
return (s);
}
s = HubGetPortStatus(i); // 再读取状态,复查设备是否还在
if(s != ERR_SUCCESS)
{
return (s);
}
if((Com_Buffer[0] & (1 << (HUB_PORT_CONNECTION & 0x07))) == 0)
{
DevOnHubPort[i - 1].DeviceStatus = ROOT_DEV_DISCONNECT; // 设备不在了
}
s = InitDevOnHub(i); // 初始化二级USB设备
if(s != ERR_SUCCESS)
{
return (s);
}
SetUsbSpeed(1); // 默认为全速
}
else if(Com_Buffer[2] & (1 << (HUB_C_PORT_ENABLE & 0x07))) // 设备连接出错
{
HubClearPortFeature(i, HUB_C_PORT_ENABLE); // 清除连接错误标志
PRINT("Device on port error\n");
s = HubSetPortFeature(i, HUB_PORT_RESET); // 对有设备连接的端口复位
if(s != ERR_SUCCESS)
return (s); // 可能是该HUB断开了
do // 查询复位端口,直到复位完成,把完成后的状态显示出来
{
mDelaymS(1);
s = HubGetPortStatus(i);
if(s != ERR_SUCCESS)
return (s); // 可能是该HUB断开了
} while(Com_Buffer[0] & (1 << (HUB_PORT_RESET & 0x07))); // 端口正在复位则等待
}
else if((Com_Buffer[0] & (1 << (HUB_PORT_CONNECTION & 0x07))) == 0) // 设备已经断开
{
if(DevOnHubPort[i - 1].DeviceStatus >= ROOT_DEV_CONNECTED)
{
PRINT("Device on port %1d removed\n", (uint16_t)i);
}
DevOnHubPort[i - 1].DeviceStatus = ROOT_DEV_DISCONNECT; // 有设备连接
if(Com_Buffer[2] & (1 << (HUB_C_PORT_CONNECTION & 0x07)))
{
HubClearPortFeature(i, HUB_C_PORT_CONNECTION); // 清除移除变化标志
}
}
}
return (ERR_SUCCESS); // 返回操作成功
}
/*********************************************************************
* @fn EnumAllHubPort
*
* @brief 枚举所有ROOT-HUB端口下外部HUB后的二级USB设备
*
* @return 错误码
*/
uint8_t EnumAllHubPort(void)
{
uint8_t s;
if((ThisUsbDev.DeviceStatus >= ROOT_DEV_SUCCESS) && (ThisUsbDev.DeviceType == USB_DEV_CLASS_HUB)) // HUB枚举成功
{
SelectHubPort(0); // 选择操作指定的ROOT-HUB端口,设置当前USB速度以及被操作设备的USB地址
s = EnumHubPort(); // 枚举指定ROOT-HUB端口上的外部HUB集线器的各个端口,检查各端口有无连接或移除事件
if(s != ERR_SUCCESS) // 可能是HUB断开了
{
PRINT("EnumAllHubPort err = %02X\n", (uint16_t)s);
}
SetUsbSpeed(1); // 默认为全速
}
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn SearchTypeDevice
*
* @brief 在ROOT-HUB以及外部HUB各端口上搜索指定类型的设备所在的端口号,输出端口号为0xFFFF则未搜索到.
* 当然也可以根据USB的厂商VID产品PID进行搜索(事先要记录各设备的VID和PID),以及指定搜索序号
*
* @param type - 搜索的设备类型
*
* @return 输出高8位为ROOT-HUB端口号,低8位为外部HUB的端口号,低8位为0则设备直接在ROOT-HUB端口上
*/
uint16_t SearchTypeDevice(uint8_t type)
{
uint8_t RootHubIndex; //CH554只有一个USB口,RootHubIndex = 0,只需看返回值的低八位即可
uint8_t HubPortIndex;
RootHubIndex = 0;
if((ThisUsbDev.DeviceType == USB_DEV_CLASS_HUB) && (ThisUsbDev.DeviceStatus >= ROOT_DEV_SUCCESS)) // 外部集线器HUB且枚举成功
{
for(HubPortIndex = 1; HubPortIndex <= ThisUsbDev.GpHUBPortNum; HubPortIndex++) // 搜索外部HUB的各个端口
{
if(DevOnHubPort[HubPortIndex - 1].DeviceType == type && DevOnHubPort[HubPortIndex - 1].DeviceStatus >= ROOT_DEV_SUCCESS)
{
return (((uint16_t)RootHubIndex << 8) | HubPortIndex); // 类型匹配且枚举成功
}
}
}
if((ThisUsbDev.DeviceType == type) && (ThisUsbDev.DeviceStatus >= ROOT_DEV_SUCCESS))
{
return ((uint16_t)RootHubIndex << 8); // 类型匹配且枚举成功,在ROOT-HUB端口上
}
return (0xFFFF);
}
/*********************************************************************
* @fn SETorOFFNumLock
*
* @brief NumLock的点灯判断
*
* @param buf - 点灯键值
*
* @return 错误码
*/
uint8_t SETorOFFNumLock(uint8_t *buf)
{
uint8_t tmp[] = {0x21, 0x09, 0x00, 0x02, 0x00, 0x00, 0x01, 0x00};
uint8_t len, s;
if((buf[2] == 0x53) & ((buf[0] | buf[1] | buf[3] | buf[4] | buf[5] | buf[6] | buf[7]) == 0))
{
for(s = 0; s != sizeof(tmp); s++)
{
((uint8_t *)pSetupReq)[s] = tmp[s];
}
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
}
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn CtrlGetHIDDeviceReport
*
* @brief 获取HID设备报表描述符,返回在TxBuffer中
*
* @param none
*
* @return 错误码
*/
uint8_t CtrlGetHIDDeviceReport(uint8_t infc)
{
uint8_t s;
uint8_t len;
CopySetupReqPkg(SetupSetHIDIdle);
pSetupReq->wIndex = infc;
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
CopySetupReqPkg(SetupGetHIDDevReport);
pSetupReq->wIndex = infc;
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn CtrlGetHubDescr
*
* @brief 获取HUB描述符,返回在Com_Buffer中
*
* @param none
*
* @return 错误码
*/
uint8_t CtrlGetHubDescr(void)
{
uint8_t s;
uint8_t len;
CopySetupReqPkg(SetupGetHubDescr);
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
if(len < ((PUSB_SETUP_REQ)SetupGetHubDescr)->wLength)
{
return (ERR_USB_BUF_OVER); // 描述符长度错误
}
// if ( len < 4 ) return( ERR_USB_BUF_OVER ); // 描述符长度错误
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn HubGetPortStatus
*
* @brief 查询HUB端口状态,返回在Com_Buffer中
*
* @param HubPortIndex - 端口号
*
* @return 错误码
*/
uint8_t HubGetPortStatus(uint8_t HubPortIndex)
{
uint8_t s;
uint8_t len;
pSetupReq->bRequestType = HUB_GET_PORT_STATUS;
pSetupReq->bRequest = HUB_GET_STATUS;
pSetupReq->wValue = 0x0000;
pSetupReq->wIndex = 0x0000 | HubPortIndex;
pSetupReq->wLength = 0x0004;
s = HostCtrlTransfer(Com_Buffer, &len); // 执行控制传输
if(s != ERR_SUCCESS)
{
return (s);
}
if(len < 4)
{
return (ERR_USB_BUF_OVER); // 描述符长度错误
}
return (ERR_SUCCESS);
}
/*********************************************************************
* @fn HubSetPortFeature
*
* @brief 设置HUB端口特性
*
* @param HubPortIndex - 端口号
* @param FeatureSelt - 端口特性
*
* @return 错误码
*/
uint8_t HubSetPortFeature(uint8_t HubPortIndex, uint8_t FeatureSelt)
{
pSetupReq->bRequestType = HUB_SET_PORT_FEATURE;
pSetupReq->bRequest = HUB_SET_FEATURE;
pSetupReq->wValue = 0x0000 | FeatureSelt;
pSetupReq->wIndex = 0x0000 | HubPortIndex;
pSetupReq->wLength = 0x0000;
return (HostCtrlTransfer(NULL, NULL)); // 执行控制传输
}
/*********************************************************************
* @fn HubClearPortFeature
*
* @brief 清除HUB端口特性
*
* @param HubPortIndex - 端口号
* @param FeatureSelt - 端口特性
*
* @return 错误码
*/
uint8_t HubClearPortFeature(uint8_t HubPortIndex, uint8_t FeatureSelt)
{
pSetupReq->bRequestType = HUB_CLEAR_PORT_FEATURE;
pSetupReq->bRequest = HUB_CLEAR_FEATURE;
pSetupReq->wValue = 0x0000 | FeatureSelt;
pSetupReq->wIndex = 0x0000 | HubPortIndex;
pSetupReq->wLength = 0x0000;
return (HostCtrlTransfer(NULL, NULL)); // 执行控制传输
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_adc.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_ADC_H__
#define __CH59x_ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
#define ROM_CFG_TMP_25C 0x7F014
/**
* @brief adc single channel define
*/
typedef enum
{
CH_EXTIN_0 = 0, // ADC 外部模拟通道 0
CH_EXTIN_1, // ADC 外部模拟通道 1
CH_EXTIN_2, // ADC 外部模拟通道 2
CH_EXTIN_3, // ADC 外部模拟通道 3
CH_EXTIN_4, // ADC 外部模拟通道 4
CH_EXTIN_5, // ADC 外部模拟通道 5
CH_EXTIN_6, // ADC 外部模拟通道 6
CH_EXTIN_7, // ADC 外部模拟通道 7
CH_EXTIN_8, // ADC 外部模拟通道 8
CH_EXTIN_9, // ADC 外部模拟通道 9
CH_EXTIN_10, // ADC 外部模拟通道 10
CH_EXTIN_11, // ADC 外部模拟通道 11
CH_EXTIN_12, // ADC 外部模拟通道 12
CH_EXTIN_13, // ADC 外部模拟通道 13
CH_INTE_VBAT = 14, // ADC 内部电池检测通道
CH_INTE_VTEMP = 15, // ADC 内部温度传感器检测通道
} ADC_SingleChannelTypeDef;
/**
* @brief adc differential channel define
*/
typedef enum
{
CH_DIFF_0_2 = 0, // ADC 差分通道 #0-#2
CH_DIFF_1_3, // ADC 差分通道 #1-#3
} ADC_DiffChannelTypeDef;
/**
* @brief adc sampling clock
*/
typedef enum
{
SampleFreq_3_2 = 0, // 3.2M 采样频率
SampleFreq_8, // 8M 采样频率
SampleFreq_5_33, // 5.33M 采样频率
SampleFreq_4, // 4M 采样频率
} ADC_SampClkTypeDef;
/**
* @brief adc signal PGA
*/
typedef enum
{
ADC_PGA_1_4 = 0, // -12dB, 1/4倍
ADC_PGA_1_2, // -6dB, 1/2倍
ADC_PGA_0, // 0dB, 1倍，无增益
ADC_PGA_2, // 6dB, 2倍
ADC_PGA_2_ = 0x10, // 6dB, 2倍
ADC_PGA_4, // 12dB, 4倍
ADC_PGA_8, // 18dB, 8倍
ADC_PGA_16, // 24dB, 16倍
} ADC_SignalPGATypeDef;
/**
* @brief Configuration DMA mode
*/
typedef enum
{
ADC_Mode_Single = 0, // 单次模式
ADC_Mode_LOOP, // 循环模式
} ADC_DMAModeTypeDef;
/**
* @brief 设置 ADC 采样通道
*
* @param d - refer to ADC_SingleChannelTypeDef
*/
#define ADC_ChannelCfg(d) (R8_ADC_CHANNEL = d)
/**
* @brief 设置 ADC 采样时钟
*
* @param d - refer to ADC_SampClkTypeDef
*/
#define ADC_SampClkCfg(d) (R8_ADC_CFG = R8_ADC_CFG & (~RB_ADC_CLK_DIV) | (d << 6))
/**
* @brief 设置 ADC 信号增益
*
* @param d - refer to ADC_SignalPGATypeDef
*/
#define ADC_PGACfg(d) (R8_ADC_CFG = R8_ADC_CFG & (~RB_ADC_PGA_GAIN) | (d << 4))
/**
* @brief 设置内部温度传感器校准值
*
* @param d - 校准值
*/
#define ADC_TempCalibCfg(d) (R8_TEM_SENSOR = R8_TEM_SENSOR & (~RB_TEM_SEN_CALIB) | d)
/**
* @brief 外部信号单通道采样初始化
*
* @param sp - refer to ADC_SampClkTypeDef
* @param ga - refer to ADC_SignalPGATypeDef
*/
void ADC_ExtSingleChSampInit(ADC_SampClkTypeDef sp, ADC_SignalPGATypeDef ga);
/**
* @brief 外部信号差分通道采样初始化
*
* @param sp - refer to ADC_SampClkTypeDef
* @param ga - refer to ADC_SignalPGATypeDef
*/
void ADC_ExtDiffChSampInit(ADC_SampClkTypeDef sp, ADC_SignalPGATypeDef ga);
/**
* @brief 触摸按键通道采样初始化
*/
void TouchKey_ChSampInit(void);
/**
* @brief 关闭TouchKey电源
*/
#define TouchKey_DisableTSPower() (R8_TKEY_CFG &= ~RB_TKEY_PWR_ON)
/**
* @brief 内置温度传感器采样初始化
*/
void ADC_InterTSSampInit(void);
/**
* @brief 关闭温度传感器电源
*/
#define ADC_DisableTSPower() (R8_TEM_SENSOR = 0)
/**
* @brief 内置电池电压采样初始化
*/
void ADC_InterBATSampInit(void);
/**
* @brief ADC执行单次转换
*
* @return ADC转换后的数据
*/
uint16_t ADC_ExcutSingleConver(void);
/**
* @brief 采样数据粗调,获取偏差值,必须先配置ADC后调用此函数获取校准值
*
* @return 偏差
*/
signed short ADC_DataCalib_Rough(void);
/**
* @brief TouchKey转换后数据
*
* @param charg - Touchkey充电时间,5bits有效, t=charg*Tadc
* @param disch - Touchkey放电时间,3bits有效, t=disch*Tadc
*
* @return 当前TouchKey等效数据
*/
uint16_t TouchKey_ExcutSingleConver(uint8_t charg, uint8_t disch);
/**
* @brief 设置连续 ADC的周期
*
* @param cycle - 单位为 16个系统时钟
*/
void ADC_AutoConverCycle(uint8_t cycle);
/**
* @brief 配置DMA功能
*
* @param s - 是否打开DMA功能
* @param startAddr - DMA 起始地址
* @param endAddr - DMA 结束地址
* @param m - 配置DMA模式
*/
void ADC_DMACfg(uint8_t s, uint32_t startAddr, uint32_t endAddr, ADC_DMAModeTypeDef m);
/**
* @brief Convert ADC value to temperature(Celsius)
*
* @param adc_val - adc value
*
* @return temperature (Celsius)
*/
int adc_to_temperature_celsius(uint16_t adc_val);
/**
* @brief 获取ADC转换值
*
* @return ADC转换值
*/
#define ADC_ReadConverValue() (R16_ADC_DATA)
/**
* @brief ADC执行单次转换
*/
#define ADC_StartUp() (R8_ADC_CONVERT = RB_ADC_START)
/**
* @brief 获取ADC中断状态
*/
#define ADC_GetITStatus() (R8_ADC_INT_FLAG & RB_ADC_IF_EOC)
/**
* @brief 清除ADC中断标志
*/
#define ADC_ClearITFlag() (R8_ADC_CONVERT = 0)
/**
* @brief 获取ADC DMA完成状态
*/
#define ADC_GetDMAStatus() (R8_ADC_DMA_IF & RB_ADC_IF_DMA_END)
/**
* @brief 清除ADC DMA完成标志
*/
#define ADC_ClearDMAFlag() (R8_ADC_DMA_IF |= RB_ADC_IF_DMA_END)
/**
* @brief 开启定时间隔自动连续 ADC
*/
#define ADC_StartAutoDMA() (R8_ADC_CTRL_DMA |= RB_ADC_AUTO_EN)
/**
* @brief 停止定时间隔自动连续 ADC
*/
#define ADC_StopAutoDMA() (R8_ADC_CTRL_DMA &= ~RB_ADC_AUTO_EN)
/**
* @brief 开启连续转换 ADC
*/
#define ADC_StartContDMA() (R8_ADC_CTRL_DMA |= RB_ADC_CONT_EN)
/**
* @brief 停止连续转换 ADC
*/
#define ADC_StopContDMA() (R8_ADC_CTRL_DMA &= ~RB_ADC_CONT_EN)
/**
* @brief 获取TouchKey中断状态
*/
#define TouchKey_GetITStatus() (R8_ADC_INT_FLAG & RB_ADC_IF_EOC)
/**
* @brief 清除TouchKey中断标志
*/
#define TouchKey_ClearITFlag() (R8_TKEY_CTRL |= RB_TKEY_PWR_ON)
/**
* @brief 关闭ADC电源
*/
#define ADC_DisablePower() (R8_ADC_CFG &= ~RB_ADC_POWER_ON)
#ifdef __cplusplus
}
#endif
#endif // __CH59x_ADC_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_clk.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_CLK_H__
#define __CH59x_CLK_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief 系统主频定义
*/
typedef enum
{
CLK_SOURCE_LSI = 0x00,
CLK_SOURCE_LSE,
CLK_SOURCE_HSE_16MHz = 0x22,
CLK_SOURCE_HSE_8MHz = 0x24,
CLK_SOURCE_HSE_6_4MHz = 0x25,
CLK_SOURCE_HSE_4MHz = 0x28,
CLK_SOURCE_PLL_80MHz = 0x46, // untested, max allowed per datasheet; possibly req'd for BLE
CLK_SOURCE_PLL_60MHz = 0x48,
CLK_SOURCE_PLL_48MHz = (0x40 | 10),
CLK_SOURCE_PLL_32MHz = (0x40 | 15),
CLK_SOURCE_PLL_24MHz = (0x40 | 20),
} SYS_CLKTypeDef;
/**
* @brief 32K时钟选择
*/
typedef enum
{
Clk32K_LSI = 0,
Clk32K_LSE,
} LClk32KTypeDef;
/**
* @brief 32M晶振电流挡位
*/
typedef enum
{
HSE_RCur_75 = 0,
HSE_RCur_100,
HSE_RCur_125,
HSE_RCur_150
} HSECurrentTypeDef;
/**
* @brief 32M晶振内部电容挡位
*/
typedef enum
{
HSECap_10p = 0,
HSECap_12p,
HSECap_14p,
HSECap_16p,
HSECap_18p,
HSECap_20p,
HSECap_22p,
HSECap_24p
} HSECapTypeDef;
/**
* @brief 32K晶振电流挡位
*/
typedef enum
{
LSE_RCur_70 = 0,
LSE_RCur_100,
LSE_RCur_140,
LSE_RCur_200
} LSECurrentTypeDef;
/**
* @brief 32K晶振内部电容挡位
*/
typedef enum
{
LSECap_2p = 0,
LSECap_13p,
LSECap_14p,
LSECap_15p,
LSECap_16p,
LSECap_17p,
LSECap_18p,
LSECap_19p,
LSECap_20p,
LSECap_21p,
LSECap_22p,
LSECap_23p,
LSECap_24p,
LSECap_25p,
LSECap_26p,
LSECap_27p
} LSECapTypeDef;
#define RTC_MAX_COUNT 0xA8C00000
#define MAX_DAY 0x00004000
#define MAX_2_SEC 0x0000A8C0
//#define MAX_SEC 0x545FFFFF
#define BEGYEAR 2020
#define IsLeapYear(yr) (!((yr) % 400) || (((yr) % 100) && !((yr) % 4)))
#define YearLength(yr) (IsLeapYear(yr) ? 366 : 365)
#define monthLength(lpyr, mon) (((mon) == 1) ? (28 + (lpyr)) : (((mon) > 6) ? (((mon) & 1) ? 31 : 30) : (((mon) & 1) ? 30 : 31)))
/**
* @brief rtc timer mode period define
*/
typedef enum
{
Period_0_125_S = 0, // 0.125s 周期
Period_0_25_S, // 0.25s 周期
Period_0_5_S, // 0.5s 周期
Period_1_S, // 1s 周期
Period_2_S, // 2s 周期
Period_4_S, // 4s 周期
Period_8_S, // 8s 周期
Period_16_S, // 16s 周期
} RTC_TMRCycTypeDef;
/**
* @brief rtc interrupt event define
*/
typedef enum
{
RTC_TRIG_EVENT = 0, // RTC 触发事件
RTC_TMR_EVENT, // RTC 周期定时事件
} RTC_EVENTTypeDef;
/**
* @brief rtc interrupt event define
*/
typedef enum
{
RTC_TRIG_MODE = 0, // RTC 触发模式
RTC_TMR_MODE, // RTC 周期定时模式
} RTC_MODETypeDef;
typedef enum
{
/* 校准精度越高，耗时越长 */
Level_32 = 3, // 用时 1.2ms 1000ppm (32M 主频) 1100ppm (60M 主频)
Level_64, // 用时 2.2ms 800ppm (32M 主频) 1000ppm (60M 主频)
Level_128, // 用时 4.2ms 600ppm (32M 主频) 800ppm (60M 主频)
} Cali_LevelTypeDef;
/**
* @brief 32K 低频时钟来源
*
* @param hc - 选择32K使用内部还是外部
*/
void LClk32K_Select(LClk32KTypeDef hc);
/**
* @brief HSE晶体 偏置电流配置
*
* @param c - 75%,100%,125%,150%
*/
void HSECFG_Current(HSECurrentTypeDef c);
/**
* @brief HSE晶体 负载电容配置
*
* @param c - refer to HSECapTypeDef
*/
void HSECFG_Capacitance(HSECapTypeDef c);
/**
* @brief LSE晶体 偏置电流配置
*
* @param c - 70%,100%,140%,200%
*/
void LSECFG_Current(LSECurrentTypeDef c);
/**
* @brief LSE晶体 负载电容配置
*
* @param c - refer to LSECapTypeDef
*/
void LSECFG_Capacitance(LSECapTypeDef c);
void Calibration_LSI(Cali_LevelTypeDef cali_Lv); /* 用主频校准内部32K时钟 */
/**
* @brief RTC时钟初始化当前时间
*
* @param y - 配置年，MAX_Y = BEGYEAR + 44
* @param mon - 配置月，MAX_MON = 12
* @param d - 配置日，MAX_D = 31
* @param h - 配置小时，MAX_H = 23
* @param m - 配置分钟，MAX_M = 59
* @param s - 配置秒，MAX_S = 59
*/
void RTC_InitTime(uint16_t y, uint16_t mon, uint16_t d, uint16_t h, uint16_t m, uint16_t s);
/**
* @brief 获取当前时间
*
* @param py - 获取到的年，MAX_Y = BEGYEAR + 44
* @param pmon - 获取到的月，MAX_MON = 12
* @param pd - 获取到的日，MAX_D = 31
* @param ph - 获取到的小时，MAX_H = 23
* @param pm - 获取到的分钟，MAX_M = 59
* @param ps - 获取到的秒，MAX_S = 59
*/
void RTC_GetTime(uint16_t *py, uint16_t *pmon, uint16_t *pd, uint16_t *ph, uint16_t *pm, uint16_t *ps);
/**
* @brief 基于LSE/LSI时钟，配置当前RTC 周期数
*
* @param cyc - 配置周期计数初值，MAX_CYC = 0xA8BFFFFF = 2831155199
*/
void RTC_SetCycle32k(uint32_t cyc);
/**
* @brief 基于LSE/LSI时钟，获取当前RTC 周期数
*
* @return 当前周期数，MAX_CYC = 0xA8BFFFFF = 2831155199
*/
uint32_t RTC_GetCycle32k(void);
/**
* @brief RTC定时模式配置（注意定时基准固定为32768Hz）
*
* @param t - refer to RTC_TMRCycTypeDef
*/
void RTC_TRIGFunCfg(uint32_t cyc);
/**
* @brief RTC定时模式配置（注意定时基准固定为32768Hz）
*
* @param t - refer to RTC_TMRCycTypeDef
*/
void RTC_TMRFunCfg(RTC_TMRCycTypeDef t);
/**
* @brief RTC 模式功能关闭
*
* @param m - 需要关闭的当前模式
*/
void RTC_ModeFunDisable(RTC_MODETypeDef m);
/**
* @brief 获取RTC中断标志
*
* @param f - refer to RTC_EVENTTypeDef
*
* @return 中断标志状态
*/
uint8_t RTC_GetITFlag(RTC_EVENTTypeDef f);
/**
* @brief 清除RTC中断标志
*
* @param f - refer to RTC_EVENTTypeDef
*/
void RTC_ClearITFlag(RTC_EVENTTypeDef f);
/**
* @brief 32K 低频时钟电源配置
*/
void LClk32K_Cfg(LClk32KTypeDef hc, FunctionalState s);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_CLK_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_common.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_COMM_H__
#define __CH59x_COMM_H__
#ifdef __cplusplus
extern "C" {
#endif
#ifndef NULL
#define NULL 0
#endif
#define ALL 0xFFFF
#ifndef __HIGH_CODE
#define __HIGH_CODE __attribute__((section(".highcode")))
#endif
#ifndef __INTERRUPT
#ifdef INT_SOFT
#define __INTERRUPT __attribute__((interrupt()))
#else
#define __INTERRUPT __attribute__((interrupt("WCH-Interrupt-fast")))
#endif
#endif
#define Debug_UART0 0
#define Debug_UART1 1
#define Debug_UART2 2
#define Debug_UART3 3
#ifdef DEBUG
#include <stdio.h>
#endif
/**
* @brief 系统主频时钟（Hz）
*/
#ifndef FREQ_SYS
#define FREQ_SYS 60000000
#endif
#ifndef SAFEOPERATE
#define SAFEOPERATE __nop();__nop()
#endif
/**
* @brief 32K时钟（Hz）
*/
#ifdef CLK_OSC32K
#if ( CLK_OSC32K == 1 )
#define CAB_LSIFQ 32000
#else
#define CAB_LSIFQ 32768
#endif
#else
#define CAB_LSIFQ 32000
#endif
#include <string.h>
#include <stdint.h>
#include "CH592SFR.h"
#include "core_riscv.h"
#include "CH59x_clk.h"
#include "CH59x_uart.h"
#include "CH59x_gpio.h"
#include "CH59x_i2c.h"
#include "CH59x_flash.h"
#include "CH59x_pwr.h"
#include "CH59x_pwm.h"
#include "CH59x_adc.h"
#include "CH59x_sys.h"
#include "CH59x_timer.h"
#include "CH59x_spi.h"
#include "CH59x_usbdev.h"
#include "CH59x_usbhost.h"
#include "ISP592.h"
#define DelayMs(x) mDelaymS(x)
#define DelayUs(x) mDelayuS(x)
#define ROM_CFG_VERISON 0x7F010
#ifdef __cplusplus
}
#endif
#endif // __CH59x_COMM_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_flash.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_FLASH_H__
#define __CH59x_FLASH_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief ÁÈ¡Flash-ROM
*
* @param StartAddr - read address
* @param Buffer - read buffer
* @param len - read len
*/
void FLASH_ROM_READ(uint32_t StartAddr, void *Buffer, uint32_t len);
UINT8 UserOptionByteConfig(FunctionalState RESET_EN, FunctionalState BOOT_PIN, FunctionalState UART_NO_KEY_EN,
uint32_t FLASHProt_Size);
UINT8 UserOptionByteClose_SWD(void);
void UserOptionByte_Active(void);
void GET_UNIQUE_ID(uint8_t *Buffer);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_FLASH_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_gpio.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_GPIO_H__
#define __CH59x_GPIO_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO_pins_define
*/
#define GPIO_Pin_0 (0x00000001) /*!< Pin 0 selected */
#define GPIO_Pin_1 (0x00000002) /*!< Pin 1 selected */
#define GPIO_Pin_2 (0x00000004) /*!< Pin 2 selected */
#define GPIO_Pin_3 (0x00000008) /*!< Pin 3 selected */
#define GPIO_Pin_4 (0x00000010) /*!< Pin 4 selected */
#define GPIO_Pin_5 (0x00000020) /*!< Pin 5 selected */
#define GPIO_Pin_6 (0x00000040) /*!< Pin 6 selected */
#define GPIO_Pin_7 (0x00000080) /*!< Pin 7 selected */
#define GPIO_Pin_8 (0x00000100) /*!< Pin 8 selected */
#define GPIO_Pin_9 (0x00000200) /*!< Pin 9 selected */
#define GPIO_Pin_10 (0x00000400) /*!< Pin 10 selected */
#define GPIO_Pin_11 (0x00000800) /*!< Pin 11 selected */
#define GPIO_Pin_12 (0x00001000) /*!< Pin 12 selected */
#define GPIO_Pin_13 (0x00002000) /*!< Pin 13 selected */
#define GPIO_Pin_14 (0x00004000) /*!< Pin 14 selected */
#define GPIO_Pin_15 (0x00008000) /*!< Pin 15 selected */
#define GPIO_Pin_16 (0x00010000) /*!< Pin 16 selected */
#define GPIO_Pin_17 (0x00020000) /*!< Pin 17 selected */
#define GPIO_Pin_18 (0x00040000) /*!< Pin 18 selected */
#define GPIO_Pin_19 (0x00080000) /*!< Pin 19 selected */
#define GPIO_Pin_20 (0x00100000) /*!< Pin 20 selected */
#define GPIO_Pin_21 (0x00200000) /*!< Pin 21 selected */
#define GPIO_Pin_22 (0x00400000) /*!< Pin 22 selected */
#define GPIO_Pin_23 (0x00800000) /*!< Pin 23 selected */
#define GPIO_Pin_All (0xFFFFFFFF) /*!< All pins selected */
/**
* @brief Configuration GPIO Mode
*/
typedef enum
{
GPIO_ModeIN_Floating, //浮空输入
GPIO_ModeIN_PU, //上拉输入
GPIO_ModeIN_PD, //下拉输入
GPIO_ModeOut_PP_5mA, //推挽输出最大5mA
GPIO_ModeOut_PP_20mA, //推挽输出最大20mA
} GPIOModeTypeDef;
/**
* @brief Configuration GPIO IT Mode
*/
typedef enum
{
GPIO_ITMode_LowLevel, //低电平触发
GPIO_ITMode_HighLevel, //高电平触发
GPIO_ITMode_FallEdge, //下降沿触发
GPIO_ITMode_RiseEdge, //上升沿触发
} GPIOITModeTpDef;
/**
* @brief GPIOA端口引脚模式配置
*
* @param pin - PA0-PA15
* @param mode - 输入输出类型
*/
void GPIOA_ModeCfg(uint32_t pin, GPIOModeTypeDef mode);
/**
* @brief GPIOB端口引脚模式配置
*
* @param pin - PB0-PB23
* @param mode - 输入输出类型
*/
void GPIOB_ModeCfg(uint32_t pin, GPIOModeTypeDef mode);
/**
* @brief GPIOA端口引脚输出置低
*
* @param pin - PA0-PA15
*/
#define GPIOA_ResetBits(pin) (R32_PA_CLR |= pin)
/**
* @brief GPIOA端口引脚输出置高
*
* @param pin - PA0-PA15
*/
#define GPIOA_SetBits(pin) (R32_PA_OUT |= pin)
/**
* @brief GPIOB端口引脚输出置低
*
* @param pin - PB0-PB23
*/
#define GPIOB_ResetBits(pin) (R32_PB_CLR |= pin)
/**
* @brief GPIOB端口引脚输出置高
*
* @param pin - PB0-PB23
*/
#define GPIOB_SetBits(pin) (R32_PB_OUT |= pin)
/**
* @brief GPIOA端口引脚输出电平翻转
*
* @param pin - PA0-PA15
*/
#define GPIOA_InverseBits(pin) (R32_PA_OUT ^= pin)
/**
* @brief GPIOB端口引脚输出电平翻转
*
* @param pin - PB0-PB23
*/
#define GPIOB_InverseBits(pin) (R32_PB_OUT ^= pin)
/**
* @brief GPIOA端口32位数据返回，低16位有效
*
* @return GPIOA端口32位数据
*/
#define GPIOA_ReadPort() (R32_PA_PIN)
/**
* @brief GPIOB端口32位数据返回，低24位有效
*
* @return GPIOB端口32位数据
*/
#define GPIOB_ReadPort() (R32_PB_PIN)
/**
* @brief GPIOA端口引脚状态，0-引脚低电平，(!0)-引脚高电平
*
* @param pin - PA0-PA15
*
* @return GPIOA端口引脚状态
*/
#define GPIOA_ReadPortPin(pin) (R32_PA_PIN & (pin))
/**
* @brief GPIOB端口引脚状态，0-引脚低电平，(!0)-引脚高电平
*
* @param pin - PB0-PB23
*
* @return GPIOB端口引脚状态
*/
#define GPIOB_ReadPortPin(pin) (R32_PB_PIN & (pin))
/**
* @brief GPIOA引脚中断模式配置
*
* @param pin - PA0-PA15
* @param mode - 触发类型
*/
void GPIOA_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode);
/**
* @brief GPIOB引脚中断模式配置
*
* @param pin - PB0-PB23
* @param mode - 触发类型
*/
void GPIOB_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode);
/**
* @brief 读取GPIOA端口中断标志状态
*
* @return GPIOA端口中断标志状态
*/
#define GPIOA_ReadITFlagPort() (R16_PA_INT_IF)
/**
* @brief 读取GPIOB端口中断标志状态
*
* @return GPIOB端口中断标志状态
*/
#define GPIOB_ReadITFlagPort() ((R16_PB_INT_IF & (~((GPIO_Pin_22 | GPIO_Pin_23) >> 14))) | ((R16_PB_INT_IF << 14) & (GPIO_Pin_22 | GPIO_Pin_23)))
/**
* @brief 读取GPIOA端口引脚中断标志状态
*
* @param pin - PA0-PA15
*
* @return GPIOA端口引脚中断标志状态
*/
#define GPIOA_ReadITFlagBit(pin) (R16_PA_INT_IF & (pin))
/**
* @brief 读取GPIOB端口引脚中断标志状态
*
* @param pin - PB0-PB23
*
* @return GPIOB端口引脚中断标志状态
*/
#define GPIOB_ReadITFlagBit(pin) (R16_PB_INT_IF & ((pin) | (((pin) & (GPIO_Pin_22 | GPIO_Pin_23)) >> 14)))
/**
* @brief 清除GPIOA端口引脚中断标志状态
*
* @param pin - PA0-PA15
*/
#define GPIOA_ClearITFlagBit(pin) (R16_PA_INT_IF = pin)
/**
* @brief 清除GPIOB端口引脚中断标志状态
*
* @param pin - PB0-PB23
*/
#define GPIOB_ClearITFlagBit(pin) (R16_PB_INT_IF = ((pin) | (((pin) & (GPIO_Pin_22 | GPIO_Pin_23)) >> 14)))
/**
* @brief 外设功能引脚映射
*
* @param s - 是否使能映射
* @param perph - RB_RF_ANT_SW_EN - RF antenna switch control output on PB16/PB17/PB18/PB19/PB20/PB21
* RB_PIN_U0_INV - RXD0/RXD0_/TXD0/TXD0_ invert input/output
* RB_PIN_INTX - INTX: INT24/INT25 PB8/PB9 -> INT24_/INT25_ PB22/PB23
* RB_PIN_MODEM - MODEM: PB1/PB5 -> PB14/PB15
* RB_PIN_I2C - I2C: PB13/PB12 -> PB21/PB20
* RB_PIN_PWMX - PWMX: PA12/PA13/PB4/PB6/PB7 -> PA6/PA7/PB1/PB2/PB3
* RB_PIN_SPI0 - SPI0: PA12/PA13/PA14/PA15 -> PB12/PB13/PB14/PB15
* RB_PIN_UART3 - UART3: PA4/PA5 -> PB20/PB21
* RB_PIN_UART2 - UART2: PA6/PA7 -> PB22/PB23
* RB_PIN_UART1 - UART1: PA8/PA9 -> PB12/PB13
* RB_PIN_UART0 - UART0: PB4/PB7 -> PA15/PA14
* RB_PIN_TMR3 - TMR2: PA9 -> PB23
* RB_PIN_TMR2 - TMR2: PA11 -> PB11
* RB_PIN_TMR1 - TMR1: PA10 -> PB10
* RB_PIN_TMR0 - TMR0: PA9 -> PB23
*/
void GPIOPinRemap(FunctionalState s, uint16_t perph);
/**
* @brief 模拟外设GPIO引脚功能控制
*
* @param s - 是否启用模拟外设功能
* @param perph - RB_PIN_ADC8_9_IE - ADC/TKEY 9/8通道
* RB_PIN_ADC6_7_IE - ADC/TKEY 7/6通道
* RB_PIN_ADC10_IE - ADC/TKEY 10通道
* RB_PIN_ADC11_IE - ADC/TKEY 11 通道
* RB_PIN_USB2_DP_PU - USB2 U2D+引脚内部上拉电阻
* RB_PIN_USB2_IE - USB2引脚
* RB_PIN_USB_DP_PU - USB UD+引脚内部上拉电阻
* RB_PIN_USB_IE - USB 引脚
* RB_PIN_ADC0_IE - ADC/TKEY 0 通道
* RB_PIN_ADC1_IE - ADC/TKEY 1 通道
* RB_PIN_ADC12_IE - ADC/TKEY 12 通道
* RB_PIN_ADC13_IE - ADC/TKEY 13 通道
* RB_PIN_XT32K_IE - 32KHz晶振LSE引脚
* RB_PIN_ADC2_3_IE - ADC/TKEY 2/3 通道
* RB_PIN_ADC4_5_IE - ADC/TKEY 4/5 通道
*/
void GPIOAGPPCfg(FunctionalState s, uint16_t perph);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_GPIO_H__

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#ifndef __CH59x_I2C_H__
#define __CH59x_I2C_H__
#ifdef __cplusplus
extern "C" {
#endif
/* I2C_transfer_direction */
#define I2C_Direction_Transmitter ((uint8_t)0x00)
#define I2C_Direction_Receiver ((uint8_t)0x01)
/* I2C ADD0 mask */
#define OADDR1_ADD0_Set ((uint16_t)0x0001)
#define OADDR1_ADD0_Reset ((uint16_t)0xFFFE)
/* I2C_NACK_position */
#define I2C_NACKPosition_Next ((uint16_t)RB_I2C_POS)
#define I2C_NACKPosition_Current ((uint16_t)~RB_I2C_POS)
/* I2C_PEC_position */
#define I2C_PECPosition_Next ((uint16_t)RB_I2C_POS)
#define I2C_PECPosition_Current ((uint16_t)~RB_I2C_POS)
/* I2C_SMBus_alert_pin_level */
#define I2C_SMBusAlert_Low ((uint16_t)RB_I2C_ALERT)
#define I2C_SMBusAlert_High ((uint16_t)~RB_I2C_ALERT)
/* I2C FLAG mask */
#define FLAG_Mask ((uint32_t)0x00FFFFFF)
/* I2C Interrupt Enable mask */
#define ITEN_Mask ((uint32_t)0x07000000)
/* I2C_mode */
typedef enum
{
I2C_Mode_I2C = 0x0000,
I2C_Mode_SMBusDevice = 0x0002,
I2C_Mode_SMBusHost = 0x000A,
} I2C_ModeTypeDef;
/* I2C_duty_cycle_in_fast_mode */
typedef enum
{
I2C_DutyCycle_16_9 = RB_I2C_DUTY, /* I2C fast mode Tlow/Thigh = 16/9 */
I2C_DutyCycle_2 = 0x0000, /* I2C fast mode Tlow/Thigh = 2 */
} I2C_DutyTypeDef;
/* I2C_acknowledgement - Enables or disables the acknowledgement.*/
typedef enum
{
I2C_Ack_Enable = RB_I2C_ACK,
I2C_Ack_Disable = 0x0000,
} I2C_AckTypeDef;
/* I2C_acknowledged_address - Specifies if 7-bit or 10-bit address is acknowledged. */
typedef enum
{
I2C_AckAddr_7bit = 0x4000,
I2C_AckAddr_10bit = 0xC000,
} I2C_AckAddrTypeDef;
/* I2C_interrupts_definition */
typedef enum
{
I2C_IT_BUF = 0x0400, /* Buffer interrupt mask. */
I2C_IT_EVT = 0x0200, /* Event interrupt mask. */
I2C_IT_ERR = 0x0100, /* Error interrupt mask. */
} I2C_ITTypeDef;
/* I2C_interrupts_definition */
#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
#define I2C_IT_PECERR ((uint32_t)0x01001000)
#define I2C_IT_OVR ((uint32_t)0x01000800)
#define I2C_IT_AF ((uint32_t)0x01000400)
#define I2C_IT_ARLO ((uint32_t)0x01000200)
#define I2C_IT_BERR ((uint32_t)0x01000100)
#define I2C_IT_TXE ((uint32_t)0x06000080)
#define I2C_IT_RXNE ((uint32_t)0x06000040)
#define I2C_IT_STOPF ((uint32_t)0x02000010)
#define I2C_IT_ADD10 ((uint32_t)0x02000008)
#define I2C_IT_BTF ((uint32_t)0x02000004)
#define I2C_IT_ADDR ((uint32_t)0x02000002)
#define I2C_IT_SB ((uint32_t)0x02000001)
/* SR2 register flags */
#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
#define I2C_FLAG_TRA ((uint32_t)0x00040000)
#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
#define I2C_FLAG_MSL ((uint32_t)0x00010000)
/* SR1 register flags */
#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
#define I2C_FLAG_OVR ((uint32_t)0x10000800)
#define I2C_FLAG_AF ((uint32_t)0x10000400)
#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
#define I2C_FLAG_BERR ((uint32_t)0x10000100)
#define I2C_FLAG_TXE ((uint32_t)0x10000080)
#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
#define I2C_FLAG_BTF ((uint32_t)0x10000004)
#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
#define I2C_FLAG_SB ((uint32_t)0x10000001)
/****************I2C Master Events (Events grouped in order of communication)********************/
#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
/******************I2C Slave Events (Events grouped in order of communication)******************/
#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
void I2C_Init(I2C_ModeTypeDef I2C_Mode, UINT32 I2C_ClockSpeed, I2C_DutyTypeDef I2C_DutyCycle,
I2C_AckTypeDef I2C_Ack, I2C_AckAddrTypeDef I2C_AckAddr, UINT16 I2C_OwnAddress1);
void I2C_Cmd(FunctionalState NewState);
void I2C_GenerateSTART(FunctionalState NewState);
void I2C_GenerateSTOP(FunctionalState NewState);
void I2C_AcknowledgeConfig(FunctionalState NewState);
void I2C_OwnAddress2Config(uint8_t Address);
void I2C_DualAddressCmd(FunctionalState NewState);
void I2C_GeneralCallCmd(FunctionalState NewState);
void I2C_ITConfig(I2C_ITTypeDef I2C_IT, FunctionalState NewState);
void I2C_SendData(uint8_t Data);
uint8_t I2C_ReceiveData(void);
void I2C_Send7bitAddress(uint8_t Address, uint8_t I2C_Direction);
void I2C_SoftwareResetCmd(FunctionalState NewState);
void I2C_NACKPositionConfig(uint16_t I2C_NACKPosition);
void I2C_SMBusAlertConfig(uint16_t I2C_SMBusAlert);
void I2C_TransmitPEC(FunctionalState NewState);
void I2C_PECPositionConfig(uint16_t I2C_PECPosition);
void I2C_CalculatePEC(FunctionalState NewState);
uint8_t I2C_GetPEC(void);
void I2C_ARPCmd(FunctionalState NewState);
void I2C_StretchClockCmd(FunctionalState NewState);
void I2C_FastModeDutyCycleConfig(uint16_t I2C_DutyCycle);
/****************************************************************************************
* I2C State Monitoring Functions
****************************************************************************************/
uint8_t I2C_CheckEvent(uint32_t I2C_EVENT);
uint32_t I2C_GetLastEvent(void);
FlagStatus I2C_GetFlagStatus(uint32_t I2C_FLAG);
void I2C_ClearFlag(uint32_t I2C_FLAG);
ITStatus I2C_GetITStatus(uint32_t I2C_IT);
void I2C_ClearITPendingBit(uint32_t I2C_IT);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_I2C_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_lcd.h
* Author : WCH
* Version : V1.0
* Date : 2022/12/05
* Description :
********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_LCD_H__
#define __CH59x_LCD_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "CH592SFR.h"
/**
* @brief Configuration LCD driver power
*/
typedef enum
{
LCD_PS_3V3 = 0, // 3.3V 驱动
LCD_PS_2V5, // 2.5V 驱动
}LCDDrvPowerTypeDef;
/**
* @brief Configuration LCD bias
*/
typedef enum
{
LCD_1_2_Bias = 0, // 2级分压
LCD_1_3_Bias, // 3级分压
}LCDBiasTypeDef;
/**
* @brief Configuration LCD duty
*/
typedef enum
{
LCD_1_2_Duty = 0, // COM0-COM1
LCD_1_3_Duty, // COM0-COM2
LCD_1_4_Duty, // COM0-COM3
}LCDDutyTypeDef;
/**
* @brief Configuration LCD scan clk
*/
typedef enum
{
LCD_CLK_256 = 0, // 256Hz
LCD_CLK_512, // 512Hz
LCD_CLK_1000, // 1KHz
LCD_CLK_128 // 128Hz
}LCDSCANCLKTypeDef;
/* LCD段式屏驱动初始化配置 */
void LCD_Init(LCDDutyTypeDef duty, LCDBiasTypeDef bias);
#define LCD_PowerDown() (R32_LCD_CMD &= ~(RB_LCD_ON | RB_LCD_SYS_EN)) /* LCD功能模块关闭 */
#define LCD_PowerOn() (R32_LCD_CMD |= (RB_LCD_ON | RB_LCD_SYS_EN)) /* LCD功能模块开启 */
// 输入值参考 LCDDrvPowerTypeDef
#define LCD_PowerCfg( d ) (R32_LCD_CMD = (R32_LCD_CMD & ~RB_LCD_VLCD_SEL) | (d<<7)) /* 配置LCD的 供电电压选择 */
// 输入值参考 LCDSCANCLKTypeDef
#define LCD_ScanCLKCfg( d ) (R32_LCD_CMD = (R32_LCD_CMD & ~RB_LCD_SCAN_CLK) | (d<<5)) /* 配置LCD的 扫描时钟选择 */
// 输入值参考 LCDDutyTypeDef
#define LCD_DutyCfg( d ) (R32_LCD_CMD = (R32_LCD_CMD & ~RB_LCD_DUTY) | (d<<3)) /* 配置LCD的 duty选择 */
// 输入值参考 LCDBiasTypeDef
#define LCD_BiasCfg( d ) (R32_LCD_CMD = (R32_LCD_CMD & ~RB_LCD_BIAS) | (d<<2)) /* 配置LCD的 bias选择 */
#define LCD_WriteData0( d ) (R32_LCD_RAM0 = (R32_LCD_RAM0 & 0xffffff00) | ((UINT32)d)) /* 填充SEG0驱动数值 */
#define LCD_WriteData1( d ) (R32_LCD_RAM0 = (R32_LCD_RAM0 & 0xffff00ff) | ((UINT32)d<<8)) /* 填充SEG1驱动数值 */
#define LCD_WriteData2( d ) (R32_LCD_RAM0 = (R32_LCD_RAM0 & 0xff00ffff) | ((UINT32)d<<16)) /* 填充SEG2驱动数值 */
#define LCD_WriteData3( d ) (R32_LCD_RAM0 = (R32_LCD_RAM0 & 0x00ffffff) | ((UINT32)d<<24)) /* 填充SEG3驱动数值 */
#define LCD_WriteData4( d ) (R32_LCD_RAM1 = (R32_LCD_RAM1 & 0xffffff00) | ((UINT32)d)) /* 填充SEG4驱动数值 */
#define LCD_WriteData5( d ) (R32_LCD_RAM1 = (R32_LCD_RAM1 & 0xffff00ff) | ((UINT32)d<<8)) /* 填充SEG5驱动数值 */
#define LCD_WriteData6( d ) (R32_LCD_RAM1 = (R32_LCD_RAM1 & 0xff00ffff) | ((UINT32)d<<16)) /* 填充SEG6驱动数值 */
#define LCD_WriteData7( d ) (R32_LCD_RAM1 = (R32_LCD_RAM1 & 0x00ffffff) | ((UINT32)d<<24)) /* 填充SEG7驱动数值 */
#define LCD_WriteData8( d ) (R32_LCD_RAM2 = (R32_LCD_RAM2 & 0xffffff00) | ((UINT32)d)) /* 填充SEG8驱动数值 */
#define LCD_WriteData9( d ) (R32_LCD_RAM2 = (R32_LCD_RAM2 & 0xffff00ff) | ((UINT32)d<<8)) /* 填充SEG9驱动数值 */
#define LCD_WriteData10( d ) (R32_LCD_RAM2 = (R32_LCD_RAM2 & 0xff00ffff) | ((UINT32)d<<16)) /* 填充SEG10驱动数值 */
#ifdef __cplusplus
}
#endif
#endif // __CH59x_LCD_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_pwm.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_PWM_H__
#define __CH59x_PWM_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief channel of PWM define
*/
#define CH_PWM4 0x01 // PWM4 通道
#define CH_PWM5 0x02 // PWM5 通道
#define CH_PWM6 0x04 // PWM6 通道
#define CH_PWM7 0x08 // PWM7 通道
#define CH_PWM8 0x10 // PWM8 通道
#define CH_PWM9 0x20 // PWM9 通道
#define CH_PWM10 0x40 // PWM10 通道
#define CH_PWM11 0x80 // PWM11 通道
/**
* @brief channel of PWM define
*/
typedef enum
{
High_Level = 0, // 默认低电平，高电平有效
Low_Level, // 默认高电平，低电平有效
} PWMX_PolarTypeDef;
/**
* @brief Configuration PWM4_11 Cycle size
*/
typedef enum
{
PWMX_Cycle_256 = 0, // 256 个PWMX周期
PWMX_Cycle_255, // 255 个PWMX周期
PWMX_Cycle_128, // 128 个PWMX周期
PWMX_Cycle_127, // 127 个PWMX周期
PWMX_Cycle_64, // 64 个PWMX周期
PWMX_Cycle_63, // 63 个PWMX周期
} PWMX_CycleTypeDef;
/**
* @brief PWM4-PWM11 通道基准时钟配置
*
* @param d - 通道基准时钟 = d*Tsys
*/
#define PWMX_CLKCfg(d) (R8_PWM_CLOCK_DIV = d)
/**
* @brief PWM4-PWM11周期配置
*
* @param cyc - refer to PWMX_CycleTypeDef
*/
void PWMX_CycleCfg(PWMX_CycleTypeDef cyc);
/**
* @brief PWM4-PWM9 16位周期配置
*
* @param cyc - 16位周期
*/
void PWMX_16bit_CycleCfg(uint16_t cyc);
/**
* @brief 设置 PWM4 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM4_ActDataWidth(d) (R8_PWM4_DATA = d)
/**
* @brief 设置 PWM5 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM5_ActDataWidth(d) (R8_PWM5_DATA = d)
/**
* @brief 设置 PWM6 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM6_ActDataWidth(d) (R8_PWM6_DATA = d)
/**
* @brief 设置 PWM7 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM7_ActDataWidth(d) (R8_PWM7_DATA = d)
/**
* @brief 设置 PWM8 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM8_ActDataWidth(d) (R8_PWM8_DATA = d)
/**
* @brief 设置 PWM9 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM9_ActDataWidth(d) (R8_PWM9_DATA = d)
/**
* @brief 设置 PWM10 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM10_ActDataWidth(d) (R8_PWM10_DATA = d)
/**
* @brief 设置 PWM11 有效数据脉宽
*
* @param d - 有效数据脉宽
*/
#define PWM11_ActDataWidth(d) (R8_PWM11_DATA = d)
/**
* @brief PWM4-PWM11通道输出波形配置
*
* @param ch - select channel of pwm, refer to channel of PWM define
* @param da - effective pulse width
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param s - control pwmx function, ENABLE or DISABLE
*/
void PWMX_ACTOUT(uint8_t ch, uint8_t da, PWMX_PolarTypeDef pr, FunctionalState s);
/**
* @brief PWM4-PWM9 通道16位输出波形配置
*
* @param ch - select channel of pwm, refer to channel of PWM define
* @param da - effective pulse width
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param s - control pwmx function, ENABLE or DISABLE
*/
void PWMX_16bit_ACTOUT(uint8_t ch, uint16_t da, PWMX_PolarTypeDef pr, FunctionalState s);
/**
* @brief PWM 交替输出模式配置
*
* @param ch - select group of PWM alternate output
* RB_PWM4_5_STAG_EN - PWM4 和 PWM5 通道交替输出
* RB_PWM6_7_STAG_EN - PWM6 和 PWM7 通道交替输出
* RB_PWM8_9_STAG_EN - PWM8 和 PWM9 通道交替输出
* RB_PWM10_11_STAG_EN - PWM10 和 PWM11 通道交替输出
* @param s - control pwmx function, ENABLE or DISABLE
*/
void PWMX_AlterOutCfg(uint8_t ch, FunctionalState s);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_PWM_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_pwr.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_PWR_H__
#define __CH59x_PWR_H__
#ifdef __cplusplus
extern "C" {
#endif
#define ROM_CFG_ADR_HW 0x7F00C // config address for hardware config for LDO&OSC and etc
/**
* @brief Peripher CLK control bit define
*/
#define BIT_SLP_CLK_TMR0 (0x00000001) /*!< TMR0 peripher clk bit */
#define BIT_SLP_CLK_TMR1 (0x00000002) /*!< TMR1 peripher clk bit */
#define BIT_SLP_CLK_TMR2 (0x00000004) /*!< TMR2 peripher clk bit */
#define BIT_SLP_CLK_TMR3 (0x00000008) /*!< TMR3 peripher clk bit */
#define BIT_SLP_CLK_UART0 (0x00000010) /*!< UART0 peripher clk bit */
#define BIT_SLP_CLK_UART1 (0x00000020) /*!< UART1 peripher clk bit */
#define BIT_SLP_CLK_UART2 (0x00000040) /*!< UART2 peripher clk bit */
#define BIT_SLP_CLK_UART3 (0x00000080) /*!< UART3 peripher clk bit */
#define BIT_SLP_CLK_SPI0 (0x00000100) /*!< SPI0 peripher clk bit */
//#define BIT_SLP_CLK_SPI1 (0x00000200) /*!< SPI1 peripher clk bit */
#define BIT_SLP_CLK_PWMX (0x00000400) /*!< PWMX peripher clk bit */
//#define BIT_SLP_CLK_LCD (0x00000800) /*!< LCD peripher clk bit */
#define BIT_SLP_CLK_USB (0x00001000) /*!< USB peripher clk bit */
//#define BIT_SLP_CLK_ETH (0x00002000) /*!< ETH peripher clk bit */
//#define BIT_SLP_CLK_LED (0x00004000) /*!< LED peripher clk bit */
#define BIT_SLP_CLK_BLE (0x00008000) /*!< BLE peripher clk bit */
#define BIT_SLP_CLK_RAMX (0x10000000) /*!< main SRAM RAM16K peripher clk bit */
#define BIT_SLP_CLK_RAM2K (0x20000000) /*!< RAM2K peripher clk bit */
#define BIT_SLP_CLK_ALL (0x3000FFFF) /*!< All peripher clk bit */
/**
* @brief unit of controllable power supply
*/
#define UNIT_SYS_LSE RB_CLK_XT32K_PON // 外部32K 时钟振荡
#define UNIT_SYS_LSI RB_CLK_INT32K_PON // 内部32K 时钟振荡
#define UNIT_SYS_HSE RB_CLK_XT32M_PON // 外部32M 时钟振荡
#define UNIT_SYS_PLL RB_CLK_PLL_PON // PLL 时钟振荡
/**
* @brief wakeup mode define
*/
typedef enum
{
Short_Delay = 0,
Long_Delay,
} WakeUP_ModeypeDef;
/**
* @brief wakeup mode define
*/
typedef enum
{
/* 下面等级将使用高精度监控，210uA消耗 */
HALevel_1V9 = 0, // 1.7-1.9
HALevel_2V1, // 1.9-2.1
HALevel_2V3, // 2.1-2.3
HALevel_2V5, // 2.3-2.5
/* 下面等级将使用低功耗监控，1uA消耗 */
LPLevel_1V8 = 0x80,
LPLevel_1V9,
LPLevel_2V0,
LPLevel_2V1,
LPLevel_2V2,
LPLevel_2V3,
LPLevel_2V4,
LPLevel_2V5,
} VolM_LevelypeDef;
/**
* @brief 启用内部DC/DC电源，用于节约系统功耗
*
* @param s - 是否打开DCDC电源
*/
void PWR_DCDCCfg(FunctionalState s);
/**
* @brief 可控单元模块的电源控制
*
* @param s - 是否打开电源
* @param unit - please refer to unit of controllable power supply
*/
void PWR_UnitModCfg(FunctionalState s, uint8_t unit);
/**
* @brief 外设时钟控制位
*
* @param s - 是否打开对应外设时钟
* @param perph - please refer to Peripher CLK control bit define
*/
void PWR_PeriphClkCfg(FunctionalState s, uint16_t perph);
/**
* @brief 睡眠唤醒源配置
*
* @param s - 是否打开此外设睡眠唤醒功能
* @param perph - 需要设置的唤醒源
* RB_SLP_USB_WAKE - USB 为唤醒源
* RB_SLP_RTC_WAKE - RTC 为唤醒源
* RB_SLP_GPIO_WAKE - GPIO 为唤醒源
* RB_SLP_BAT_WAKE - BAT 为唤醒源
* @param mode - refer to WakeUP_ModeypeDef
*/
void PWR_PeriphWakeUpCfg(FunctionalState s, uint8_t perph, WakeUP_ModeypeDef mode);
/**
* @brief 电源监控
*
* @param s - 是否打开此功能
* @param vl - refer to VolM_LevelypeDef
*/
void PowerMonitor(FunctionalState s, VolM_LevelypeDef vl);
/**
* @brief 低功耗-Idle模式
*/
void LowPower_Idle(void);
/**
* @brief 低功耗-Halt模式，此低功耗切到HSI/5时钟运行，唤醒后需要用户自己重新选择系统时钟源
*/
void LowPower_Halt(void);
/**
* @brief 低功耗-Sleep模式，此低功耗切到HSI/5时钟运行，唤醒后需要用户自己重新选择系统时钟源
* @note 注意调用此函数，DCDC功能强制关闭，唤醒后可以手动再次打开
*
* @param rm - 供电模块选择
* RB_PWR_RAM2K - 2K retention SRAM 供电
* RB_PWR_RAM16K - 16K main SRAM 供电
* RB_PWR_EXTEND - USB 和 BLE 单元保留区域供电
* RB_PWR_XROM - FlashROM 供电
* NULL - 以上单元都断电
*/
void LowPower_Sleep(uint16_t rm);
/**
* @brief 低功耗-Shutdown模式，此低功耗切到HSI/5时钟运行，唤醒后需要用户自己重新选择系统时钟源
* @note 注意调用此函数，DCDC功能强制关闭，唤醒后可以手动再次打开
*
* @param rm - 供电模块选择
* RB_PWR_RAM2K - 2K retention SRAM 供电
* RB_PWR_RAM16K - 16K main SRAM 供电
* NULL - 以上单元都断电
*/
void LowPower_Shutdown(uint16_t rm);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_PWR_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_SPI.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_SPI_H__
#define __CH59x_SPI_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief SPI0 interrupt bit define
*/
#define SPI0_IT_FST_BYTE RB_SPI_IE_FST_BYTE // 从机模式的首字节命令模式下，接收到首字节中断
#define SPI0_IT_FIFO_OV RB_SPI_IE_FIFO_OV // FIFO 溢出
#define SPI0_IT_DMA_END RB_SPI_IE_DMA_END // DMA 传输结束
#define SPI0_IT_FIFO_HF RB_SPI_IE_FIFO_HF // FIFO 使用过半
#define SPI0_IT_BYTE_END RB_SPI_IE_BYTE_END // 单字节传输完成
#define SPI0_IT_CNT_END RB_SPI_IE_CNT_END // 全部字节传输完成
/**
* @brief Configuration data mode
*/
typedef enum
{
Mode0_LowBitINFront = 0, // 模式0，低位在前
Mode0_HighBitINFront, // 模式0，高位在前
Mode3_LowBitINFront, // 模式3，低位在前
Mode3_HighBitINFront, // 模式3，高位在前
} ModeBitOrderTypeDef;
/**
* @brief Configuration SPI0 slave mode
*/
typedef enum
{
Mode_DataStream = 0, // 数据流模式
Mose_FirstCmd, // 首字节命令模式
} Slave_ModeTypeDef;
/**
* @brief 主机模式默认初始化：模式0+3线全双工+8MHz
*/
void SPI0_MasterDefInit(void);
/**
* @brief SPI0 基准时钟配置，= d*Tsys
*
* @param c - 时钟分频系数
*/
void SPI0_CLKCfg(uint8_t c);
/**
* @brief 设置数据流模式
*
* @param m - 数据流模式 refer to ModeBitOrderTypeDef
*/
void SPI0_DataMode(ModeBitOrderTypeDef m);
/**
* @brief 发送单字节 (buffer)
*
* @param d - 发送字节
*/
void SPI0_MasterSendByte(uint8_t d);
/**
* @brief 接收单字节 (buffer)
*
* @param none
*/
uint8_t SPI0_MasterRecvByte(void);
/**
* @brief 使用FIFO连续发送多字节
*
* @param pbuf - 待发送的数据内容首地址
* @param len - 请求发送的数据长度，最大4095
*/
void SPI0_MasterTrans(uint8_t *pbuf, uint16_t len);
/**
* @brief 使用FIFO连续接收多字节
*
* @param pbuf - 待接收的数据首地址
* @param len - 待接收的数据长度，最大4095
*/
void SPI0_MasterRecv(uint8_t *pbuf, uint16_t len);
/**
* @brief DMA方式连续发送数据
*
* @param pbuf - 待发送数据起始地址,需要四字节对其
* @param len - 待发送数据长度
*/
void SPI0_MasterDMATrans(uint8_t *pbuf, uint16_t len);
/**
* @brief DMA方式连续接收数据
*
* @param pbuf - 待接收数据存放起始地址,需要四字节对其
* @param len - 待接收数据长度
*/
void SPI0_MasterDMARecv(uint8_t *pbuf, uint16_t len);
void SPI1_MasterDefInit(void); /* 主机模式默认初始化：模式0+3线全双工+8MHz */
void SPI1_CLKCfg(UINT8 c); /* SPI1 基准时钟配置，= d*Tsys */
void SPI1_DataMode(ModeBitOrderTypeDef m); /* 设置数据流模式 */
void SPI1_MasterSendByte(UINT8 d); /* 发送单字节 (buffer) */
UINT8 SPI1_MasterRecvByte(void); /* 接收单字节 (buffer) */
void SPI1_MasterTrans(UINT8 *pbuf, UINT16 len); /* 使用FIFO连续发送多字节 */
void SPI1_MasterRecv(UINT8 *pbuf, UINT16 len); /* 使用FIFO连续接收多字节 */
/**
* @brief 设备模式默认初始化，建议设置MISO的GPIO对应为输入模式
*/
void SPI0_SlaveInit(void);
/**
* @brief 加载首字节数据内容
*
* @param d - 首字节数据内容
*/
#define SetFirstData(d) (R8_SPI0_SLAVE_PRE = d)
/**
* @brief 从机模式，发送一字节数据
*
* @param d - 待发送数据
*/
void SPI0_SlaveSendByte(uint8_t d);
/**
* @brief 从机模式，接收一字节数据
*
* @return 接收到数据
*/
uint8_t SPI0_SlaveRecvByte(void);
/**
* @brief 从机模式，发送多字节数据
*
* @param pbuf - 待发送的数据内容首地址
* @param len - 请求发送的数据长度，最大4095
*/
void SPI0_SlaveTrans(uint8_t *pbuf, uint16_t len);
/**
* @brief 从机模式，接收多字节数据
*
* @param pbuf - 接收收数据存放起始地址
* @param len - 请求接收数据长度
*/
void SPI0_SlaveRecv(uint8_t *pbuf, uint16_t len);
/**
* @brief DMA方式连续发送数据
*
* @param pbuf - 待发送数据起始地址,需要四字节对其
* @param len - 待发送数据长度
*/
void SPI0_SlaveDMATrans(uint8_t *pbuf, uint16_t len);
/**
* @brief DMA方式连续接收数据
*
* @param pbuf - 待接收数据存放起始地址,需要四字节对其
* @param len - 待接收数据长度
*/
void SPI0_SlaveDMARecv(uint8_t *pbuf, uint16_t len);
/**
* @brief 配置SPI0中断
*
* @param s - 使能/关闭
* @param f - refer to SPI0 interrupt bit define
*/
#define SPI0_ITCfg(s, f) ((s) ? (R8_SPI0_INTER_EN |= f) : (R8_SPI0_INTER_EN &= ~f))
/**
* @brief 获取中断标志状态，0-未置位，(!0)-触发
*
* @param f - refer to SPI0 interrupt bit define
*/
#define SPI0_GetITFlag(f) (R8_SPI0_INT_FLAG & f)
/**
* @brief 清除当前中断标志
*
* @param f - refer to SPI0 interrupt bit define
*/
#define SPI0_ClearITFlag(f) (R8_SPI0_INT_FLAG = f)
/**
* @brief 关闭SPI0
*/
#define SPI0_Disable() (R8_SPI0_CTRL_MOD &= ~(RB_SPI_MOSI_OE | RB_SPI_SCK_OE | RB_SPI_MISO_OE))
#ifdef __cplusplus
}
#endif
#endif // __CH59x_SPI_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_SYS.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_SYS_H__
#define __CH59x_SYS_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief rtc interrupt event define
*/
typedef enum
{
RST_STATUS_SW = 0, // 软件复位
RST_STATUS_RPOR, // 上电复位
RST_STATUS_WTR, // 看门狗超时复位
RST_STATUS_MR, // 外部手动复位
RST_STATUS_LRM0, // 唤醒复位-软复位引起
RST_STATUS_GPWSM, // 下电模式唤醒复位
RST_STATUS_LRM1, // 唤醒复位-看门狗引起
RST_STATUS_LRM2, // 唤醒复位-手动复位引起
} SYS_ResetStaTypeDef;
/**
* @brief rtc interrupt event define
*/
typedef enum
{
INFO_ROM_READ = 0, // FlashROM 代码和数据区 是否可读
INFO_RESET_EN = 2, // RST#外部手动复位输入功能是否开启
INFO_BOOT_EN, // 系统引导程序 BootLoader 是否开启
INFO_DEBUG_EN, // 系统仿真调试接口是否开启
INFO_LOADER, // 当前系统是否处于Bootloader 区
STA_SAFEACC_ACT, // 当前系统是否处于安全访问状态，否则RWA属性区域不可访问
} SYS_InfoStaTypeDef;
/**
* @brief 获取芯片ID类，一般为固定值
*/
#define SYS_GetChipID() R8_CHIP_ID
/**
* @brief 获取安全访问ID，一般为固定值
*/
#define SYS_GetAccessID() R8_SAFE_ACCESS_ID
/**
* @brief 配置系统运行时钟
*
* @param sc - 系统时钟源选择 refer to SYS_CLKTypeDef
*/
void SetSysClock(SYS_CLKTypeDef sc);
/**
* @brief 获取当前系统时钟
*
* @return Hz
*/
uint32_t GetSysClock(void);
/**
* @brief 获取当前系统信息状态
*
* @param i - refer to SYS_InfoStaTypeDef
*
* @return 是否开启
*/
uint8_t SYS_GetInfoSta(SYS_InfoStaTypeDef i);
/**
* @brief 获取系统上次复位状态
*
* @return refer to SYS_ResetStaTypeDef
*/
#define SYS_GetLastResetSta() (R8_RESET_STATUS & RB_RESET_FLAG)
/**
* @brief 执行系统软件复位
*/
void SYS_ResetExecute(void);
/**
* @brief 设置复位保存寄存器的值，不受手动复位、 软件复位、 看门狗复位或者普通唤醒复位的影响
*
* @param i - refer to SYS_InfoStaTypeDef
*/
#define SYS_ResetKeepBuf(d) (R8_GLOB_RESET_KEEP = d)
/**
* @brief 关闭所有中断，并保留当前中断值
*
* @param pirqv - 当前保留中断值
*/
void SYS_DisableAllIrq(uint32_t *pirqv);
/**
* @brief 恢复之前关闭的中断值
*
* @param irq_status - 当前保留中断值
*/
void SYS_RecoverIrq(uint32_t irq_status);
/**
* @brief 获取当前系统(SYSTICK)计数值
*
* @return 当前计数值
*/
uint32_t SYS_GetSysTickCnt(void);
/**
* @brief 加载看门狗计数初值，递增型
*
* @param c - 看门狗计数初值
*/
#define WWDG_SetCounter(c) (R8_WDOG_COUNT = c)
/**
* @brief 看门狗定时器溢出中断使能
*
* @param s - 溢出是否中断
*/
void WWDG_ITCfg(FunctionalState s);
/**
* @brief 看门狗定时器复位功能
*
* @param s - 溢出是否复位
*/
void WWDG_ResetCfg(FunctionalState s);
/**
* @brief 获取当前看门狗定时器溢出标志
*
* @return 看门狗定时器溢出标志
*/
#define WWDG_GetFlowFlag() (R8_RST_WDOG_CTRL & RB_WDOG_INT_FLAG)
/**
* @brief 清除看门狗中断标志，重新加载计数值也可清除
*/
void WWDG_ClearFlag(void);
/**
* @brief uS 延时
*
* @param t - 时间参数
*/
void mDelayuS(uint16_t t);
/**
* @brief mS 延时
*
* @param t - 时间参数
*/
void mDelaymS(uint16_t t);
/**
* @brief Enter safe access mode.
*
* @NOTE: After enter safe access mode, about 16 system frequency cycles
* are in safe mode, and one or more secure registers can be rewritten
* within the valid period. The safe mode will be automatically
* terminated after the above validity period is exceeded.
* if sys_safe_access_enable() is called,
* you must call sys_safe_access_disable() before call sys_safe_access_enable() again.
*/
#define sys_safe_access_enable() do{volatile uint32_t mpie_mie;mpie_mie=__risc_v_disable_irq();SAFEOPERATE;\
R8_SAFE_ACCESS_SIG = SAFE_ACCESS_SIG1;R8_SAFE_ACCESS_SIG = SAFE_ACCESS_SIG2;SAFEOPERATE;
#define sys_safe_access_disable() R8_SAFE_ACCESS_SIG = 0;__risc_v_enable_irq(mpie_mie);SAFEOPERATE;}while(0)
#ifdef __cplusplus
}
#endif
#endif // __CH59x_SYS_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_timer.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_TIMER_H__
#define __CH59x_TIMER_H__
#ifdef __cplusplus
extern "C" {
#endif
#define DataBit_25 (1 << 25)
/**
* @brief TMR0 interrupt bit define
*/
#define TMR0_3_IT_CYC_END 0x01 // 周期结束标志：捕捉-超时，定时-周期结束，PWM-周期结束
#define TMR0_3_IT_DATA_ACT 0x02 // 数据有效标志：捕捉-新数据，PWM-有效电平结束
#define TMR0_3_IT_FIFO_HF 0x04 // FIFO 使用过半：捕捉- FIFO>=4， PWM- FIFO<4
#define TMR1_2_IT_DMA_END 0x08 // DMA 结束，支持TMR1和TMR2
#define TMR0_3_IT_FIFO_OV 0x10 // FIFO 溢出：捕捉- FIFO满， PWM- FIFO空
/**
* @brief Configuration PWM effective level repeat times
*/
typedef enum
{
PWM_Times_1 = 0, // PWM 有效输出重复1次数
PWM_Times_4, // PWM 有效输出重复4次数
PWM_Times_8, // PWM 有效输出重复8次数
PWM_Times_16, // PWM 有效输出重复16次数
} PWM_RepeatTsTypeDef;
/**
* @brief Configuration Cap mode
*/
typedef enum
{
CAP_NULL = 0, // 不捕捉 & 不计数
Edge_To_Edge, // 任意边沿之间 & 计数任意边沿
FallEdge_To_FallEdge, // 下降沿到下降沿 & 计数下降沿
RiseEdge_To_RiseEdge, // 上升沿到上升沿 & 计数上升沿
} CapModeTypeDef;
/**
* @brief Configuration DMA mode
*/
typedef enum
{
Mode_Single = 0, // 单次模式
Mode_LOOP, // 循环模式
} DMAModeTypeDef;
/**
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*/
void TMR0_TimerInit(uint32_t t);
/**
* @brief 获取当前定时器值，最大67108864
*
* @return 当前定时器值
*/
#define TMR0_GetCurrentTimer() R32_TMR0_COUNT
/**
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*/
void TMR0_EXTSingleCounterInit(CapModeTypeDef cap);
/**
* @brief 设置计数统计溢出大小，最大67108862
*
* @param cyc - 计数统计溢出大小
*/
#define TMR0_CountOverflowCfg(cyc) (R32_TMR0_CNT_END = (cyc + 2))
/**
* @brief 获取当前计数值，最大67108862
*
* @return 当前计数值
*/
#define TMR0_GetCurrentCount() R32_TMR0_COUNT
/**
* @brief PWM0 通道输出波形周期配置, 最大67108864
*
* @param cyc - 输出波形周期
*/
#define TMR0_PWMCycleCfg(cyc) (R32_TMR0_CNT_END = cyc)
/**
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*/
void TMR0_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
/**
* @brief PWM0 有效数据脉宽, 最大67108864
*
* @param d - 有效数据脉宽
*/
#define TMR0_PWMActDataWidth(d) (R32_TMR0_FIFO = d)
/**
* @brief CAP0 捕捉电平超时配置, 最大33554432
*
* @param cyc - 捕捉电平超时
*/
#define TMR0_CAPTimeoutCfg(cyc) (R32_TMR0_CNT_END = cyc)
/**
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*/
void TMR0_CapInit(CapModeTypeDef cap);
/**
* @brief 获取脉冲数据
*
* @return 脉冲数据
*/
#define TMR0_CAPGetData() R32_TMR0_FIFO
/**
* @brief 获取当前已捕获数据个数
*
* @return 当前已捕获数据个数
*/
#define TMR0_CAPDataCounter() R8_TMR0_FIFO_COUNT
/**
* @brief 关闭 TMR0 PWM输出
*/
#define TMR0_PWMDisable() (R8_TMR0_CTRL_MOD &= ~RB_TMR_OUT_EN)
/**
* @brief 开启 TMR0 PWM输出
*/
#define TMR0_PWMEnable() (R8_TMR0_CTRL_MOD |= RB_TMR_OUT_EN)
/**
* @brief 关闭 TMR0
*/
#define TMR0_Disable() (R8_TMR0_CTRL_MOD &= ~RB_TMR_COUNT_EN)
/**
* @brief 开启 TMR0
*/
#define TMR0_Enable() (R8_TMR0_CTRL_MOD |= RB_TMR_COUNT_EN)
/**
* @brief 中断配置
*
* @param s - 使能/关闭
* @param f - refer to TMR interrupt bit define
*/
#define TMR0_ITCfg(s, f) ((s) ? (R8_TMR0_INTER_EN |= f) : (R8_TMR0_INTER_EN &= ~f))
/**
* @brief 清除中断标志
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR0_ClearITFlag(f) (R8_TMR0_INT_FLAG = f)
/**
* @brief 查询中断标志状态
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR0_GetITFlag(f) (R8_TMR0_INT_FLAG & f)
/**
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*/
void TMR1_TimerInit(uint32_t t);
/**
* @brief 获取当前定时器值，最大67108864
*
* @return 当前定时器值
*/
#define TMR1_GetCurrentTimer() R32_TMR1_COUNT
/**
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*/
void TMR1_EXTSingleCounterInit(CapModeTypeDef cap);
/**
* @brief 设置计数统计溢出大小，最大67108862
*
* @param cyc - 计数统计溢出大小
*/
#define TMR1_CountOverflowCfg(cyc) (R32_TMR1_CNT_END = (cyc + 2))
/**
* @brief 获取当前计数值，最大67108862
*
* @return 当前计数值
*/
#define TMR1_GetCurrentCount() R32_TMR1_COUNT
/**
* @brief PWM1 通道输出波形周期配置, 最大67108864
*
* @param cyc - 输出波形周期
*/
#define TMR1_PWMCycleCfg(cyc) (R32_TMR1_CNT_END = cyc)
/**
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*/
void TMR1_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
/**
* @brief PWM1 有效数据脉宽, 最大67108864
*
* @param d - 有效数据脉宽
*/
#define TMR1_PWMActDataWidth(d) (R32_TMR1_FIFO = d)
/**
* @brief CAP1 捕捉电平超时配置, 最大33554432
*
* @param cyc - 捕捉电平超时
*/
#define TMR1_CAPTimeoutCfg(cyc) (R32_TMR1_CNT_END = cyc)
/**
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*/
void TMR1_CapInit(CapModeTypeDef cap);
/**
* @brief 获取脉冲数据
*
* @return 脉冲数据
*/
#define TMR1_CAPGetData() R32_TMR1_FIFO
/**
* @brief 获取当前已捕获数据个数
*
* @return 当前已捕获数据个数
*/
#define TMR1_CAPDataCounter() R8_TMR1_FIFO_COUNT
/**
* @brief 配置DMA功能
*
* @param s - 是否打开DMA功能
* @param startAddr - DMA 起始地址
* @param endAddr - DMA 结束地址
* @param m - 配置DMA模式
*/
void TMR1_DMACfg(uint8_t s, uint16_t startAddr, uint16_t endAddr, DMAModeTypeDef m);
/**
* @brief 关闭 TMR1 PWM输出
*/
#define TMR1_PWMDisable() (R8_TMR1_CTRL_MOD &= ~RB_TMR_OUT_EN)
/**
* @brief 开启 TMR1 PWM输出
*/
#define TMR1_PWMEnable() (R8_TMR1_CTRL_MOD |= RB_TMR_OUT_EN)
/**
* @brief 关闭 TMR1
*/
#define TMR1_Disable() (R8_TMR1_CTRL_MOD &= ~RB_TMR_COUNT_EN)
/**
* @brief 开启 TMR1
*/
#define TMR1_Enable() (R8_TMR1_CTRL_MOD |= RB_TMR_COUNT_EN)
/**
* @brief 中断配置
*
* @param s - 使能/关闭
* @param f - refer to TMR interrupt bit define
*/
#define TMR1_ITCfg(s, f) ((s) ? (R8_TMR1_INTER_EN |= f) : (R8_TMR1_INTER_EN &= ~f))
/**
* @brief 清除中断标志
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR1_ClearITFlag(f) (R8_TMR1_INT_FLAG = f)
/**
* @brief 查询中断标志状态
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR1_GetITFlag(f) (R8_TMR1_INT_FLAG & f)
/**
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*/
void TMR2_TimerInit(uint32_t t);
/**
* @brief 获取当前定时器值，最大67108864
*
* @return 当前定时器值
*/
#define TMR2_GetCurrentTimer() R32_TMR2_COUNT
/**
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*/
void TMR2_EXTSingleCounterInit(CapModeTypeDef cap);
/**
* @brief 设置计数统计溢出大小，最大67108862
*
* @param cyc - 计数统计溢出大小
*/
#define TMR2_CountOverflowCfg(cyc) (R32_TMR2_CNT_END = (cyc + 2))
/**
* @brief 获取当前计数值，最大67108862
*
* @return 当前计数值
*/
#define TMR2_GetCurrentCount() R32_TMR2_COUNT
/**
* @brief PWM2 通道输出波形周期配置, 最大67108864
*
* @param cyc - 输出波形周期
*/
#define TMR2_PWMCycleCfg(cyc) (R32_TMR2_CNT_END = cyc)
/**
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*/
void TMR2_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
/**
* @brief PWM2 有效数据脉宽, 最大67108864
*
* @param d - 有效数据脉宽
*/
#define TMR2_PWMActDataWidth(d) (R32_TMR2_FIFO = d)
/**
* @brief CAP2 捕捉电平超时配置, 最大33554432
*
* @param cyc - 捕捉电平超时
*/
#define TMR2_CAPTimeoutCfg(cyc) (R32_TMR2_CNT_END = cyc)
/**
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*/
void TMR2_CapInit(CapModeTypeDef cap);
/**
* @brief 获取脉冲数据
*
* @return 脉冲数据
*/
#define TMR2_CAPGetData() R32_TMR2_FIFO
/**
* @brief 获取当前已捕获数据个数
*
* @return 当前已捕获数据个数
*/
#define TMR2_CAPDataCounter() R8_TMR2_FIFO_COUNT
/**
* @brief 配置DMA功能
*
* @param s - 是否打开DMA功能
* @param startAddr - DMA 起始地址
* @param endAddr - DMA 结束地址
* @param m - 配置DMA模式
*/
void TMR2_DMACfg(uint8_t s, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef m);
/**
* @brief 关闭 TMR2 PWM输出
*/
#define TMR2_PWMDisable() (R8_TMR2_CTRL_MOD &= ~RB_TMR_OUT_EN)
/**
* @brief 开启 TMR2 PWM输出
*/
#define TMR2_PWMEnable() (R8_TMR2_CTRL_MOD |= RB_TMR_OUT_EN)
/**
* @brief 关闭 TMR2
*/
#define TMR2_Disable() (R8_TMR2_CTRL_MOD &= ~RB_TMR_COUNT_EN)
/**
* @brief 开启 TMR2
*/
#define TMR2_Enable() (R8_TMR2_CTRL_MOD |= RB_TMR_COUNT_EN)
/**
* @brief 中断配置
*
* @param s - 使能/关闭
* @param f - refer to TMR interrupt bit define
*/
#define TMR2_ITCfg(s, f) ((s) ? (R8_TMR2_INTER_EN |= f) : (R8_TMR2_INTER_EN &= ~f))
/**
* @brief 清除中断标志
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR2_ClearITFlag(f) (R8_TMR2_INT_FLAG = f)
/**
* @brief 查询中断标志状态
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR2_GetITFlag(f) (R8_TMR2_INT_FLAG & f)
/**
* @brief 定时功能初始化
*
* @param t - 定时时间，基于当前系统时钟Tsys, 最长定时周期 67108864
*/
void TMR3_TimerInit(uint32_t t);
/**
* @brief 获取当前定时器值，最大67108864
*
* @return 当前定时器值
*/
#define TMR3_GetCurrentTimer() R32_TMR3_COUNT
/**
* @brief 边沿计数功能初始化
*
* @param cap - 采集计数类型
*/
void TMR3_EXTSingleCounterInit(CapModeTypeDef cap);
/**
* @brief 设置计数统计溢出大小，最大67108862
*
* @param cyc - 计数统计溢出大小
*/
#define TMR3_CountOverflowCfg(cyc) (R32_TMR3_CNT_END = (cyc + 2))
/**
* @brief 获取当前计数值，最大67108862
*
* @return 当前计数值
*/
#define TMR3_GetCurrentCount() R32_TMR3_COUNT
/**
* @brief PWM3 通道输出波形周期配置, 最大67108864
*
* @param cyc - 输出波形周期
*/
#define TMR3_PWMCycleCfg(cyc) (R32_TMR3_CNT_END = cyc)
/**
* @brief PWM 输出初始化
*
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
*/
void TMR3_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
/**
* @brief PWM3 有效数据脉宽, 最大67108864
*
* @param d - 有效数据脉宽
*/
#define TMR3_PWMActDataWidth(d) (R32_TMR3_FIFO = d)
/**
* @brief CAP3 捕捉电平超时配置, 最大33554432
*
* @param cyc - 捕捉电平超时
*/
#define TMR3_CAPTimeoutCfg(cyc) (R32_TMR3_CNT_END = cyc)
/**
* @brief 外部信号捕捉功能初始化
*
* @param cap - select capture mode, refer to CapModeTypeDef
*/
void TMR3_CapInit(CapModeTypeDef cap);
/**
* @brief 获取脉冲数据
*
* @return 脉冲数据
*/
#define TMR3_CAPGetData() R32_TMR3_FIFO
/**
* @brief 获取当前已捕获数据个数
*
* @return 当前已捕获数据个数
*/
#define TMR3_CAPDataCounter() R8_TMR3_FIFO_COUNT
/**
* @brief 关闭 TMR3 PWM输出
*/
#define TMR3_PWMDisable() (R8_TMR3_CTRL_MOD &= ~RB_TMR_OUT_EN)
/**
* @brief 开启 TMR3 PWM输出
*/
#define TMR3_PWMEnable() (R8_TMR3_CTRL_MOD |= RB_TMR_OUT_EN)
/**
* @brief 关闭 TMR3
*/
#define TMR3_Disable() (R8_TMR3_CTRL_MOD &= ~RB_TMR_COUNT_EN)
/**
* @brief 开启 TMR3
*/
#define TMR3_Enable() (R8_TMR3_CTRL_MOD |= RB_TMR_COUNT_EN)
/**
* @brief 中断配置
*
* @param s - 使能/关闭
* @param f - refer to TMR interrupt bit define
*/
#define TMR3_ITCfg(s, f) ((s) ? (R8_TMR3_INTER_EN |= f) : (R8_TMR3_INTER_EN &= ~f))
/**
* @brief 清除中断标志
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR3_ClearITFlag(f) (R8_TMR3_INT_FLAG = f)
/**
* @brief 查询中断标志状态
*
* @param f - refer to TMR interrupt bit define
*/
#define TMR3_GetITFlag(f) (R8_TMR3_INT_FLAG & f)
#ifdef __cplusplus
}
#endif
#endif // __CH59x_TIMER_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_uart.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_UART_H__
#define __CH59x_UART_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief LINE error and status define
*/
#define STA_ERR_BREAK RB_LSR_BREAK_ERR // 数据间隔错误
#define STA_ERR_FRAME RB_LSR_FRAME_ERR // 数据帧错误
#define STA_ERR_PAR RB_LSR_PAR_ERR // 奇偶校验位出错
#define STA_ERR_FIFOOV RB_LSR_OVER_ERR // 接收数据溢出
#define STA_TXFIFO_EMP RB_LSR_TX_FIFO_EMP // 当前发送FIFO空，可以继续填充发送数据
#define STA_TXALL_EMP RB_LSR_TX_ALL_EMP // 当前所有发送数据都发送完成
#define STA_RECV_DATA RB_LSR_DATA_RDY // 当前有接收到数据
/**
* @brief Configuration UART TrigByte num
*/
typedef enum
{
UART_1BYTE_TRIG = 0, // 1字节触发
UART_2BYTE_TRIG, // 2字节触发
UART_4BYTE_TRIG, // 4字节触发
UART_7BYTE_TRIG, // 7字节触发
} UARTByteTRIGTypeDef;
/**
* @brief 串口默认初始化配置
*/
void UART0_DefInit(void);
/**
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*/
void UART0_BaudRateCfg(uint32_t baudrate);
/**
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*/
void UART0_ByteTrigCfg(UARTByteTRIGTypeDef b);
/**
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*/
void UART0_INTCfg(FunctionalState s, uint8_t i);
/**
* @brief 串口软件复位
*/
void UART0_Reset(void);
/**
* @brief 清除当前接收FIFO
*/
#define UART0_CLR_RXFIFO() (R8_UART0_FCR |= RB_FCR_RX_FIFO_CLR)
/**
* @brief 清除当前发送FIFO
*/
#define UART0_CLR_TXFIFO() (R8_UART0_FCR |= RB_FCR_TX_FIFO_CLR)
/**
* @brief 获取当前中断标志
*
* @return 当前中断标志
*/
#define UART0_GetITFlag() (R8_UART0_IIR & RB_IIR_INT_MASK)
/**
* @brief 获取当前通讯状态
*
* @return refer to LINE error and status define
*/
#define UART0_GetLinSTA() (R8_UART0_LSR)
/**
* @brief 串口单字节发送
*
* @param b 待发送的字节
*/
#define UART0_SendByte(b) (R8_UART0_THR = b)
/**
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*/
void UART0_SendString(uint8_t *buf, uint16_t l);
/**
* @brief 串口读取单字节
*
* @return 读取到的单字节
*/
#define UART0_RecvByte() (R8_UART0_RBR)
/**
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART0_RecvString(uint8_t *buf);
/**
* @brief 串口默认初始化配置
*/
void UART1_DefInit(void);
/**
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*/
void UART1_BaudRateCfg(uint32_t baudrate);
/**
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*/
void UART1_ByteTrigCfg(UARTByteTRIGTypeDef b);
/**
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*/
void UART1_INTCfg(FunctionalState s, uint8_t i);
/**
* @brief 串口软件复位
*/
void UART1_Reset(void);
/**
* @brief 清除当前接收FIFO
*/
#define UART1_CLR_RXFIFO() (R8_UART1_FCR |= RB_FCR_RX_FIFO_CLR)
/**
* @brief 清除当前发送FIFO
*/
#define UART1_CLR_TXFIFO() (R8_UART1_FCR |= RB_FCR_TX_FIFO_CLR)
/**
* @brief 获取当前中断标志
*
* @return 当前中断标志
*/
#define UART1_GetITFlag() (R8_UART1_IIR & RB_IIR_INT_MASK)
/**
* @brief 获取当前通讯状态
*
* @return refer to LINE error and status define
*/
#define UART1_GetLinSTA() (R8_UART1_LSR)
/**
* @brief 串口单字节发送
*
* @param b 待发送的字节
*/
#define UART1_SendByte(b) (R8_UART1_THR = b)
/**
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*/
void UART1_SendString(uint8_t *buf, uint16_t l);
/**
* @brief 串口读取单字节
*
* @return 读取到的单字节
*/
#define UART1_RecvByte() (R8_UART1_RBR)
/**
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART1_RecvString(uint8_t *buf);
/**
* @brief 串口默认初始化配置
*/
void UART2_DefInit(void);
/**
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*/
void UART2_BaudRateCfg(uint32_t baudrate);
/**
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*/
void UART2_ByteTrigCfg(UARTByteTRIGTypeDef b);
/**
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*/
void UART2_INTCfg(FunctionalState s, uint8_t i);
/**
* @brief 串口软件复位
*/
void UART2_Reset(void);
/**
* @brief 清除当前接收FIFO
*/
#define UART2_CLR_RXFIFO() (R8_UART2_FCR |= RB_FCR_RX_FIFO_CLR)
/**
* @brief 清除当前发送FIFO
*/
#define UART2_CLR_TXFIFO() (R8_UART2_FCR |= RB_FCR_TX_FIFO_CLR)
/**
* @brief 获取当前中断标志
*
* @return 当前中断标志
*/
#define UART2_GetITFlag() (R8_UART2_IIR & RB_IIR_INT_MASK)
/**
* @brief 获取当前通讯状态
*
* @return refer to LINE error and status define
*/
#define UART2_GetLinSTA() (R8_UART2_LSR)
/**
* @brief 串口单字节发送
*
* @param b 待发送的字节
*/
#define UART2_SendByte(b) (R8_UART2_THR = b)
/**
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*/
void UART2_SendString(uint8_t *buf, uint16_t l);
/**
* @brief 串口读取单字节
*
* @return 读取到的单字节
*/
#define UART2_RecvByte() (R8_UART2_RBR)
/**
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART2_RecvString(uint8_t *buf);
/**
* @brief 串口默认初始化配置
*/
void UART3_DefInit(void);
/**
* @brief 串口波特率配置
*
* @param baudrate - 波特率
*/
void UART3_BaudRateCfg(uint32_t baudrate);
/**
* @brief 串口字节触发中断配置
*
* @param b - 触发字节数 refer to UARTByteTRIGTypeDef
*/
void UART3_ByteTrigCfg(UARTByteTRIGTypeDef b);
/**
* @brief 串口中断配置
*
* @param s - 中断控制状态，是否使能相应中断
* @param i - 中断类型
* RB_IER_MODEM_CHG - 调制解调器输入状态变化中断使能位（仅 UART0 支持）
* RB_IER_LINE_STAT - 接收线路状态中断
* RB_IER_THR_EMPTY - 发送保持寄存器空中断
* RB_IER_RECV_RDY - 接收数据中断
*/
void UART3_INTCfg(FunctionalState s, uint8_t i);
/**
* @brief 串口软件复位
*/
void UART3_Reset(void);
/**
* @brief 清除当前接收FIFO
*/
#define UART3_CLR_RXFIFO() (R8_UART3_FCR |= RB_FCR_RX_FIFO_CLR)
/**
* @brief 清除当前发送FIFO
*/
#define UART3_CLR_TXFIFO() (R8_UART3_FCR |= RB_FCR_TX_FIFO_CLR)
/**
* @brief 获取当前中断标志
*
* @return 当前中断标志
*/
#define UART3_GetITFlag() (R8_UART3_IIR & RB_IIR_INT_MASK)
/**
* @brief 获取当前通讯状态
*
* @return refer to LINE error and status define
*/
#define UART3_GetLinSTA() (R8_UART3_LSR)
/**
* @brief 串口单字节发送
*
* @param b 待发送的字节
*/
#define UART3_SendByte(b) (R8_UART3_THR = b)
/**
* @brief 串口多字节发送
*
* @param buf - 待发送的数据内容首地址
* @param l - 待发送的数据长度
*/
void UART3_SendString(uint8_t *buf, uint16_t l);
/**
* @brief 串口读取单字节
*
* @return 读取到的单字节
*/
#define UART3_RecvByte() (R8_UART3_RBR)
/**
* @brief 串口读取多字节
*
* @param buf - 读取数据存放缓存区首地址
*
* @return 读取数据长度
*/
uint16_t UART3_RecvString(uint8_t *buf);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_UART_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_usbdev.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_USBDEV_H__
#define __CH59x_USBDEV_H__
#ifdef __cplusplus
extern "C" {
#endif
/* HID类请求 */
#define DEF_USB_GET_IDLE 0x02 /* get idle for key or mouse */
#define DEF_USB_GET_PROTOCOL 0x03 /* get protocol for bios type */
#define DEF_USB_SET_REPORT 0x09 /* set report for key */
#define DEF_USB_SET_IDLE 0x0A /* set idle for key or mouse */
#define DEF_USB_SET_PROTOCOL 0x0B /* set protocol for bios type */
/* 以下缓存区是USB模块收发使用的数据缓冲区，总共9个通道（9块缓存），用户可根据实际使用的通道数定义相应缓存区 */
extern uint8_t *pEP0_RAM_Addr; //ep0(64)+ep4_out(64)+ep4_in(64)
extern uint8_t *pEP1_RAM_Addr; //ep1_out(64)+ep1_in(64)
extern uint8_t *pEP2_RAM_Addr; //ep2_out(64)+ep2_in(64)
extern uint8_t *pEP3_RAM_Addr; //ep3_out(64)+ep3_in(64)
#define pSetupReqPak ((PUSB_SETUP_REQ)pEP0_RAM_Addr)
#define pEP0_DataBuf (pEP0_RAM_Addr)
#define pEP1_OUT_DataBuf (pEP1_RAM_Addr)
#define pEP1_IN_DataBuf (pEP1_RAM_Addr + 64)
#define pEP2_OUT_DataBuf (pEP2_RAM_Addr)
#define pEP2_IN_DataBuf (pEP2_RAM_Addr + 64)
#define pEP3_OUT_DataBuf (pEP3_RAM_Addr)
#define pEP3_IN_DataBuf (pEP3_RAM_Addr + 64)
#define pEP4_OUT_DataBuf (pEP0_RAM_Addr + 64)
#define pEP4_IN_DataBuf (pEP0_RAM_Addr + 128)
/**
* @brief USB设备功能初始化，4个端点，8个通道。
*/
void USB_DeviceInit(void);
/**
* @brief USB设备应答传输处理
*/
void USB_DevTransProcess(void);
/**
* @brief 端点1下传数据处理
*
* @param l - 待处理数据长度(<64B)
*/
void DevEP1_OUT_Deal(uint8_t l);
/**
* @brief 端点2下传数据处理
*
* @param l - 待处理数据长度(<64B)
*/
void DevEP2_OUT_Deal(uint8_t l);
/**
* @brief 端点3下传数据处理
*
* @param l - 待处理数据长度(<64B)
*/
void DevEP3_OUT_Deal(uint8_t l);
/**
* @brief 端点4下传数据处理
*
* @param l - 待处理数据长度(<64B)
*/
void DevEP4_OUT_Deal(uint8_t l);
/**
* @brief 端点1数据上传
*
* @param l - 上传数据长度(<64B)
*/
void DevEP1_IN_Deal(uint8_t l);
/**
* @brief 端点2数据上传
*
* @param l - 上传数据长度(<64B)
*/
void DevEP2_IN_Deal(uint8_t l);
/**
* @brief 端点3数据上传
*
* @param l - 上传数据长度(<64B)
*/
void DevEP3_IN_Deal(uint8_t l);
/**
* @brief 端点4数据上传
*
* @param l - 上传数据长度(<64B)
*/
void DevEP4_IN_Deal(uint8_t l);
/**
* @brief 查询端点1是否上传完成
*
* @return 0-未完成 (!0)-已完成
*/
#define EP1_GetINSta() (R8_UEP1_CTRL & UEP_T_RES_NAK)
/**
* @brief 查询端点2是否上传完成
*
* @return 0-未完成 (!0)-已完成
*/
#define EP2_GetINSta() (R8_UEP2_CTRL & UEP_T_RES_NAK)
/**
* @brief 查询端点3是否上传完成
*
* @return 0-未完成 (!0)-已完成
*/
#define EP3_GetINSta() (R8_UEP3_CTRL & UEP_T_RES_NAK)
/**
* @brief 查询端点4是否上传完成
*
* @return 0-未完成 (!0)-已完成
*/
#define EP4_GetINSta() (R8_UEP4_CTRL & UEP_T_RES_NAK)
/**
* @brief 关闭USB上拉电阻
*/
#define USB_DisablePin() (R16_PIN_ANALOG_IE &= ~(RB_PIN_USB_IE | RB_PIN_USB_DP_PU))
/**
* @brief 关闭USB
*/
#define USB_Disable() (R32_USB_CONTROL = 0)
#ifdef __cplusplus
}
#endif
#endif // __CH59x_USBDEV_H__

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/********************************** (C) COPYRIGHT *******************************
* File Name : CH59x_usbhost.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH59x_USBHOST_H__
#define __CH59x_USBHOST_H__
#ifdef __cplusplus
extern "C" {
#endif
#if DISK_LIB_ENABLE
#if DISK_WITHOUT_USB_HUB
/* 不使用U盘文件系统库或者U盘挂载USBhub下面，需要关闭下面定义 */
#define FOR_ROOT_UDISK_ONLY
#endif
/* 使用U盘文件系统库，需要开启下面定义, 不使用请关闭 */
#define DISK_BASE_BUF_LEN 512 /* 默认的磁盘数据缓冲区大小为512字节,建议选择为2048甚至4096以支持某些大扇区的U盘,为0则禁止在.H文件中定义缓冲区并由应用程序在pDISK_BASE_BUF中指定 */
#endif
// 各子程序返回状态码
#define ERR_SUCCESS 0x00 // 操作成功
#define ERR_USB_CONNECT 0x15 /* 检测到USB设备连接事件,已经连接 */
#define ERR_USB_DISCON 0x16 /* 检测到USB设备断开事件,已经断开 */
#define ERR_USB_BUF_OVER 0x17 /* USB传输的数据有误或者数据太多缓冲区溢出 */
#define ERR_USB_DISK_ERR 0x1F /* USB存储器操作失败,在初始化时可能是USB存储器不支持,在读写操作中可能是磁盘损坏或者已经断开 */
#define ERR_USB_TRANSFER 0x20 /* NAK/STALL等更多错误码在0x20~0x2F */
#define ERR_USB_UNSUPPORT 0xFB /* 不支持的USB设备*/
#define ERR_USB_UNKNOWN 0xFE /* 设备操作出错*/
#define ERR_AOA_PROTOCOL 0x41 /* 协议版本出错 */
/*USB设备相关信息表,最多支持1个设备*/
#define ROOT_DEV_DISCONNECT 0
#define ROOT_DEV_CONNECTED 1
#define ROOT_DEV_FAILED 2
#define ROOT_DEV_SUCCESS 3
#define DEV_TYPE_KEYBOARD (USB_DEV_CLASS_HID | 0x20)
#define DEV_TYPE_MOUSE (USB_DEV_CLASS_HID | 0x30)
#define DEF_AOA_DEVICE 0xF0
#define DEV_TYPE_UNKNOW 0xFF
/*
约定: USB设备地址分配规则(参考USB_DEVICE_ADDR)
地址值 设备位置
0x02 内置Root-HUB下的USB设备或外部HUB
0x1x 内置Root-HUB下的外部HUB的端口x下的USB设备,x为1~n
*/
#define HUB_MAX_PORTS 4
#define WAIT_USB_TOUT_200US 800 // 等待USB中断超时时间
typedef struct
{
uint8_t DeviceStatus; // 设备状态,0-无设备,1-有设备但尚未初始化,2-有设备但初始化枚举失败,3-有设备且初始化枚举成功
uint8_t DeviceAddress; // 设备被分配的USB地址
uint8_t DeviceSpeed; // 0为低速,非0为全速
uint8_t DeviceType; // 设备类型
uint16_t DeviceVID;
uint16_t DevicePID;
uint8_t GpVar[4]; // 通用变量，存放端点
uint8_t GpHUBPortNum; // 通用变量,如果是HUB，表示HUB端口数
} _RootHubDev;
typedef struct
{
UINT8 DeviceStatus; // 设备状态,0-无设备,1-有设备但尚未初始化,2-有设备但初始化枚举失败,3-有设备且初始化枚举成功
UINT8 DeviceAddress; // 设备被分配的USB地址
UINT8 DeviceSpeed; // 0为低速,非0为全速
UINT8 DeviceType; // 设备类型
UINT16 DeviceVID;
UINT16 DevicePID;
UINT8 GpVar[4]; // 通用变量
} _DevOnHubPort; // 假定:不超过1个外部HUB,每个外部HUB不超过HUB_MAX_PORTS个端口(多了不管)
extern _RootHubDev ThisUsbDev;
extern _DevOnHubPort DevOnHubPort[HUB_MAX_PORTS]; // 假定:不超过1个外部HUB,每个外部HUB不超过HUB_MAX_PORTS个端口(多了不管)
extern uint8_t UsbDevEndp0Size; // USB设备的端点0的最大包尺寸 */
extern uint8_t FoundNewDev;
extern uint8_t *pHOST_RX_RAM_Addr;
extern uint8_t *pHOST_TX_RAM_Addr;
extern _RootHubDev ThisUsb2Dev;
extern _DevOnHubPort DevOnU2HubPort[HUB_MAX_PORTS]; // 假定:不超过1个外部HUB,每个外部HUB不超过HUB_MAX_PORTS个端口(多了不管)
extern uint8_t Usb2DevEndp0Size; // USB设备的端点0的最大包尺寸 */
extern uint8_t FoundNewU2Dev;
extern uint8_t *pU2HOST_RX_RAM_Addr;
extern uint8_t *pU2HOST_TX_RAM_Addr;
#define pSetupReq ((PUSB_SETUP_REQ)pHOST_TX_RAM_Addr)
#define pU2SetupReq ((PUSB_SETUP_REQ)pU2HOST_TX_RAM_Addr)
extern uint8_t Com_Buffer[];
extern uint8_t U2Com_Buffer[];
/* 以下为USB主机请求包 */
extern const uint8_t SetupGetDevDescr[]; // 获取设备描述符*/
extern const uint8_t SetupGetCfgDescr[]; // 获取配置描述符*/
extern const uint8_t SetupSetUsbAddr[]; // 设置USB地址*/
extern const uint8_t SetupSetUsbConfig[]; // 设置USB配置*/
extern const uint8_t SetupSetUsbInterface[]; // 设置USB接口配置*/
extern const uint8_t SetupClrEndpStall[]; // 清除端点STALL*/
extern const uint8_t SetupGetU2DevDescr[]; // 获取设备描述符*/
extern const uint8_t SetupGetU2CfgDescr[]; // 获取配置描述符*/
extern const uint8_t SetupSetUsb2Addr[]; // 设置USB地址*/
extern const uint8_t SetupSetUsb2Config[]; // 设置USB配置*/
extern const uint8_t SetupSetUsb2Interface[]; // 设置USB接口配置*/
extern const uint8_t SetupClrU2EndpStall[]; // 清除端点STALL*/
/**
* @brief 关闭ROOT-HUB端口,实际上硬件已经自动关闭,此处只是清除一些结构状态
*/
void DisableRootHubPort(void);
/**
* @brief 分析ROOT-HUB状态,处理ROOT-HUB端口的设备插拔事件
* 如果设备拔出,函数中调用DisableRootHubPort()函数,将端口关闭,插入事件,置相应端口的状态位
*
* @return 返回ERR_SUCCESS为没有情况,返回ERR_USB_CONNECT为检测到新连接,返回ERR_USB_DISCON为检测到断开
*/
uint8_t AnalyzeRootHub(void);
/**
* @brief 设置USB主机当前操作的USB设备地址
*
* @param addr - USB设备地址
*/
void SetHostUsbAddr(uint8_t addr);
/**
* @brief 设置当前USB速度
*
* @param FullSpeed - USB速度
*/
void SetUsbSpeed(uint8_t FullSpeed);
/**
* @brief 检测到设备后,复位总线,为枚举设备准备,设置为默认为全速
*/
void ResetRootHubPort(void);
/**
* @brief 使能ROOT-HUB端口,相应的bUH_PORT_EN置1开启端口,设备断开可能导致返回失败
*
* @return 返回ERR_SUCCESS为检测到新连接,返回ERR_USB_DISCON为无连接
*/
uint8_t EnableRootHubPort(void);
/**
* @brief 等待USB中断
*
* @return 返回ERR_SUCCESS 数据接收或者发送成功,返回ERR_USB_UNKNOWN 数据接收或者发送失败
*/
uint8_t WaitUSB_Interrupt(void);
/**
* @brief 传输事务,输入目的端点地址/PID令牌,同步标志,以20uS为单位的NAK重试总时间(0则不重试,0xFFFF无限重试),返回0成功,超时/出错重试
* 本子程序着重于易理解,而在实际应用中,为了提供运行速度,应该对本子程序代码进行优化
*
* @param endp_pid - 令牌和地址, 高4位是token_pid令牌, 低4位是端点地址
* @param tog - 同步标志
* @param timeout - 超时时间
*
* @return ERR_USB_UNKNOWN 超时，可能硬件异常
* ERR_USB_DISCON 设备断开
* ERR_USB_CONNECT 设备连接
* ERR_SUCCESS 传输完成
*/
uint8_t USBHostTransact(uint8_t endp_pid, uint8_t tog, uint32_t timeout);
/**
* @brief 执行控制传输,8字节请求码在pSetupReq中,DataBuf为可选的收发缓冲区
*
* @param DataBuf - 如果需要接收和发送数据,那么DataBuf需指向有效缓冲区用于存放后续数据
* @param RetLen - 实际成功收发的总长度保存在RetLen指向的字节变量中
*
* @return ERR_USB_BUF_OVER IN状态阶段出错
* ERR_SUCCESS 数据交换成功
*/
uint8_t HostCtrlTransfer(uint8_t *DataBuf, uint8_t *RetLen);
/**
* @brief 复制控制传输的请求包
*
* @param pReqPkt - 控制请求包地址
*/
void CopySetupReqPkg(const uint8_t *pReqPkt);
/**
* @brief 获取设备描述符,返回在 pHOST_TX_RAM_Addr 中
*
* @return ERR_USB_BUF_OVER 描述符长度错误
* ERR_SUCCESS 成功
*/
uint8_t CtrlGetDeviceDescr(void);
/**
* @brief 获取配置描述符,返回在 pHOST_TX_RAM_Addr 中
*
* @return ERR_USB_BUF_OVER 描述符长度错误
* ERR_SUCCESS 成功
*/
uint8_t CtrlGetConfigDescr(void);
/**
* @brief 设置USB设备地址
*
* @param addr - 设备地址
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlSetUsbAddress(uint8_t addr);
/**
* @brief 设置USB设备配置
*
* @param cfg - 配置值
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlSetUsbConfig(uint8_t cfg);
/**
* @brief 清除端点STALL
*
* @param endp - 端点地址
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlClearEndpStall(uint8_t endp);
/**
* @brief 设置USB设备接口
*
* @param cfg - 配置值
*
* @return ERR_SUCCESS 成功
*/
uint8_t CtrlSetUsbIntercace(uint8_t cfg);
/**
* @brief USB主机功能初始化
*/
void USB_HostInit(void);
uint8_t EnumAllHubPort(void);// 枚举所有ROOT-HUB端口下外部HUB后的二级USB设备
void SelectHubPort(uint8_t HubPortIndex); // HubPortIndex=0选择操作指定的ROOT-HUB端口,否则选择操作指定的ROOT-HUB端口的外部HUB的指定端口
uint16_t SearchTypeDevice(uint8_t type); // 在ROOT-HUB以及外部HUB各端口上搜索指定类型的设备所在的端口号,输出端口号为0xFFFF则未搜索到.
uint8_t SETorOFFNumLock(uint8_t *buf); // NumLock的点灯判断
/*************************************************************/
/**
* @brief 初始化指定ROOT-HUB端口的USB设备
*
* @return 错误码
*/
uint8_t InitRootDevice(void);
/**
* @brief 获取HID设备报表描述符,返回在TxBuffer中
*
* @return 错误码
*/
uint8_t CtrlGetHIDDeviceReport(uint8_t infc);
/**
* @brief 获取HUB描述符,返回在Com_Buffer中
*
* @return 错误码
*/
uint8_t CtrlGetHubDescr(void);
/**
* @brief 查询HUB端口状态,返回在Com_Buffer中
*
* @param HubPortIndex - 端口号
*
* @return 错误码
*/
uint8_t HubGetPortStatus(uint8_t HubPortIndex);
/**
* @brief 设置HUB端口特性
*
* @param HubPortIndex - 端口号
* @param FeatureSelt - 端口特性
*
* @return 错误码
*/
uint8_t HubSetPortFeature(uint8_t HubPortIndex, uint8_t FeatureSelt);
/**
* @brief 清除HUB端口特性
*
* @param HubPortIndex - 端口号
* @param FeatureSelt - 端口特性
*
* @return 错误码
*/
uint8_t HubClearPortFeature(uint8_t HubPortIndex, uint8_t FeatureSelt);
#ifdef __cplusplus
}
#endif
#endif // __CH59x_USBHOST_H__

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/* CH592 Flash-ROM & Data-Flash */
/* Website: http://wch.cn */
/* Email: tech@wch.cn */
/* Author: W.ch 2020.06 */
/* V1.0 FlashROM library for USER/BOOT */
/* for the target in USER code area on the chip divided into USER code area and BOOT area */
/* 用于具有用户代码区和引导区的芯片、操作目标为用户代码区的情况，
可以在用户代码中被调用（IAP，擦写自身），也可以在引导代码中被调用（更新用户代码） */
/* Flash-ROM feature:
for store program code, support block erasing, dword and page writing, dword verifying, unit for Length is byte,
minimal quantity for write or verify is one dword (4-bytes),
256 bytes/page for writing, FLASH_ROM_WRITE support one dword or more dword writing, but multiple of 256 is the best,
4KB (4096 bytes) bytes/block for erasing, so multiple of 4096 is the best */
/* Data-Flash(EEPROM) feature:
for store data, support block erasing, byte and page writing, byte reading,
minimal quantity for write or read is one byte,
256 bytes/page for writing, EEPROM_WRITE support one byte or more byte writing, but multiple of 256 is the best,
0.25KB/4KB (256/4096 bytes) bytes/block for erasing, so multiple of 256 or 4096 is the best */
#ifndef EEPROM_PAGE_SIZE
#define EEPROM_PAGE_SIZE 256 // Flash-ROM & Data-Flash page size for writing
#define EEPROM_BLOCK_SIZE 4096 // Flash-ROM & Data-Flash block size for erasing
#define EEPROM_MIN_ER_SIZE EEPROM_PAGE_SIZE // Data-Flash minimal size for erasing
//#define EEPROM_MIN_ER_SIZE EEPROM_BLOCK_SIZE // Flash-ROM minimal size for erasing
#define EEPROM_MIN_WR_SIZE 1 // Data-Flash minimal size for writing
#define EEPROM_MAX_SIZE 0x8000 // Data-Flash maximum size, 32KB
#endif
#ifndef FLASH_MIN_WR_SIZE
#define FLASH_MIN_WR_SIZE 4 // Flash-ROM minimal size for writing
#endif
#ifndef FLASH_ROM_MAX_SIZE
#define FLASH_ROM_MAX_SIZE 0x070000 // Flash-ROM maximum program size, 448KB
#endif
#ifndef CMD_FLASH_ROM_SW_RESET
// CMD_* for caller from FlashROM or RAM, auto execute CMD_FLASH_ROM_SW_RESET before command
#define CMD_FLASH_ROM_START_IO 0x00 // start FlashROM I/O, without parameter
#define CMD_FLASH_ROM_SW_RESET 0x04 // software reset FlashROM, without parameter
#define CMD_GET_ROM_INFO 0x06 // get information from FlashROM, parameter @Address,Buffer
#define CMD_GET_UNIQUE_ID 0x07 // get 64 bit unique ID, parameter @Buffer
#define CMD_FLASH_ROM_PWR_DOWN 0x0D // power-down FlashROM, without parameter
#define CMD_FLASH_ROM_PWR_UP 0x0C // power-up FlashROM, without parameter
#define CMD_FLASH_ROM_LOCK 0x08 // lock(protect)/unlock FlashROM data block, return 0 if success, parameter @StartAddr
// StartAddr: 0=unlock all, 1=lock boot code, 3=lock all code and data
#define CMD_EEPROM_ERASE 0x09 // erase Data-Flash block, return 0 if success, parameter @StartAddr,Length
#define CMD_EEPROM_WRITE 0x0A // write Data-Flash data block, return 0 if success, parameter @StartAddr,Buffer,Length
#define CMD_EEPROM_READ 0x0B // read Data-Flash data block, parameter @StartAddr,Buffer,Length
#define CMD_FLASH_ROM_ERASE 0x01 // erase FlashROM block, return 0 if success, parameter @StartAddr,Length
#define CMD_FLASH_ROM_WRITE 0x02 // write FlashROM data block, minimal block is dword, return 0 if success, parameter @StartAddr,Buffer,Length
#define CMD_FLASH_ROM_VERIFY 0x03 // read FlashROM data block, minimal block is dword, return 0 if success, parameter @StartAddr,Buffer,Length
#endif
#define ROM_CFG_MAC_ADDR 0x7F018 // address for MAC address information
#define ROM_CFG_BOOT_INFO 0x7DFF8 // address for BOOT information
/**
* @brief execute Flash/EEPROM command, caller from FlashROM or RAM
*
* @param cmd - CMD_* for caller from FlashROM or RAM.
* @param StartAddr - Address of the data to be process.
* @param Buffer - Pointer to the buffer where data should be process, Must be aligned to 4 bytes.
* @param Length - Size of data to be process, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
extern uint32_t FLASH_EEPROM_CMD( uint8_t cmd, uint32_t StartAddr, void *Buffer, uint32_t Length );
/**
* @brief start FlashROM I/O
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_START_IO( ) FLASH_EEPROM_CMD( CMD_FLASH_ROM_START_IO, 0, NULL, 0 )
/**
* @brief software reset FlashROM
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_SW_RESET( ) FLASH_EEPROM_CMD( CMD_FLASH_ROM_SW_RESET, 0, NULL, 0 )
/**
* @brief get 6 bytes MAC address
*
* @param Buffer - Pointer to the buffer where data should be stored, Must be aligned to 4 bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define GetMACAddress(Buffer) FLASH_EEPROM_CMD( CMD_GET_ROM_INFO, ROM_CFG_MAC_ADDR, Buffer, 0 )
/**
* @brief get 8 bytes BOOT information
*
* @param Buffer - Pointer to the buffer where data should be stored, Must be aligned to 4 bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define GET_BOOT_INFO(Buffer) FLASH_EEPROM_CMD( CMD_GET_ROM_INFO, ROM_CFG_BOOT_INFO, Buffer, 0 )
/**
* @brief power-down FlashROM
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_PWR_DOWN( ) FLASH_EEPROM_CMD( CMD_FLASH_ROM_PWR_DOWN, 0, NULL, 0 )
/**
* @brief power-up FlashROM
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_PWR_UP( ) FLASH_EEPROM_CMD( CMD_FLASH_ROM_PWR_UP, 0, NULL, 0 )
/**
* @brief read Data-Flash data block
*
* @param StartAddr - Address of the data to be read.
* @param Buffer - Pointer to the buffer where data should be stored, Must be aligned to 4 bytes.
* @param Length - Size of data to be read, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define EEPROM_READ(StartAddr,Buffer,Length) FLASH_EEPROM_CMD( CMD_EEPROM_READ, StartAddr, Buffer, Length )
/**
*
* @param StartAddr - Address of the data to be erased.
* @param Length - Size of data to be erased, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define EEPROM_ERASE(StartAddr,Length) FLASH_EEPROM_CMD( CMD_EEPROM_ERASE, StartAddr, NULL, Length )
/**
* @brief write Data-Flash data block
*
* @param StartAddr - Address of the data to be written.
* @param Buffer - Pointer to the source buffer, Must be aligned to 4 bytes.
* @param Length - Size of data to be written, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define EEPROM_WRITE(StartAddr,Buffer,Length) FLASH_EEPROM_CMD( CMD_EEPROM_WRITE, StartAddr, Buffer, Length )
/**
* @brief erase FlashROM block
*
* @param StartAddr - Address of the data to be erased.
* @param Length - Size of data to be erased, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_ERASE(StartAddr,Length) FLASH_EEPROM_CMD( CMD_FLASH_ROM_ERASE, StartAddr, NULL, Length )
/**
* @brief write FlashROM data block, minimal block is dword.
*
* @param StartAddr - Address of the data to be written.
* @param Buffer - Pointer to the source buffer, Must be aligned to 4 bytes.
* @param Length - Size of data to be written, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_WRITE(StartAddr,Buffer,Length) FLASH_EEPROM_CMD( CMD_FLASH_ROM_WRITE, StartAddr, Buffer, Length )
/**
* @brief verify FlashROM data block, minimal block is dword.
*
* @param StartAddr - Address of the data to verify.
* @param Buffer - Pointer to the source buffer, Must be aligned to 4 bytes.
* @param Length - Size of data to verify, in bytes.
*
* @return 0-SUCCESS (!0)-FAILURE
*/
#define FLASH_ROM_VERIFY(StartAddr,Buffer,Length) FLASH_EEPROM_CMD( CMD_FLASH_ROM_VERIFY, StartAddr, Buffer, Length )

BIN
nametag8_CH592/StdPeriphDriver/libISP592.a Normal file
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nametag8_CH592/nametag8_CH592.launch Normal file
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<?xml version="1.0" encoding="UTF-8" ?>
<launchConfiguration type="com.mounriver.debug.gdbjtag.openocd.launchConfigurationType">
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doContinue" value="true" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doDebugInRam" value="false" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doFirstReset" value="true" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doSecondReset" value="true" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doStartGdbCLient" value="true" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.doStartGdbServer" value="true" />
<booleanAttribute key="com.mounriver.debug.gdbjtag.openocd.enableSemihosting" value="false" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.firstResetType" value="init" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#xD;&#xA;set architecture riscv:rv32&#xD;&#xA;set remotetimeout unlimited" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbClientOtherOptions" value="" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerConnectionAddress" value="" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerExecutable" value="${eclipse_home}toolchain/OpenOCD/bin/${openocd_executable}" />
<intAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerLog" value="" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerOther" value="-f &quot;${eclipse_home}toolchain/OpenOCD/bin/wch-riscv.cfg&quot;" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666" />
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<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.otherInitCommands" value="" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.otherRunCommands" value="" />
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.secondResetType" value="halt" />
<stringAttribute key="com.mounriver.debug.gdbjtag.svdPath" value="${eclipse_home}template/wizard/WCH/RISC-V/CH59X/NoneOS/CH59Xxx.svd" />
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="" />
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value="" />
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost" />
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD" />
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true" />
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true" />
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value="" />
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333" />
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false" />
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false" />
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true" />
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="handle_reset" />
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<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true" />
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${eclipse_home}toolchain/RISC-V Embedded GCC/bin/riscv-none-embed-gdb.exe" />
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<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="obj\nametag8_CH592.elf" />
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="nametag8_CH592" />
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true" />
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="" />
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/nametag8_CH592" />
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4" />
</listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#xD;&#xA;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#xD;&#xA;" />
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory" />
</launchConfiguration>

2
nametag8_CH592/nametag8_CH592.wvproj Normal file
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– am782"!qCw™[E1|¢R :ŽsÂw5•1ª†qˆH‹”“j¸;® D<QYk‰:D…0&q4 …žOsV<73>“cE0FÆ#^ 2Qo69tƒ³+f´a§<61>.3(<28>)<29>&¬><3E>;¦`xMOS‡Š—k·E—¯(A™‚(s‹*¨·cªÄDÀOÆbY”quA»$NÀ‡8dŠ¾µÀmiA3»ˆwnt,À›<C380>J
<^*;Es%O<;x¶Z¾<5A>¯ ^ÃÀ

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nametag8_CH592/user/comm/soft_i2c_master.c Normal file
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/*
* soft_i2c.c
*
* Created on: Oct 11, 2024
* Author: true
*/
// ===================================================================================
// Software I2C Master Functions for CH32X035/X034/X033 * v1.1 *
// modified for CH592 by true
// ===================================================================================
//
// Simple I2C bitbanging. ACK bit of the slave is ignored. Clock stretching by the
// slave is not allowed. External pull-up resistors (4k7 - 10k) are mandatory!
//
// Further information: https://github.com/wagiminator/ATtiny13-TinyOLEDdemo
// 2023 by Stefan Wagner: https://github.com/wagiminator
//
// This implementation requires 48MHz clock for 400KHz communication.
#include "soft_i2c_master.h"
// ===================================================================================
// I2C Delay
// ===================================================================================
#define I2C_DLY_TICKS_H (((F_CPU * 9) / (I2C_CLKRATE * 25)) - 41)
#define I2C_DLY_TICKS_L (((F_CPU * 16) / (I2C_CLKRATE * 25)) - 76)
#if I2C_DLY_TICKS_H >= 1
#define I2C_DELAY_H() DLY_ticks(I2C_DLY_TICKS_H)
#else
#define I2C_DELAY_H()
#endif
#if I2C_DLY_TICKS_L >= 1
#define I2C_DELAY_L() DLY_ticks(I2C_DLY_TICKS_L)
#else
#define I2C_DELAY_L()
#endif
// ===================================================================================
// I2C Pin Macros
// ===================================================================================
#define I2C_SDA_HIGH() PIN_input(PIN_SDA) // release SDA -> pulled HIGH by resistor
#define I2C_SDA_LOW() PIN_output(PIN_SDA) // SDA LOW -> pulled LOW by MCU
#define I2C_SCL_HIGH() PIN_input(PIN_SCL) // release SCL -> pulled HIGH by resistor
#define I2C_SCL_LOW() PIN_output(PIN_SCL) // SCL LOW -> pulled LOW by MCU
#define I2C_SDA_READ() PIN_read(PIN_SDA) // read SDA pin
#define I2C_CLOCKOUT() I2C_DELAY_L();I2C_SCL_HIGH();I2C_DELAY_H();I2C_SCL_LOW()
// ===================================================================================
// I2C Functions
// ===================================================================================
// I2C init function
void I2C_init(void) {
PIN_input(PIN_SCL); // release SCL
PIN_input(PIN_SDA); // release SDA
PIN_low(PIN_SCL); // preset for SCL low
PIN_low(PIN_SDA); // preset for SDA low
}
// I2C transmit one data byte to the slave, ignore ACK bit, no clock stretching allowed
void I2C_write(uint8_t data) {
uint8_t i;
for(i=8; i; i--, data<<=1) { // transmit 8 bits, MSB first
(data & 0x80) ? (I2C_SDA_HIGH()) : (I2C_SDA_LOW()); // SDA HIGH if bit is 1
I2C_CLOCKOUT(); // clock out -> slave reads the bit
}
I2C_SDA_HIGH(); // release SDA for ACK bit of slave
I2C_CLOCKOUT(); // 9th clock pulse is for the ignored ACK bit
}
// I2C start transmission
void I2C_start(uint8_t addr) {
I2C_SDA_LOW(); // start condition: SDA goes LOW first
I2C_DELAY_H(); // delay
I2C_SCL_LOW(); // start condition: SCL goes LOW second
I2C_write(addr); // send slave address
}
// I2C restart transmission
void I2C_restart(uint8_t addr) {
I2C_SDA_HIGH(); // prepare SDA for HIGH to LOW transition
I2C_DELAY_H(); // delay
I2C_SCL_HIGH(); // restart condition: clock HIGH
I2C_start(addr); // start again
}
// I2C stop transmission
void I2C_stop(void) {
I2C_SDA_LOW(); // prepare SDA for LOW to HIGH transition
I2C_DELAY_H(); // delay
I2C_SCL_HIGH(); // stop condition: SCL goes HIGH first
I2C_DELAY_H(); // delay
I2C_SDA_HIGH(); // stop condition: SDA goes HIGH second
}
// I2C receive one data byte from the slave (ack=0 for last byte, ack>0 if more bytes to follow)
uint8_t I2C_read(uint8_t ack) {
uint8_t i;
uint8_t data = 0; // variable for the received byte
I2C_SDA_HIGH(); // release SDA -> will be toggled by slave
for(i=8; i; i--) { // receive 8 bits
data <<= 1; // bits shifted in right (MSB first)
I2C_DELAY_L(); // delay
I2C_SCL_HIGH(); // clock HIGH
I2C_DELAY_H(); // delay
if(I2C_SDA_READ()) data |= 1; // read bit
I2C_SCL_LOW(); // clock LOW -> slave prepares next bit
}
if(ack) I2C_SDA_LOW(); // pull SDA LOW to acknowledge (ACK)
I2C_CLOCKOUT(); // clock out -> slave reads ACK bit
return data; // return the received byte
}
// Send data buffer via I2C bus and stop
void I2C_writeBuffer(uint8_t* buf, uint16_t len) {
while(len--) I2C_write(*buf++); // write buffer
I2C_stop(); // stop transmission
}
// Read data via I2C bus to buffer and stop
void I2C_readBuffer(uint8_t* buf, uint16_t len) {
while(len--) *buf++ = I2C_read(len > 0);
I2C_stop();
}

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nametag8_CH592/user/comm/soft_i2c_master.h Normal file
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/*
* soft_i2c.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_COMM_SOFT_I2C_H_
#define USER_COMM_SOFT_I2C_H_
#endif /* USER_COMM_SOFT_I2C_H_ */

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nametag8_CH592/user/device/aw20xxx.c Normal file
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/*
* aw20xxx.c
*
* Created on: Oct 11, 2024
* Author: true
*/

13
nametag8_CH592/user/device/aw20xxx.h Normal file
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/*
* aw20xxx.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_DEVICE_AW20XXX_H_
#define USER_DEVICE_AW20XXX_H_
#endif /* USER_DEVICE_AW20XXX_H_ */

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nametag8_CH592/user/device/ch32sub.c Normal file
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/*
* ch32sub.c
*
* the sub MCU is responsible for the following:
* - user buttons (complete handling / filtering)
* - rgb chip hw enable / disable
* - IrDA rx/tx and IrDA transciever enable / disable
* - accelerometer hardware interrupt
*
* Created on: Oct 11, 2024
* Author: true
*/
#include "ch32sub.h"
#include "port_intr.h"
volatile uint8_t intr_flag = 0;
void ch32sub_isr()
{
// we'll check what the MCU has to say when we're done processing
intr_flag = 1;
}
void ch32sub_process()
{
if (intr_flag) {
intr_flag = 0;
// get interrupt flags
}
}
void ch32sub_init()
{
// configure interrupt pin as pull-up
// interrupt driven by CH32V003 is open drain active-lo
GPIOB_ModeCfg(SUB_INTR_PIN, GPIO_ModeIN_PU);
// register interrupt handler
port_intr_cb_register(PORT_INTR_GPIOB, SUB_INTR_PIN_NR, ch32sub_isr);
// configure interrupt to be rising edge
GPIOB_ITModeCfg(SUB_INTR_PIN, GPIO_ITMode_RiseEdge);
}

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nametag8_CH592/user/device/ch32sub.h Normal file
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/*
* ch32sub.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_DEVICE_CH32SUB_H_
#define USER_DEVICE_CH32SUB_H_
#include "CH59x_common.h"
#include <stdint.h>
#define SUB_INTR_PORT GPIOB
#define SUB_INTR_PIN GPIO_Pin_13
#define SUB_INTR_PIN_NR 13
#define SUB_INT_BTN (1 << 0)
#define SUB_INT_ACCEL (1 << 1)
#define SUB_INT_UTX_DONE (1 << 4)
#define SUB_INT_URX_RCVD (1 << 5)
void ch32sub_init();
void ch32sub_process();
#endif /* USER_DEVICE_CH32SUB_H_ */

8
nametag8_CH592/user/device/eeprom16.c Normal file
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/*
* eeprom16.c
*
* Created on: Oct 11, 2024
* Author: true
*/

13
nametag8_CH592/user/device/eeprom16.h Normal file
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/*
* eeprom16.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_DEVICE_EEPROM16_H_
#define USER_DEVICE_EEPROM16_H_
#endif /* USER_DEVICE_EEPROM16_H_ */

8
nametag8_CH592/user/device/lis2dw.c Normal file
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/*
* lis2dw.c
*
* Created on: Oct 11, 2024
* Author: true
*/

13
nametag8_CH592/user/device/lis2dw.h Normal file
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/*
* lis2dw.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_DEVICE_LIS2DW_H_
#define USER_DEVICE_LIS2DW_H_
#endif /* USER_DEVICE_LIS2DW_H_ */

8
nametag8_CH592/user/device/ssd1306.c Normal file
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/*
* ssd1306.c
*
* Created on: Oct 11, 2024
* Author: true
*/

13
nametag8_CH592/user/device/ssd1306.h Normal file
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/*
* ssd1306.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_DEVICE_SSD1306_H_
#define USER_DEVICE_SSD1306_H_
#endif /* USER_DEVICE_SSD1306_H_ */

37
nametag8_CH592/user/gat/gat_gpio.c Normal file
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/*
* gat_gpio.c
*
* Created on: Oct 11, 2024
* Author: true
*/
#include "gat_gpio.h"
uint8_t gat_id = 0xff;
static void gat_gpio_idle_lo()
{
GPIOB_ModeCfg(GAT_GPIO_PIN_GP1 | GAT_GPIO_PIN_GP2, GPIO_ModeIN_PD);
}
void gat_gpio_init()
{
uint8_t lo, hi;
// at startup, configure each GPIO as input float.
GPIOB_ModeCfg(GAT_GPIO_PIN_GP1 | GAT_GPIO_PIN_GP2, GPIO_ModeIN_Floating);
// get ID from GPIO pins
lo = (GPIOB_ReadPort() & GAT_GPIO_PIN_GP1) ? 1 : 0;
hi = (GPIOB_ReadPort() & GAT_GPIO_PIN_GP2) ? 1 : 0;
gat_id = (hi << 1) | lo;
// configure as weak pulldowns
gat_gpio_idle_lo();
}

30
nametag8_CH592/user/gat/gat_gpio.h Normal file
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/*
* gat_gpio.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_GAT_GAT_GPIO_H_
#define USER_GAT_GAT_GPIO_H_
#include "CH59x_common.h"
#include <stdint.h>
#define GAT_GPIO_PORT GPIOB
#define GAT_GPIO_PIN_GP1 GPIO_Pin_7
#define GAT_GPIO_PIN_GP2 GPIO_Pin_4
extern uint8_t gat_id;
void gat_gpio_init();
#endif /* USER_GAT_GAT_GPIO_H_ */

14
nametag8_CH592/user/gat/gat_i2c.c Normal file
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/*
* gat_i2c.c
*
* Created on: Oct 11, 2024
* Author: true
*
* implements a shoddy i2c slave.
* maximum speed 100KHz tested.
*/
void soft_i2c_slave_irq_cb()
{
}

13
nametag8_CH592/user/gat/gat_i2c.h Normal file
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/*
* gat_i2c.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_GAT_GAT_I2C_H_
#define USER_GAT_GAT_I2C_H_
#endif /* USER_GAT_GAT_I2C_H_ */

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nametag8_CH592/user/main.c Normal file
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/********************************** (C) COPYRIGHT *******************************
* File Name : Main.c
* Author : WCH
* Version : V1.0
* Date : 2020/08/06
* Description : 串口1收发演示
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "CH59x_common.h"
#include "port_intr.h"
#include "gat/gat_gpio.h"
#include "device/ch32sub.h"
void ch59x_xtal_conf()
{
HSECFG_Current(HSE_RCur_125);
HSECFG_Capacitance(HSECap_14p);
}
uint8_t TxBuff[] = "This is a tx exam\r\n";
uint8_t RxBuff[100];
uint8_t trigB;
/*********************************************************************
* @fn main
*
* @brief 主函数
*
* @return none
*/
int main()
{
//uint8_t len;
// configure clock
ch59x_xtal_conf();
SetSysClock(CLK_SOURCE_PLL_32MHz);
// enable DC-DC converter
PWR_DCDCCfg(ENABLE);
// configure port-based interrupts
port_intr_init();
// configure aux MCU initial settings, attention interrupt
ch32sub_init();
// configure GAT aux GPIOs, get gat ID
gat_gpio_init();
// configure GAT i2c slave
/*
// 配置串口1：先配置IO口模式，再配置串口
GPIOA_SetBits(GPIO_Pin_9);
GPIOA_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_PU); // RXD-配置上拉输入
GPIOA_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP_5mA); // TXD-配置推挽输出，注意先让IO口输出高电平
UART1_DefInit();
#if 1 // 测试串口发送字符串
UART1_SendString(TxBuff, sizeof(TxBuff));
#endif
#if 1 // 查询方式：接收数据后发送出去
while(1)
{
len = UART1_RecvString(RxBuff);
if(len)
{
UART1_SendString(RxBuff, len);
}
}
#endif
#if 0 // 中断方式：接收数据后发送出去
UART1_ByteTrigCfg(UART_7BYTE_TRIG);
trigB = 7;
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_LINE_STAT);
PFIC_EnableIRQ(UART1_IRQn);
#endif
*/
while(1) {
// only care about aux MCU when all other processing is done
ch32sub_process();
}
}
/*********************************************************************
* @fn UART1_IRQHandler
*
* @brief UART1中断函数
*
* @return none
*/
__INTERRUPT
__HIGH_CODE
void UART1_IRQHandler(void)
{
/*
volatile uint8_t i;
switch(UART1_GetITFlag())
{
case UART_II_LINE_STAT: // 线路状态错误
{
UART1_GetLinSTA();
break;
}
case UART_II_RECV_RDY: // 数据达到设置触发点
for(i = 0; i != trigB; i++)
{
RxBuff[i] = UART1_RecvByte();
UART1_SendByte(RxBuff[i]);
}
break;
case UART_II_RECV_TOUT: // 接收超时，暂时一帧数据接收完成
i = UART1_RecvString(RxBuff);
UART1_SendString(RxBuff, i);
break;
case UART_II_THR_EMPTY: // 发送缓存区空，可继续发送
break;
case UART_II_MODEM_CHG: // 只支持串口0
break;
default:
break;
}
*/
}

63
nametag8_CH592/user/port_intr.c Normal file
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/*
* port_intr.c
*
* Created on: Oct 11, 2024
* Author: true
*/
#include "CH59x_common.h"
#include "port_intr.h"
#include <stdint.h>
static void (*cb[2][24])(void) = {0};
void port_intr_cb_register(uint8_t port, uint8_t idx, void (*fn)(void))
{
if (idx >= 24) return;
if (port > 2) return;
cb[port][idx] = fn;
}
void port_intr_init()
{
}
/* interrupt handlers */
__INTERRUPT
__HIGH_CODE
void GPIOA_IRQHandler(void)
{
}
__INTERRUPT
__HIGH_CODE
void GPIOB_IRQHandler(void)
{
uint8_t i;
uint16_t flag = R16_PB_INT_IF;
// high priority actions
// none.
// general purpose fallback
for (i = 0; i < 24; i++) {
if (flag & (1 << i)) {
if (cb[PORT_INTR_GPIOB][i]) {
cb[PORT_INTR_GPIOB][i]();
}
}
}
// clear flags
R16_PB_INT_IF = flag;
}

23
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/*
* port_intr.h
*
* Created on: Oct 11, 2024
* Author: true
*/
#ifndef USER_PORT_INTR_H_
#define USER_PORT_INTR_H_
#define PORT_INTR_GPIOA 0
#define PORT_INTR_GPIOB 1
void port_intr_init();
void port_intr_cb_register(uint8_t port, uint8_t idx, void (*fn)(void));
#endif /* USER_PORT_INTR_H_ */

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/********************************** (C) COPYRIGHT *******************************
* File Name : core_riscv.c
* Author : WCH
* Version : V1.0.1
* Date : 2023/11/11
* Description : RISC-V V2 Core Peripheral Access Layer Source File for CH32V003
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <stdint.h>
/* define compiler specific symbols */
#if defined(__CC_ARM)
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined(__ICCARM__)
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined(__GNUC__)
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined(__TASKING__)
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/*********************************************************************
* @fn __get_MSTATUS
*
* @brief Return the Machine Status Register
*
* @return mstatus value
*/
uint32_t __get_MSTATUS(void)
{
uint32_t result;
__ASM volatile("csrr %0," "mstatus": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_MSTATUS
*
* @brief Set the Machine Status Register
*
* @param value - set mstatus value
*
* @return none
*/
void __set_MSTATUS(uint32_t value)
{
__ASM volatile("csrw mstatus, %0" : : "r"(value));
}
/*********************************************************************
* @fn __get_MISA
*
* @brief Return the Machine ISA Register
*
* @return misa value
*/
uint32_t __get_MISA(void)
{
uint32_t result;
__ASM volatile("csrr %0,""misa" : "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_MISA
*
* @brief Set the Machine ISA Register
*
* @param value - set misa value
*
* @return none
*/
void __set_MISA(uint32_t value)
{
__ASM volatile("csrw misa, %0" : : "r"(value));
}
/*********************************************************************
* @fn __get_MTVEC
*
* @brief Return the Machine Trap-Vector Base-Address Register
*
* @return mtvec value
*/
uint32_t __get_MTVEC(void)
{
uint32_t result;
__ASM volatile("csrr %0," "mtvec": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_MTVEC
*
* @brief Set the Machine Trap-Vector Base-Address Register
*
* @param value - set mtvec value
*
* @return none
*/
void __set_MTVEC(uint32_t value)
{
__ASM volatile("csrw mtvec, %0":: "r"(value));
}
/*********************************************************************
* @fn __get_MSCRATCH
*
* @brief Return the Machine Seratch Register
*
* @return mscratch value
*/
uint32_t __get_MSCRATCH(void)
{
uint32_t result;
__ASM volatile("csrr %0," "mscratch" : "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_MSCRATCH
*
* @brief Set the Machine Seratch Register
*
* @param value - set mscratch value
*
* @return none
*/
void __set_MSCRATCH(uint32_t value)
{
__ASM volatile("csrw mscratch, %0" : : "r"(value));
}
/*********************************************************************
* @fn __get_MEPC
*
* @brief Return the Machine Exception Program Register
*
* @return mepc value
*/
uint32_t __get_MEPC(void)
{
uint32_t result;
__ASM volatile("csrr %0," "mepc" : "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_MEPC
*
* @brief Set the Machine Exception Program Register
*
* @return mepc value
*/
void __set_MEPC(uint32_t value)
{
__ASM volatile("csrw mepc, %0" : : "r"(value));
}
/*********************************************************************
* @fn __get_MCAUSE
*
* @brief Return the Machine Cause Register
*
* @return mcause value
*/
uint32_t __get_MCAUSE(void)
{
uint32_t result;
__ASM volatile("csrr %0," "mcause": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_MEPC
*
* @brief Set the Machine Cause Register
*
* @return mcause value
*/
void __set_MCAUSE(uint32_t value)
{
__ASM volatile("csrw mcause, %0":: "r"(value));
}
/*********************************************************************
* @fn __get_MVENDORID
*
* @brief Return Vendor ID Register
*
* @return mvendorid value
*/
uint32_t __get_MVENDORID(void)
{
uint32_t result;
__ASM volatile("csrr %0,""mvendorid": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __get_MARCHID
*
* @brief Return Machine Architecture ID Register
*
* @return marchid value
*/
uint32_t __get_MARCHID(void)
{
uint32_t result;
__ASM volatile("csrr %0,""marchid": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __get_MIMPID
*
* @brief Return Machine Implementation ID Register
*
* @return mimpid value
*/
uint32_t __get_MIMPID(void)
{
uint32_t result;
__ASM volatile("csrr %0,""mimpid": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __get_MHARTID
*
* @brief Return Hart ID Register
*
* @return mhartid value
*/
uint32_t __get_MHARTID(void)
{
uint32_t result;
__ASM volatile("csrr %0,""mhartid": "=r"(result));
return (result);
}
/*********************************************************************
* @fn __get_SP
*
* @brief Return SP Register
*
* @return SP value
*/
uint32_t __get_SP(void)
{
uint32_t result;
__ASM volatile("mv %0,""sp": "=r"(result):);
return (result);
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : core_riscv.h
* Author : WCH
* Version : V1.0.1
* Date : 2023/12/21
* Description : RISC-V V2 Core Peripheral Access Layer Header File for CH32V003
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CORE_RISCV_H__
#define __CORE_RISCV_H__
#ifdef __cplusplus
extern "C" {
#endif
/* IO definitions */
#ifdef __cplusplus
#define __I volatile /* defines 'read only' permissions */
#else
#define __I volatile const /* defines 'read only' permissions */
#endif
#define __O volatile /* defines 'write only' permissions */
#define __IO volatile /* defines 'read / write' permissions */
/* Standard Peripheral Library old types (maintained for legacy purpose) */
typedef __I uint32_t vuc32; /* Read Only */
typedef __I uint16_t vuc16; /* Read Only */
typedef __I uint8_t vuc8; /* Read Only */
typedef const uint32_t uc32; /* Read Only */
typedef const uint16_t uc16; /* Read Only */
typedef const uint8_t uc8; /* Read Only */
typedef __I int32_t vsc32; /* Read Only */
typedef __I int16_t vsc16; /* Read Only */
typedef __I int8_t vsc8; /* Read Only */
typedef const int32_t sc32; /* Read Only */
typedef const int16_t sc16; /* Read Only */
typedef const int8_t sc8; /* Read Only */
typedef __IO uint32_t vu32;
typedef __IO uint16_t vu16;
typedef __IO uint8_t vu8;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
typedef __IO int32_t vs32;
typedef __IO int16_t vs16;
typedef __IO int8_t vs8;
typedef int32_t s32;
typedef int16_t s16;
typedef int8_t s8;
typedef enum {NoREADY = 0, READY = !NoREADY} ErrorStatus;
typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
#define RV_STATIC_INLINE static inline
/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */
typedef struct{
__I uint32_t ISR[8];
__I uint32_t IPR[8];
__IO uint32_t ITHRESDR;
__IO uint32_t RESERVED;
__IO uint32_t CFGR;
__I uint32_t GISR;
__IO uint8_t VTFIDR[4];
uint8_t RESERVED0[12];
__IO uint32_t VTFADDR[4];
uint8_t RESERVED1[0x90];
__O uint32_t IENR[8];
uint8_t RESERVED2[0x60];
__O uint32_t IRER[8];
uint8_t RESERVED3[0x60];
__O uint32_t IPSR[8];
uint8_t RESERVED4[0x60];
__O uint32_t IPRR[8];
uint8_t RESERVED5[0x60];
__IO uint32_t IACTR[8];
uint8_t RESERVED6[0xE0];
__IO uint8_t IPRIOR[256];
uint8_t RESERVED7[0x810];
__IO uint32_t SCTLR;
}PFIC_Type;
/* memory mapped structure for SysTick */
typedef struct
{
__IO uint32_t CTLR;
__IO uint32_t SR;
__IO uint32_t CNT;
uint32_t RESERVED0;
__IO uint32_t CMP;
uint32_t RESERVED1;
}SysTick_Type;
#define PFIC ((PFIC_Type *) 0xE000E000 )
#define NVIC PFIC
#define NVIC_KEY1 ((uint32_t)0xFA050000)
#define NVIC_KEY2 ((uint32_t)0xBCAF0000)
#define NVIC_KEY3 ((uint32_t)0xBEEF0000)
#define SysTick ((SysTick_Type *) 0xE000F000)
/*********************************************************************
* @fn __enable_irq
* This function is only used for Machine mode.
*
* @brief Enable Global Interrupt
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __enable_irq()
{
__asm volatile ("csrs mstatus, %0" : : "r" (0x88) );
}
/*********************************************************************
* @fn __disable_irq
* This function is only used for Machine mode.
*
* @brief Disable Global Interrupt
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __disable_irq()
{
__asm volatile ("csrc mstatus, %0" : : "r" (0x88) );
}
/*********************************************************************
* @fn __NOP
*
* @brief nop
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __NOP()
{
__asm volatile ("nop");
}
/*********************************************************************
* @fn NVIC_EnableIRQ
*
* @brief Enable Interrupt
*
* @param IRQn - Interrupt Numbers
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
NVIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_DisableIRQ
*
* @brief Disable Interrupt
*
* @param IRQn - Interrupt Numbers
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
NVIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_GetStatusIRQ
*
* @brief Get Interrupt Enable State
*
* @param IRQn - Interrupt Numbers
*
* @return 1 - Interrupt Pending Enable
* 0 - Interrupt Pending Disable
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE uint32_t NVIC_GetStatusIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/*********************************************************************
* @fn NVIC_GetPendingIRQ
*
* @brief Get Interrupt Pending State
*
* @param IRQn - Interrupt Numbers
*
* @return 1 - Interrupt Pending Enable
* 0 - Interrupt Pending Disable
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/*********************************************************************
* @fn NVIC_SetPendingIRQ
*
* @brief Set Interrupt Pending
*
* @param IRQn - Interrupt Numbers
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
NVIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_ClearPendingIRQ
*
* @brief Clear Interrupt Pending
*
* @param IRQn - Interrupt Numbers
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
NVIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_GetActive
*
* @brief Get Interrupt Active State
*
* @param IRQn - Interrupt Numbers
*
* @return 1 - Interrupt Active
* 0 - Interrupt No Active
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
{
return((uint32_t)((NVIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/*********************************************************************
* @fn NVIC_SetPriority
*
* @brief Set Interrupt Priority
*
* @param IRQn - Interrupt Numbers
* interrupt nesting enable(CSR-0x804 bit1 = 1)
* priority - bit[7] - Preemption Priority
* bit[6] - Sub priority
* bit[5:0] - Reserve
* interrupt nesting disable(CSR-0x804 bit1 = 0)
* priority - bit[7:6] - Sub priority
* bit[5:0] - Reserve
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint8_t priority)
{
NVIC->IPRIOR[(uint32_t)(IRQn)] = priority;
}
/*********************************************************************
* @fn __WFI
*
* @brief Wait for Interrupt
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFI(void)
{
NVIC->SCTLR &= ~(1<<3); // wfi
asm volatile ("wfi");
}
/*********************************************************************
* @fn _SEV
*
* @brief Set Event
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void _SEV(void)
{
uint32_t t;
t = NVIC->SCTLR;
NVIC->SCTLR |= (1<<3)|(1<<5);
NVIC->SCTLR = (NVIC->SCTLR & ~(1<<5)) | ( t & (1<<5));
}
/*********************************************************************
* @fn _WFE
*
* @brief Wait for Events
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void _WFE(void)
{
NVIC->SCTLR |= (1<<3);
asm volatile ("wfi");
}
/*********************************************************************
* @fn __WFE
*
* @brief Wait for Events
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFE(void)
{
_SEV();
_WFE();
_WFE();
}
/*********************************************************************
* @fn SetVTFIRQ
*
* @brief Set VTF Interrupt
*
* @param addr - VTF interrupt service function base address.
* IRQn - Interrupt Numbers
* num - VTF Interrupt Numbers
* NewState - DISABLE or ENABLE
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void SetVTFIRQ(uint32_t addr, IRQn_Type IRQn, uint8_t num, FunctionalState NewState)
{
if(num > 1) return ;
if (NewState != DISABLE)
{
NVIC->VTFIDR[num] = IRQn;
NVIC->VTFADDR[num] = ((addr&0xFFFFFFFE)|0x1);
}
else
{
NVIC->VTFIDR[num] = IRQn;
NVIC->VTFADDR[num] = ((addr&0xFFFFFFFE)&(~0x1));
}
}
/*********************************************************************
* @fn NVIC_SystemReset
*
* @brief Initiate a system reset request
*
* @return none
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void NVIC_SystemReset(void)
{
NVIC->CFGR = NVIC_KEY3|(1<<7);
}
/* Core_Exported_Functions */
extern uint32_t __get_MSTATUS(void);
extern void __set_MSTATUS(uint32_t value);
extern uint32_t __get_MISA(void);
extern void __set_MISA(uint32_t value);
extern uint32_t __get_MTVEC(void);
extern void __set_MTVEC(uint32_t value);
extern uint32_t __get_MSCRATCH(void);
extern void __set_MSCRATCH(uint32_t value);
extern uint32_t __get_MEPC(void);
extern void __set_MEPC(uint32_t value);
extern uint32_t __get_MCAUSE(void);
extern void __set_MCAUSE(uint32_t value);
extern uint32_t __get_MVENDORID(void);
extern uint32_t __get_MARCHID(void);
extern uint32_t __get_MIMPID(void);
extern uint32_t __get_MHARTID(void);
extern uint32_t __get_SP(void);
#ifdef __cplusplus
}
#endif
#endif/* __CORE_RISCV_H__ */

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/********************************** (C) COPYRIGHT *******************************
* File Name : debug.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for UART
* Printf , Delay functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <debug.h>
static uint8_t p_us = 0;
static uint16_t p_ms = 0;
#define DEBUG_DATA0_ADDRESS ((volatile uint32_t*)0xE00000F4)
#define DEBUG_DATA1_ADDRESS ((volatile uint32_t*)0xE00000F8)
/*********************************************************************
* @fn Delay_Init
*
* @brief Initializes Delay Funcation.
*
* @return none
*/
void Delay_Init(void)
{
p_us = SystemCoreClock / 8000000;
p_ms = (uint16_t)p_us * 1000;
}
/*********************************************************************
* @fn Delay_Us
*
* @brief Microsecond Delay Time.
*
* @param n - Microsecond number.
*
* @return None
*/
void Delay_Us(uint32_t n)
{
uint32_t i;
SysTick->SR &= ~(1 << 0);
i = (uint32_t)n * p_us;
SysTick->CMP = i;
SysTick->CNT = 0;
SysTick->CTLR |=(1 << 0);
while((SysTick->SR & (1 << 0)) != (1 << 0));
SysTick->CTLR &= ~(1 << 0);
}
/*********************************************************************
* @fn Delay_Ms
*
* @brief Millisecond Delay Time.
*
* @param n - Millisecond number.
*
* @return None
*/
void Delay_Ms(uint32_t n)
{
uint32_t i;
SysTick->SR &= ~(1 << 0);
i = (uint32_t)n * p_ms;
SysTick->CMP = i;
SysTick->CNT = 0;
SysTick->CTLR |=(1 << 0);
while((SysTick->SR & (1 << 0)) != (1 << 0));
SysTick->CTLR &= ~(1 << 0);
}
/*********************************************************************
* @fn USART_Printf_Init
*
* @brief Initializes the USARTx peripheral.
*
* @param baudrate - USART communication baud rate.
*
* @return None
*/
void USART_Printf_Init(uint32_t baudrate)
{
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
#if (DEBUG == DEBUG_UART1_NoRemap)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
#elif (DEBUG == DEBUG_UART1_Remap1)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1 | RCC_APB2Periph_AFIO, ENABLE);
GPIO_PinRemapConfig(GPIO_PartialRemap1_USART1, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
#elif (DEBUG == DEBUG_UART1_Remap2)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1 | RCC_APB2Periph_AFIO, ENABLE);
GPIO_PinRemapConfig(GPIO_PartialRemap2_USART1, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
#elif (DEBUG == DEBUG_UART1_Remap3)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_USART1 | RCC_APB2Periph_AFIO, ENABLE);
GPIO_PinRemapConfig(GPIO_FullRemap_USART1, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
#endif
USART_InitStructure.USART_BaudRate = baudrate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Tx;
USART_Init(USART1, &USART_InitStructure);
USART_Cmd(USART1, ENABLE);
}
/*********************************************************************
* @fn SDI_Printf_Enable
*
* @brief Initializes the SDI printf Function.
*
* @param None
*
* @return None
*/
void SDI_Printf_Enable(void)
{
*(DEBUG_DATA0_ADDRESS) = 0;
Delay_Init();
Delay_Ms(1);
}
/*********************************************************************
* @fn _write
*
* @brief Support Printf Function
*
* @param *buf - UART send Data.
* size - Data length.
*
* @return size - Data length
*/
__attribute__((used))
int _write(int fd, char *buf, int size)
{
int i = 0;
int writeSize = size;
#if (SDI_PRINT == SDI_PR_OPEN)
do
{
/**
* data0 data1 8 bytes
* data0 The lowest byte storage length, the maximum is 7
*
*/
while( (*(DEBUG_DATA0_ADDRESS) != 0u))
{
}
if(writeSize>7)
{
*(DEBUG_DATA1_ADDRESS) = (*(buf+i+3)) | (*(buf+i+4)<<8) | (*(buf+i+5)<<16) | (*(buf+i+6)<<24);
*(DEBUG_DATA0_ADDRESS) = (7u) | (*(buf+i)<<8) | (*(buf+i+1)<<16) | (*(buf+i+2)<<24);
i += 7;
writeSize -= 7;
}
else
{
*(DEBUG_DATA1_ADDRESS) = (*(buf+i+3)) | (*(buf+i+4)<<8) | (*(buf+i+5)<<16) | (*(buf+i+6)<<24);
*(DEBUG_DATA0_ADDRESS) = (writeSize) | (*(buf+i)<<8) | (*(buf+i+1)<<16) | (*(buf+i+2)<<24);
writeSize = 0;
}
} while (writeSize);
#else
for(i = 0; i < size; i++){
while(USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET);
USART_SendData(USART1, *buf++);
}
#endif
return writeSize;
}
/*********************************************************************
* @fn _sbrk
*
* @brief Change the spatial position of data segment.
*
* @return size: Data length
*/
__attribute__((used))
void *_sbrk(ptrdiff_t incr)
{
extern char _end[];
extern char _heap_end[];
static char *curbrk = _end;
if ((curbrk + incr < _end) || (curbrk + incr > _heap_end))
return NULL - 1;
curbrk += incr;
return curbrk - incr;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : debug.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for UART
* Printf , Delay functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __DEBUG_H
#define __DEBUG_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
#include <stdio.h>
/* UART Printf Definition */
#define DEBUG_UART1_NoRemap 1 //Tx-PD5
#define DEBUG_UART1_Remap1 2 //Tx-PD0
#define DEBUG_UART1_Remap2 3 //Tx-PD6
#define DEBUG_UART1_Remap3 4 //Tx-PC0
/* DEBUG UATR Definition */
#ifndef DEBUG
#define DEBUG DEBUG_UART1_NoRemap
#endif
/* SDI Printf Definition */
#define SDI_PR_CLOSE 0
#define SDI_PR_OPEN 1
#ifndef SDI_PRINT
#define SDI_PRINT SDI_PR_CLOSE
#endif
void Delay_Init(void);
void Delay_Us(uint32_t n);
void Delay_Ms(uint32_t n);
void USART_Printf_Init(uint32_t baudrate);
void SDI_Printf_Enable(void);
#ifdef __cplusplus
}
#endif
#endif /* __DEBUG_H */

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ENTRY( _start )
__stack_size = 256;
PROVIDE( _stack_size = __stack_size );
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 16K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 2K
}
SECTIONS
{
.init :
{
_sinit = .;
. = ALIGN(4);
KEEP(*(SORT_NONE(.init)))
. = ALIGN(4);
_einit = .;
} >FLASH AT>FLASH
.text :
{
. = ALIGN(4);
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
.fini :
{
KEEP(*(SORT_NONE(.fini)))
. = ALIGN(4);
} >FLASH AT>FLASH
PROVIDE( _etext = . );
PROVIDE( _eitcm = . );
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH AT>FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH AT>FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH AT>FLASH
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >FLASH AT>FLASH
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >FLASH AT>FLASH
.dalign :
{
. = ALIGN(4);
PROVIDE(_data_vma = .);
} >RAM AT>FLASH
.dlalign :
{
. = ALIGN(4);
PROVIDE(_data_lma = .);
} >FLASH AT>FLASH
.data :
{
. = ALIGN(4);
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.sdata2*)
*(.gnu.linkonce.s.*)
. = ALIGN(8);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
PROVIDE( _edata = .);
} >RAM AT>FLASH
.bss :
{
. = ALIGN(4);
PROVIDE( _sbss = .);
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss*)
*(.gnu.linkonce.b.*)
*(COMMON*)
. = ALIGN(4);
PROVIDE( _ebss = .);
} >RAM AT>FLASH
PROVIDE( _end = _ebss);
PROVIDE( end = . );
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
} >RAM
}

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nametag8_V003/Peripheral/inc/ch32v00x.h Normal file
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nametag8_V003/Peripheral/inc/ch32v00x_adc.h Normal file
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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_adc.h
* Author : WCH
* Version : V1.0.0
* Date : 2024/05/20
* Description : This file contains all the functions prototypes for the
* ADC firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_ADC_H
#define __CH32V00x_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* ADC Init structure definition */
typedef struct
{
uint32_t ADC_Mode; /* Configures the ADC to operate in independent or
dual mode.
This parameter can be a value of @ref ADC_mode */
FunctionalState ADC_ScanConvMode; /* Specifies whether the conversion is performed in
Scan (multichannels) or Single (one channel) mode.
This parameter can be set to ENABLE or DISABLE */
FunctionalState ADC_ContinuousConvMode; /* Specifies whether the conversion is performed in
Continuous or Single mode.
This parameter can be set to ENABLE or DISABLE. */
uint32_t ADC_ExternalTrigConv; /* Defines the external trigger used to start the analog
to digital conversion of regular channels. This parameter
can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
uint32_t ADC_DataAlign; /* Specifies whether the ADC data alignment is left or right.
This parameter can be a value of @ref ADC_data_align */
uint8_t ADC_NbrOfChannel; /* Specifies the number of ADC channels that will be converted
using the sequencer for regular channel group.
This parameter must range from 1 to 16. */
} ADC_InitTypeDef;
/* ADC_mode */
#define ADC_Mode_Independent ((uint32_t)0x00000000)
/* ADC_external_trigger_sources_for_regular_channels_conversion */
#define ADC_ExternalTrigConv_T1_TRGO ((uint32_t)0x00000000)
#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00020000)
#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00040000)
#define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x00060000)
#define ADC_ExternalTrigConv_T2_CC1 ((uint32_t)0x00080000)
#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x000A0000)
#define ADC_ExternalTrigConv_Ext_PD3_PC2 ((uint32_t)0x000C0000)
#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000)
/* ADC_data_align */
#define ADC_DataAlign_Right ((uint32_t)0x00000000)
#define ADC_DataAlign_Left ((uint32_t)0x00000800)
/* ADC_channels */
#define ADC_Channel_0 ((uint8_t)0x00)
#define ADC_Channel_1 ((uint8_t)0x01)
#define ADC_Channel_2 ((uint8_t)0x02)
#define ADC_Channel_3 ((uint8_t)0x03)
#define ADC_Channel_4 ((uint8_t)0x04)
#define ADC_Channel_5 ((uint8_t)0x05)
#define ADC_Channel_6 ((uint8_t)0x06)
#define ADC_Channel_7 ((uint8_t)0x07)
#define ADC_Channel_8 ((uint8_t)0x08)
#define ADC_Channel_9 ((uint8_t)0x09)
#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_8)
#define ADC_Channel_Vcalint ((uint8_t)ADC_Channel_9)
/* ADC_sampling_time */
#define ADC_SampleTime_3Cycles ((uint8_t)0x00)
#define ADC_SampleTime_9Cycles ((uint8_t)0x01)
#define ADC_SampleTime_15Cycles ((uint8_t)0x02)
#define ADC_SampleTime_30Cycles ((uint8_t)0x03)
#define ADC_SampleTime_43Cycles ((uint8_t)0x04)
#define ADC_SampleTime_57Cycles ((uint8_t)0x05)
#define ADC_SampleTime_73Cycles ((uint8_t)0x06)
#define ADC_SampleTime_241Cycles ((uint8_t)0x07)
/* ADC_external_trigger_sources_for_injected_channels_conversion */
#define ADC_ExternalTrigInjecConv_T1_CC3 ((uint32_t)0x00000000)
#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000)
#define ADC_ExternalTrigInjecConv_T2_CC3 ((uint32_t)0x00002000)
#define ADC_ExternalTrigInjecConv_T2_CC4 ((uint32_t)0x00003000)
#define ADC_ExternalTrigInjecConv_Ext_PD1_PA2 ((uint32_t)0x00006000)
#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000)
/* ADC_injected_channel_selection */
#define ADC_InjectedChannel_1 ((uint8_t)0x14)
#define ADC_InjectedChannel_2 ((uint8_t)0x18)
#define ADC_InjectedChannel_3 ((uint8_t)0x1C)
#define ADC_InjectedChannel_4 ((uint8_t)0x20)
/* ADC_analog_watchdog_selection */
#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
/* ADC_interrupts_definition */
#define ADC_IT_EOC ((uint16_t)0x0220)
#define ADC_IT_AWD ((uint16_t)0x0140)
#define ADC_IT_JEOC ((uint16_t)0x0480)
/* ADC_flags_definition */
#define ADC_FLAG_AWD ((uint8_t)0x01)
#define ADC_FLAG_EOC ((uint8_t)0x02)
#define ADC_FLAG_JEOC ((uint8_t)0x04)
#define ADC_FLAG_JSTRT ((uint8_t)0x08)
#define ADC_FLAG_STRT ((uint8_t)0x10)
/* ADC_calibration_voltage_definition */
#define ADC_CALVOL_50PERCENT ((uint32_t)0x02000000)
#define ADC_CALVOL_75PERCENT ((uint32_t)0x04000000)
/* ADC_external_trigger_sources_delay_channels_definition */
#define ADC_ExternalTrigRegul_DLY ((uint32_t)0x00000000)
#define ADC_ExternalTrigInjec_DLY ((uint32_t)0x00000200)
void ADC_DeInit(ADC_TypeDef *ADCx);
void ADC_Init(ADC_TypeDef *ADCx, ADC_InitTypeDef *ADC_InitStruct);
void ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct);
void ADC_Cmd(ADC_TypeDef *ADCx, FunctionalState NewState);
void ADC_DMACmd(ADC_TypeDef *ADCx, FunctionalState NewState);
void ADC_ITConfig(ADC_TypeDef *ADCx, uint16_t ADC_IT, FunctionalState NewState);
void ADC_ResetCalibration(ADC_TypeDef *ADCx);
FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef *ADCx);
void ADC_StartCalibration(ADC_TypeDef *ADCx);
FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef *ADCx);
void ADC_SoftwareStartConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef *ADCx);
void ADC_DiscModeChannelCountConfig(ADC_TypeDef *ADCx, uint8_t Number);
void ADC_DiscModeCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
void ADC_RegularChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
void ADC_ExternalTrigConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
uint16_t ADC_GetConversionValue(ADC_TypeDef *ADCx);
void ADC_AutoInjectedConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
void ADC_InjectedDiscModeCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef *ADCx, uint32_t ADC_ExternalTrigInjecConv);
void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState);
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef *ADCx);
void ADC_InjectedChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef *ADCx, uint8_t Length);
void ADC_SetInjectedOffset(ADC_TypeDef *ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef *ADCx, uint8_t ADC_InjectedChannel);
void ADC_AnalogWatchdogCmd(ADC_TypeDef *ADCx, uint32_t ADC_AnalogWatchdog);
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef *ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel);
FlagStatus ADC_GetFlagStatus(ADC_TypeDef *ADCx, uint8_t ADC_FLAG);
void ADC_ClearFlag(ADC_TypeDef *ADCx, uint8_t ADC_FLAG);
ITStatus ADC_GetITStatus(ADC_TypeDef *ADCx, uint16_t ADC_IT);
void ADC_ClearITPendingBit(ADC_TypeDef *ADCx, uint16_t ADC_IT);
void ADC_Calibration_Vol(ADC_TypeDef *ADCx, uint32_t ADC_CALVOL);
void ADC_ExternalTrig_DLY(ADC_TypeDef *ADCx, uint32_t channel, uint16_t DelayTim);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V00x_ADC_H */

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nametag8_V003/Peripheral/inc/ch32v00x_dbgmcu.h Normal file
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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_dbgmcu.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* DBGMCU firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_DBGMCU_H
#define __CH32V00x_DBGMCU_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* CFGR0 Register */
#define DBGMCU_IWDG_STOP ((uint32_t)0x00000001)
#define DBGMCU_WWDG_STOP ((uint32_t)0x00000002)
#define DBGMCU_TIM1_STOP ((uint32_t)0x00000010)
#define DBGMCU_TIM2_STOP ((uint32_t)0x00000020)
uint32_t DBGMCU_GetREVID(void);
uint32_t DBGMCU_GetDEVID(void);
uint32_t __get_DEBUG_CR(void);
void __set_DEBUG_CR(uint32_t value);
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
uint32_t DBGMCU_GetCHIPID( void );
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_DBGMCU_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_dma.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* DMA firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_DMA_H
#define __CH32V00x_DMA_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* DMA Init structure definition */
typedef struct
{
uint32_t DMA_PeripheralBaseAddr; /* Specifies the peripheral base address for DMAy Channelx. */
uint32_t DMA_MemoryBaseAddr; /* Specifies the memory base address for DMAy Channelx. */
uint32_t DMA_DIR; /* Specifies if the peripheral is the source or destination.
This parameter can be a value of @ref DMA_data_transfer_direction */
uint32_t DMA_BufferSize; /* Specifies the buffer size, in data unit, of the specified Channel.
The data unit is equal to the configuration set in DMA_PeripheralDataSize
or DMA_MemoryDataSize members depending in the transfer direction. */
uint32_t DMA_PeripheralInc; /* Specifies whether the Peripheral address register is incremented or not.
This parameter can be a value of @ref DMA_peripheral_incremented_mode */
uint32_t DMA_MemoryInc; /* Specifies whether the memory address register is incremented or not.
This parameter can be a value of @ref DMA_memory_incremented_mode */
uint32_t DMA_PeripheralDataSize; /* Specifies the Peripheral data width.
This parameter can be a value of @ref DMA_peripheral_data_size */
uint32_t DMA_MemoryDataSize; /* Specifies the Memory data width.
This parameter can be a value of @ref DMA_memory_data_size */
uint32_t DMA_Mode; /* Specifies the operation mode of the DMAy Channelx.
This parameter can be a value of @ref DMA_circular_normal_mode.
@note: The circular buffer mode cannot be used if the memory-to-memory
data transfer is configured on the selected Channel */
uint32_t DMA_Priority; /* Specifies the software priority for the DMAy Channelx.
This parameter can be a value of @ref DMA_priority_level */
uint32_t DMA_M2M; /* Specifies if the DMAy Channelx will be used in memory-to-memory transfer.
This parameter can be a value of @ref DMA_memory_to_memory */
} DMA_InitTypeDef;
/* DMA_data_transfer_direction */
#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010)
#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)
/* DMA_peripheral_incremented_mode */
#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040)
#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000)
/* DMA_memory_incremented_mode */
#define DMA_MemoryInc_Enable ((uint32_t)0x00000080)
#define DMA_MemoryInc_Disable ((uint32_t)0x00000000)
/* DMA_peripheral_data_size */
#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)
#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)
#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)
/* DMA_memory_data_size */
#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)
#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)
#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800)
/* DMA_circular_normal_mode */
#define DMA_Mode_Circular ((uint32_t)0x00000020)
#define DMA_Mode_Normal ((uint32_t)0x00000000)
/* DMA_priority_level */
#define DMA_Priority_VeryHigh ((uint32_t)0x00003000)
#define DMA_Priority_High ((uint32_t)0x00002000)
#define DMA_Priority_Medium ((uint32_t)0x00001000)
#define DMA_Priority_Low ((uint32_t)0x00000000)
/* DMA_memory_to_memory */
#define DMA_M2M_Enable ((uint32_t)0x00004000)
#define DMA_M2M_Disable ((uint32_t)0x00000000)
/* DMA_interrupts_definition */
#define DMA_IT_TC ((uint32_t)0x00000002)
#define DMA_IT_HT ((uint32_t)0x00000004)
#define DMA_IT_TE ((uint32_t)0x00000008)
#define DMA1_IT_GL1 ((uint32_t)0x00000001)
#define DMA1_IT_TC1 ((uint32_t)0x00000002)
#define DMA1_IT_HT1 ((uint32_t)0x00000004)
#define DMA1_IT_TE1 ((uint32_t)0x00000008)
#define DMA1_IT_GL2 ((uint32_t)0x00000010)
#define DMA1_IT_TC2 ((uint32_t)0x00000020)
#define DMA1_IT_HT2 ((uint32_t)0x00000040)
#define DMA1_IT_TE2 ((uint32_t)0x00000080)
#define DMA1_IT_GL3 ((uint32_t)0x00000100)
#define DMA1_IT_TC3 ((uint32_t)0x00000200)
#define DMA1_IT_HT3 ((uint32_t)0x00000400)
#define DMA1_IT_TE3 ((uint32_t)0x00000800)
#define DMA1_IT_GL4 ((uint32_t)0x00001000)
#define DMA1_IT_TC4 ((uint32_t)0x00002000)
#define DMA1_IT_HT4 ((uint32_t)0x00004000)
#define DMA1_IT_TE4 ((uint32_t)0x00008000)
#define DMA1_IT_GL5 ((uint32_t)0x00010000)
#define DMA1_IT_TC5 ((uint32_t)0x00020000)
#define DMA1_IT_HT5 ((uint32_t)0x00040000)
#define DMA1_IT_TE5 ((uint32_t)0x00080000)
#define DMA1_IT_GL6 ((uint32_t)0x00100000)
#define DMA1_IT_TC6 ((uint32_t)0x00200000)
#define DMA1_IT_HT6 ((uint32_t)0x00400000)
#define DMA1_IT_TE6 ((uint32_t)0x00800000)
#define DMA1_IT_GL7 ((uint32_t)0x01000000)
#define DMA1_IT_TC7 ((uint32_t)0x02000000)
#define DMA1_IT_HT7 ((uint32_t)0x04000000)
#define DMA1_IT_TE7 ((uint32_t)0x08000000)
/* DMA_flags_definition */
#define DMA1_FLAG_GL1 ((uint32_t)0x00000001)
#define DMA1_FLAG_TC1 ((uint32_t)0x00000002)
#define DMA1_FLAG_HT1 ((uint32_t)0x00000004)
#define DMA1_FLAG_TE1 ((uint32_t)0x00000008)
#define DMA1_FLAG_GL2 ((uint32_t)0x00000010)
#define DMA1_FLAG_TC2 ((uint32_t)0x00000020)
#define DMA1_FLAG_HT2 ((uint32_t)0x00000040)
#define DMA1_FLAG_TE2 ((uint32_t)0x00000080)
#define DMA1_FLAG_GL3 ((uint32_t)0x00000100)
#define DMA1_FLAG_TC3 ((uint32_t)0x00000200)
#define DMA1_FLAG_HT3 ((uint32_t)0x00000400)
#define DMA1_FLAG_TE3 ((uint32_t)0x00000800)
#define DMA1_FLAG_GL4 ((uint32_t)0x00001000)
#define DMA1_FLAG_TC4 ((uint32_t)0x00002000)
#define DMA1_FLAG_HT4 ((uint32_t)0x00004000)
#define DMA1_FLAG_TE4 ((uint32_t)0x00008000)
#define DMA1_FLAG_GL5 ((uint32_t)0x00010000)
#define DMA1_FLAG_TC5 ((uint32_t)0x00020000)
#define DMA1_FLAG_HT5 ((uint32_t)0x00040000)
#define DMA1_FLAG_TE5 ((uint32_t)0x00080000)
#define DMA1_FLAG_GL6 ((uint32_t)0x00100000)
#define DMA1_FLAG_TC6 ((uint32_t)0x00200000)
#define DMA1_FLAG_HT6 ((uint32_t)0x00400000)
#define DMA1_FLAG_TE6 ((uint32_t)0x00800000)
#define DMA1_FLAG_GL7 ((uint32_t)0x01000000)
#define DMA1_FLAG_TC7 ((uint32_t)0x02000000)
#define DMA1_FLAG_HT7 ((uint32_t)0x04000000)
#define DMA1_FLAG_TE7 ((uint32_t)0x08000000)
void DMA_DeInit(DMA_Channel_TypeDef *DMAy_Channelx);
void DMA_Init(DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct);
void DMA_StructInit(DMA_InitTypeDef *DMA_InitStruct);
void DMA_Cmd(DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState);
void DMA_ITConfig(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
void DMA_SetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber);
uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx);
FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG);
void DMA_ClearFlag(uint32_t DMAy_FLAG);
ITStatus DMA_GetITStatus(uint32_t DMAy_IT);
void DMA_ClearITPendingBit(uint32_t DMAy_IT);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V00x_DMA_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_exti.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* EXTI firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_EXTI_H
#define __CH32V00x_EXTI_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* EXTI mode enumeration */
typedef enum
{
EXTI_Mode_Interrupt = 0x00,
EXTI_Mode_Event = 0x04
} EXTIMode_TypeDef;
/* EXTI Trigger enumeration */
typedef enum
{
EXTI_Trigger_Rising = 0x08,
EXTI_Trigger_Falling = 0x0C,
EXTI_Trigger_Rising_Falling = 0x10
} EXTITrigger_TypeDef;
/* EXTI Init Structure definition */
typedef struct
{
uint32_t EXTI_Line; /* Specifies the EXTI lines to be enabled or disabled.
This parameter can be any combination of @ref EXTI_Lines */
EXTIMode_TypeDef EXTI_Mode; /* Specifies the mode for the EXTI lines.
This parameter can be a value of @ref EXTIMode_TypeDef */
EXTITrigger_TypeDef EXTI_Trigger; /* Specifies the trigger signal active edge for the EXTI lines.
This parameter can be a value of @ref EXTIMode_TypeDef */
FunctionalState EXTI_LineCmd; /* Specifies the new state of the selected EXTI lines.
This parameter can be set either to ENABLE or DISABLE */
} EXTI_InitTypeDef;
/* EXTI_Lines */
#define EXTI_Line0 ((uint32_t)0x00001) /* External interrupt line 0 */
#define EXTI_Line1 ((uint32_t)0x00002) /* External interrupt line 1 */
#define EXTI_Line2 ((uint32_t)0x00004) /* External interrupt line 2 */
#define EXTI_Line3 ((uint32_t)0x00008) /* External interrupt line 3 */
#define EXTI_Line4 ((uint32_t)0x00010) /* External interrupt line 4 */
#define EXTI_Line5 ((uint32_t)0x00020) /* External interrupt line 5 */
#define EXTI_Line6 ((uint32_t)0x00040) /* External interrupt line 6 */
#define EXTI_Line7 ((uint32_t)0x00080) /* External interrupt line 7 */
#define EXTI_Line8 ((uint32_t)0x00100) /* External interrupt line 8 Connected to the PVD Output */
#define EXTI_Line9 ((uint32_t)0x00200) /* External interrupt line 9 Connected to the PWR Auto Wake-up event*/
void EXTI_DeInit(void);
void EXTI_Init(EXTI_InitTypeDef *EXTI_InitStruct);
void EXTI_StructInit(EXTI_InitTypeDef *EXTI_InitStruct);
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
void EXTI_ClearFlag(uint32_t EXTI_Line);
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_EXTI_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_flash.h
* Author : WCH
* Version : V1.0.0
* Date : 2023/12/25
* Description : This file contains all the functions prototypes for the FLASH
* firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_FLASH_H
#define __CH32V00x_FLASH_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* FLASH Status */
typedef enum
{
FLASH_BUSY = 1,
FLASH_ERROR_PG,
FLASH_ERROR_WRP,
FLASH_COMPLETE,
FLASH_TIMEOUT,
FLASH_OP_RANGE_ERROR = 0xFD,
FLASH_ALIGN_ERROR = 0xFE,
FLASH_ADR_RANGE_ERROR = 0xFF,
} FLASH_Status;
/* Flash_Latency */
#define FLASH_Latency_0 ((uint32_t)0x00000000) /* FLASH Zero Latency cycle */
#define FLASH_Latency_1 ((uint32_t)0x00000001) /* FLASH One Latency cycle */
#define FLASH_Latency_2 ((uint32_t)0x00000002) /* FLASH Two Latency cycles */
/* Values to be used with CH32V00x devices (1page = 64Byte) */
#define FLASH_WRProt_Pages0to15 ((uint32_t)0x00000001) /* CH32 Low and Medium density devices: Write protection of page 0 to 15 */
#define FLASH_WRProt_Pages16to31 ((uint32_t)0x00000002) /* CH32 Low and Medium density devices: Write protection of page 16 to 31 */
#define FLASH_WRProt_Pages32to47 ((uint32_t)0x00000004) /* CH32 Low and Medium density devices: Write protection of page 32 to 47 */
#define FLASH_WRProt_Pages48to63 ((uint32_t)0x00000008) /* CH32 Low and Medium density devices: Write protection of page 48 to 63 */
#define FLASH_WRProt_Pages64to79 ((uint32_t)0x00000010) /* CH32 Low and Medium density devices: Write protection of page 64 to 79 */
#define FLASH_WRProt_Pages80to95 ((uint32_t)0x00000020) /* CH32 Low and Medium density devices: Write protection of page 80 to 95 */
#define FLASH_WRProt_Pages96to111 ((uint32_t)0x00000040) /* CH32 Low and Medium density devices: Write protection of page 96 to 111 */
#define FLASH_WRProt_Pages112to127 ((uint32_t)0x00000080) /* CH32 Low and Medium density devices: Write protection of page 112 to 127 */
#define FLASH_WRProt_Pages128to143 ((uint32_t)0x00000100) /* CH32 Medium-density devices: Write protection of page 128 to 143 */
#define FLASH_WRProt_Pages144to159 ((uint32_t)0x00000200) /* CH32 Medium-density devices: Write protection of page 144 to 159 */
#define FLASH_WRProt_Pages160to175 ((uint32_t)0x00000400) /* CH32 Medium-density devices: Write protection of page 160 to 175 */
#define FLASH_WRProt_Pages176to191 ((uint32_t)0x00000800) /* CH32 Medium-density devices: Write protection of page 176 to 191 */
#define FLASH_WRProt_Pages192to207 ((uint32_t)0x00001000) /* CH32 Medium-density devices: Write protection of page 192 to 207 */
#define FLASH_WRProt_Pages208to223 ((uint32_t)0x00002000) /* CH32 Medium-density devices: Write protection of page 208 to 223 */
#define FLASH_WRProt_Pages224to239 ((uint32_t)0x00004000) /* CH32 Medium-density devices: Write protection of page 224 to 239 */
#define FLASH_WRProt_Pages240to255 ((uint32_t)0x00008000) /* CH32 Medium-density devices: Write protection of page 240 to 255 */
#define FLASH_WRProt_AllPages ((uint32_t)0x0000FFFF) /* Write protection of all Pages */
/* Option_Bytes_IWatchdog */
#define OB_IWDG_SW ((uint16_t)0x0001) /* Software IWDG selected */
#define OB_IWDG_HW ((uint16_t)0x0000) /* Hardware IWDG selected */
/* Option_Bytes_nRST_STOP */
#define OB_STOP_NoRST ((uint16_t)0x0002) /* No reset generated when entering in STOP */
#define OB_STOP_RST ((uint16_t)0x0000) /* Reset generated when entering in STOP */
/* Option_Bytes_nRST_STDBY */
#define OB_STDBY_NoRST ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
#define OB_STDBY_RST ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */
/* Option_Bytes_RST_ENandDT */
#define OB_RST_NoEN ((uint16_t)0x0018) /* Reset IO disable (PD7)*/
#define OB_RST_EN_DT12ms ((uint16_t)0x0010) /* Reset IO enable (PD7) and Ignore delay time 12ms */
#define OB_RST_EN_DT1ms ((uint16_t)0x0008) /* Reset IO enable (PD7) and Ignore delay time 1ms */
#define OB_RST_EN_DT128us ((uint16_t)0x0000) /* Reset IO enable (PD7) and Ignore delay time 128us */
/* Option_Bytes_Power_ON_Start_Mode */
#define OB_PowerON_Start_Mode_BOOT ((uint16_t)0x0020) /* from Boot after power on */
#define OB_PowerON_Start_Mode_USER ((uint16_t)0x0000) /* from User after power on */
/* FLASH_Interrupts */
#define FLASH_IT_ERROR ((uint32_t)0x00000400) /* FPEC error interrupt source */
#define FLASH_IT_EOP ((uint32_t)0x00001000) /* End of FLASH Operation Interrupt source */
#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /* FPEC BANK1 error interrupt source */
#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /* End of FLASH BANK1 Operation Interrupt source */
/* FLASH_Flags */
#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /* FLASH Busy flag */
#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /* FLASH End of Operation flag */
#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /* FLASH Write protected error flag */
#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /* FLASH Option Byte error flag */
#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /* FLASH BANK1 Busy flag*/
#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /* FLASH BANK1 End of Operation flag */
#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /* FLASH BANK1 Write protected error flag */
/* System_Reset_Start_Mode */
#define Start_Mode_USER ((uint32_t)0x00000000)
#define Start_Mode_BOOT ((uint32_t)0x00004000)
/*Functions used for all CH32V00x devices*/
void FLASH_SetLatency(uint32_t FLASH_Latency);
void FLASH_Unlock(void);
void FLASH_Lock(void);
FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
FLASH_Status FLASH_EraseAllPages(void);
FLASH_Status FLASH_EraseOptionBytes(void);
FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages);
FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState);
FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STDBY, uint16_t OB_RST, uint16_t OB_PowerON_Start_Mode);
uint32_t FLASH_GetUserOptionByte(void);
uint32_t FLASH_GetWriteProtectionOptionByte(void);
FlagStatus FLASH_GetReadOutProtectionStatus(void);
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
void FLASH_ClearFlag(uint32_t FLASH_FLAG);
FLASH_Status FLASH_GetStatus(void);
FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
void FLASH_Unlock_Fast(void);
void FLASH_Lock_Fast(void);
void FLASH_BufReset(void);
void FLASH_BufLoad(uint32_t Address, uint32_t Data0);
void FLASH_ErasePage_Fast(uint32_t Page_Address);
void FLASH_ProgramPage_Fast(uint32_t Page_Address);
void SystemReset_StartMode(uint32_t Mode);
FLASH_Status FLASH_ROM_ERASE(uint32_t StartAddr, uint32_t Length);
FLASH_Status FLASH_ROM_WRITE(uint32_t StartAddr, uint32_t *pbuf, uint32_t Length);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_FLASH_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_gpio.h
* Author : WCH
* Version : V1.0.0
* Date : 2024/02/27
* Description : This file contains all the functions prototypes for the
* GPIO firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_GPIO_H
#define __CH32V00x_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* Output Maximum frequency selection */
typedef enum
{
GPIO_Speed_10MHz = 1,
GPIO_Speed_2MHz,
GPIO_Speed_30MHz
} GPIOSpeed_TypeDef;
#define GPIO_Speed_50MHz GPIO_Speed_30MHz
/* Configuration Mode enumeration */
typedef enum
{
GPIO_Mode_AIN = 0x0,
GPIO_Mode_IN_FLOATING = 0x04,
GPIO_Mode_IPD = 0x28,
GPIO_Mode_IPU = 0x48,
GPIO_Mode_Out_OD = 0x14,
GPIO_Mode_Out_PP = 0x10,
GPIO_Mode_AF_OD = 0x1C,
GPIO_Mode_AF_PP = 0x18
} GPIOMode_TypeDef;
/* GPIO Init structure definition */
typedef struct
{
uint16_t GPIO_Pin; /* Specifies the GPIO pins to be configured.
This parameter can be any value of @ref GPIO_pins_define */
GPIOSpeed_TypeDef GPIO_Speed; /* Specifies the speed for the selected pins.
This parameter can be a value of @ref GPIOSpeed_TypeDef */
GPIOMode_TypeDef GPIO_Mode; /* Specifies the operating mode for the selected pins.
This parameter can be a value of @ref GPIOMode_TypeDef */
} GPIO_InitTypeDef;
/* Bit_SET and Bit_RESET enumeration */
typedef enum
{
Bit_RESET = 0,
Bit_SET
} BitAction;
/* GPIO_pins_define */
#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
/* GPIO_Remap_define */
#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /* SPI1 Alternate Function mapping */
#define GPIO_PartialRemap_I2C1 ((uint32_t)0x10000002) /* I2C1 Partial Alternate Function mapping */
#define GPIO_FullRemap_I2C1 ((uint32_t)0x10400002) /* I2C1 Full Alternate Function mapping */
#define GPIO_PartialRemap1_USART1 ((uint32_t)0x80000004) /* USART1 Partial1 Alternate Function mapping */
#define GPIO_PartialRemap2_USART1 ((uint32_t)0x80200000) /* USART1 Partial2 Alternate Function mapping */
#define GPIO_FullRemap_USART1 ((uint32_t)0x80200004) /* USART1 Full Alternate Function mapping */
#define GPIO_PartialRemap1_TIM1 ((uint32_t)0x00160040) /* TIM1 Partial1 Alternate Function mapping */
#define GPIO_PartialRemap2_TIM1 ((uint32_t)0x00160080) /* TIM1 Partial2 Alternate Function mapping */
#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /* TIM1 Full Alternate Function mapping */
#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /* TIM2 Partial1 Alternate Function mapping */
#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /* TIM2 Partial2 Alternate Function mapping */
#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /* TIM2 Full Alternate Function mapping */
#define GPIO_Remap_PA1_2 ((uint32_t)0x00008000) /* PA1 and PA2 Alternate Function mapping */
#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /* ADC1 External Trigger Injected Conversion remapping */
#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /* ADC1 External Trigger Regular Conversion remapping */
#define GPIO_Remap_LSI_CAL ((uint32_t)0x00200080) /* LSI calibration Alternate Function mapping */
#define GPIO_Remap_SDI_Disable ((uint32_t)0x00300400) /* SDI Disabled */
/* GPIO_Port_Sources */
#define GPIO_PortSourceGPIOA ((uint8_t)0x00)
#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
/* GPIO_Pin_sources */
#define GPIO_PinSource0 ((uint8_t)0x00)
#define GPIO_PinSource1 ((uint8_t)0x01)
#define GPIO_PinSource2 ((uint8_t)0x02)
#define GPIO_PinSource3 ((uint8_t)0x03)
#define GPIO_PinSource4 ((uint8_t)0x04)
#define GPIO_PinSource5 ((uint8_t)0x05)
#define GPIO_PinSource6 ((uint8_t)0x06)
#define GPIO_PinSource7 ((uint8_t)0x07)
void GPIO_DeInit(GPIO_TypeDef *GPIOx);
void GPIO_AFIODeInit(void);
void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_InitStruct);
void GPIO_StructInit(GPIO_InitTypeDef *GPIO_InitStruct);
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
uint16_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx);
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
uint16_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx);
void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void GPIO_ResetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void GPIO_WriteBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
void GPIO_Write(GPIO_TypeDef *GPIOx, uint16_t PortVal);
void GPIO_PinLockConfig(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
void GPIO_EventOutputCmd(FunctionalState NewState);
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_GPIO_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_i2c.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* I2C firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_I2C_H
#define __CH32V00x_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* I2C Init structure definition */
typedef struct
{
uint32_t I2C_ClockSpeed; /* Specifies the clock frequency.
This parameter must be set to a value lower than 400kHz */
uint16_t I2C_Mode; /* Specifies the I2C mode.
This parameter can be a value of @ref I2C_mode */
uint16_t I2C_DutyCycle; /* Specifies the I2C fast mode duty cycle.
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
uint16_t I2C_OwnAddress1; /* Specifies the first device own address.
This parameter can be a 7-bit or 10-bit address. */
uint16_t I2C_Ack; /* Enables or disables the acknowledgement.
This parameter can be a value of @ref I2C_acknowledgement */
uint16_t I2C_AcknowledgedAddress; /* Specifies if 7-bit or 10-bit address is acknowledged.
This parameter can be a value of @ref I2C_acknowledged_address */
} I2C_InitTypeDef;
/* I2C_mode */
#define I2C_Mode_I2C ((uint16_t)0x0000)
/* I2C_duty_cycle_in_fast_mode */
#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /* I2C fast mode Tlow/Thigh = 16/9 */
#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /* I2C fast mode Tlow/Thigh = 2 */
/* I2C_acknowledgement */
#define I2C_Ack_Enable ((uint16_t)0x0400)
#define I2C_Ack_Disable ((uint16_t)0x0000)
/* I2C_transfer_direction */
#define I2C_Direction_Transmitter ((uint8_t)0x00)
#define I2C_Direction_Receiver ((uint8_t)0x01)
/* I2C_acknowledged_address */
#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
/* I2C_registers */
#define I2C_Register_CTLR1 ((uint8_t)0x00)
#define I2C_Register_CTLR2 ((uint8_t)0x04)
#define I2C_Register_OADDR1 ((uint8_t)0x08)
#define I2C_Register_OADDR2 ((uint8_t)0x0C)
#define I2C_Register_DATAR ((uint8_t)0x10)
#define I2C_Register_STAR1 ((uint8_t)0x14)
#define I2C_Register_STAR2 ((uint8_t)0x18)
#define I2C_Register_CKCFGR ((uint8_t)0x1C)
/* I2C_PEC_position */
#define I2C_PECPosition_Next ((uint16_t)0x0800)
#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
/* I2C_NACK_position */
#define I2C_NACKPosition_Next ((uint16_t)0x0800)
#define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
/* I2C_interrupts_definition */
#define I2C_IT_BUF ((uint16_t)0x0400)
#define I2C_IT_EVT ((uint16_t)0x0200)
#define I2C_IT_ERR ((uint16_t)0x0100)
/* I2C_interrupts_definition */
#define I2C_IT_PECERR ((uint32_t)0x01001000)
#define I2C_IT_OVR ((uint32_t)0x01000800)
#define I2C_IT_AF ((uint32_t)0x01000400)
#define I2C_IT_ARLO ((uint32_t)0x01000200)
#define I2C_IT_BERR ((uint32_t)0x01000100)
#define I2C_IT_TXE ((uint32_t)0x06000080)
#define I2C_IT_RXNE ((uint32_t)0x06000040)
#define I2C_IT_STOPF ((uint32_t)0x02000010)
#define I2C_IT_ADD10 ((uint32_t)0x02000008)
#define I2C_IT_BTF ((uint32_t)0x02000004)
#define I2C_IT_ADDR ((uint32_t)0x02000002)
#define I2C_IT_SB ((uint32_t)0x02000001)
/* SR2 register flags */
#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
#define I2C_FLAG_TRA ((uint32_t)0x00040000)
#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
#define I2C_FLAG_MSL ((uint32_t)0x00010000)
/* SR1 register flags */
#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
#define I2C_FLAG_OVR ((uint32_t)0x10000800)
#define I2C_FLAG_AF ((uint32_t)0x10000400)
#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
#define I2C_FLAG_BERR ((uint32_t)0x10000100)
#define I2C_FLAG_TXE ((uint32_t)0x10000080)
#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
#define I2C_FLAG_BTF ((uint32_t)0x10000004)
#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
#define I2C_FLAG_SB ((uint32_t)0x10000001)
/****************I2C Master Events (Events grouped in order of communication)********************/
/********************************************************************************************************************
* @brief Start communicate
*
* After master use I2C_GenerateSTART() function sending the START condition,the master
* has to wait for event 5(the Start condition has been correctly
* released on the I2C bus ).
*
*/
/* EVT5 */
#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
/********************************************************************************************************************
* @brief Address Acknowledge
*
* When start condition correctly released on the bus(check EVT5), the
* master use I2C_Send7bitAddress() function sends the address of the slave(s) with which it will communicate
* it also determines master as transmitter or Receiver. Then the master has to wait that a slave acknowledges
* his address. If an acknowledge is sent on the bus, one of the following events will be set:
*
*
*
* 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
* event is set.
*
* 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
* is set
*
* 3) In case of 10-Bit addressing mode, the master (after generating the START
* and checking on EVT5) use I2C_SendData() function send the header of 10-bit addressing mode.
* Then master wait EVT9. EVT9 means that the 10-bit addressing header has been correctly sent
* on the bus. Then master should use the function I2C_Send7bitAddress() to send the second part
* of the 10-bit address (LSB) . Then master should wait for event 6.
*
*
*/
/* EVT6 */
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
/*EVT9 */
#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
/********************************************************************************************************************
* @brief Communication events
*
* If START condition has generated and slave address
* been acknowledged. then the master has to check one of the following events for
* communication procedures:
*
* 1) Master Receiver mode: The master has to wait on the event EVT7 then use
* I2C_ReceiveData() function to read the data received from the slave .
*
* 2) Master Transmitter mode: The master use I2C_SendData() function to send data
* then to wait on event EVT8 or EVT8_2.
* These two events are similar:
* - EVT8 means that the data has been written in the data register and is
* being shifted out.
* - EVT8_2 means that the data has been physically shifted out and output
* on the bus.
* In most cases, using EVT8 is sufficient for the application.
* Using EVT8_2 will leads to a slower communication speed but will more reliable .
* EVT8_2 is also more suitable than EVT8 for testing on the last data transmission
*
*
* Note:
* In case the user software does not guarantee that this event EVT7 is managed before
* the current byte end of transfer, then user may check on I2C_EVENT_MASTER_BYTE_RECEIVED
* and I2C_FLAG_BTF flag at the same time .But in this case the communication may be slower.
*
*
*/
/* Master Receive mode */
/* EVT7 */
#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
/* Master Transmitter mode*/
/* EVT8 */
#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
/* EVT8_2 */
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
/******************I2C Slave Events (Events grouped in order of communication)******************/
/********************************************************************************************************************
* @brief Start Communicate events
*
* Wait on one of these events at the start of the communication. It means that
* the I2C peripheral detected a start condition of master device generate on the bus.
* If the acknowledge feature is enabled through function I2C_AcknowledgeConfig()),The peripheral generates an ACK condition on the bus.
*
*
*
* a) In normal case (only one address managed by the slave), when the address
* sent by the master matches the own address of the peripheral (configured by
* I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
* (where XXX could be TRANSMITTER or RECEIVER).
*
* b) In case the address sent by the master matches the second address of the
* peripheral (configured by the function I2C_OwnAddress2Config() and enabled
* by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
* (where XXX could be TRANSMITTER or RECEIVER) are set.
*
* c) In case the address sent by the master is General Call (address 0x00) and
* if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
* the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
*
*/
/* EVT1 */
/* a) Case of One Single Address managed by the slave */
#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
/* b) Case of Dual address managed by the slave */
#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
/* c) Case of General Call enabled for the slave */
#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
/********************************************************************************************************************
* @brief Communication events
*
* Wait on one of these events when EVT1 has already been checked :
*
* - Slave Receiver mode:
* - EVT2--The device is expecting to receive a data byte .
* - EVT4--The device is expecting the end of the communication: master
* sends a stop condition and data transmission is stopped.
*
* - Slave Transmitter mode:
* - EVT3--When a byte has been transmitted by the slave and the Master is expecting
* the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
* I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. If the user software doesn't guarantee
* the EVT3 is managed before the current byte end of transfer The second one can optionally
* be used.
* - EVT3_2--When the master sends a NACK to tell slave device that data transmission
* shall end . The slave device has to stop sending
* data bytes and wait a Stop condition from bus.
*
* Note:
* If the user software does not guarantee that the event 2 is
* managed before the current byte end of transfer, User may check on I2C_EVENT_SLAVE_BYTE_RECEIVED
* and I2C_FLAG_BTF flag at the same time .
* In this case the communication will be slower.
*
*/
/* Slave Receiver mode*/
/* EVT2 */
#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
/* EVT4 */
#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
/* Slave Transmitter mode -----------------------*/
/* EVT3 */
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
/*EVT3_2 */
#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
void I2C_DeInit(I2C_TypeDef *I2Cx);
void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitTypeDef *I2C_InitStruct);
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct);
void I2C_Cmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_DMACmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_DMALastTransferCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_GenerateSTART(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_GenerateSTOP(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_OwnAddress2Config(I2C_TypeDef *I2Cx, uint8_t Address);
void I2C_DualAddressCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_ITConfig(I2C_TypeDef *I2Cx, uint16_t I2C_IT, FunctionalState NewState);
void I2C_SendData(I2C_TypeDef *I2Cx, uint8_t Data);
uint8_t I2C_ReceiveData(I2C_TypeDef *I2Cx);
void I2C_Send7bitAddress(I2C_TypeDef *I2Cx, uint8_t Address, uint8_t I2C_Direction);
uint16_t I2C_ReadRegister(I2C_TypeDef *I2Cx, uint8_t I2C_Register);
void I2C_SoftwareResetCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_NACKPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_NACKPosition);
void I2C_TransmitPEC(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_PECPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_PECPosition);
void I2C_CalculatePEC(I2C_TypeDef *I2Cx, FunctionalState NewState);
uint8_t I2C_GetPEC(I2C_TypeDef *I2Cx);
void I2C_ARPCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_StretchClockCmd(I2C_TypeDef *I2Cx, FunctionalState NewState);
void I2C_FastModeDutyCycleConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DutyCycle);
/*****************************************************************************************
*
* I2C State Monitoring Functions
*
****************************************************************************************
* This I2C driver provides three different ways for I2C state monitoring
* profit the application requirements and constraints:
*
*
* a) First way:
* Using I2C_CheckEvent() function:
* It compares the status registers (STARR1 and STAR2) content to a given event
* (can be the combination of more flags).
* If the current status registers includes the given flags will return SUCCESS.
* and if the current status registers miss flags will returns ERROR.
* - When to use:
* - This function is suitable for most applications as well as for startup
* activity since the events are fully described in the product reference manual
* (CH32V03RM).
* - It is also suitable for users who need to define their own events.
* - Limitations:
* - If an error occurs besides to the monitored error,
* the I2C_CheckEvent() function may return SUCCESS despite the communication
* in corrupted state. it is suggeted to use error interrupts to monitor the error
* events and handle them in IRQ handler.
*
*
* Note:
* The following functions are recommended for error management: :
* - I2C_ITConfig() main function of configure and enable the error interrupts.
* - I2Cx_ER_IRQHandler() will be called when the error interrupt happen.
* Where x is the peripheral instance (I2C1, I2C2 ...)
* - I2Cx_ER_IRQHandler() will call I2C_GetFlagStatus() or I2C_GetITStatus() functions
* to determine which error occurred.
* - I2C_ClearFlag() \ I2C_ClearITPendingBit() \ I2C_SoftwareResetCmd()
* \ I2C_GenerateStop() will be use to clear the error flag and source,
* and return to correct communication status.
*
*
* b) Second way:
* Using the function to get a single word(uint32_t) composed of status register 1 and register 2.
* (Status Register 2 value is shifted left by 16 bits and concatenated to Status Register 1).
* - When to use:
*
* - This function is suitable for the same applications above but it
* don't have the limitations of I2C_GetFlagStatus() function .
* The returned value could be compared to events already defined in the
* library (CH32V00x_i2c.h) or to custom values defined by user.
* - This function can be used to monitor the status of multiple flags simultaneously.
* - Contrary to the I2C_CheckEvent () function, this function can choose the time to
* accept the event according to the user's needs (when all event flags are set and
* no other flags are set, or only when the required flags are set)
*
* - Limitations:
* - User may need to define his own events.
* - Same remark concerning the error management is applicable for this
* function if user decides to check only regular communication flags (and
* ignores error flags).
*
*
* c) Third way:
* Using the function I2C_GetFlagStatus() get the status of
* one single flag .
* - When to use:
* - This function could be used for specific applications or in debug phase.
* - It is suitable when only one flag checking is needed .
*
* - Limitations:
* - Call this function to access the status register. Some flag bits may be cleared.
* - Function may need to be called twice or more in order to monitor one single event.
*/
/*********************************************************
*
* a) Basic state monitoring(First way)
********************************************************
*/
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
/*********************************************************
*
* b) Advanced state monitoring(Second way:)
********************************************************
*/
uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
/*********************************************************
*
* c) Flag-based state monitoring(Third way)
*********************************************************
*/
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
void I2C_ClearFlag(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG);
ITStatus I2C_GetITStatus(I2C_TypeDef *I2Cx, uint32_t I2C_IT);
void I2C_ClearITPendingBit(I2C_TypeDef *I2Cx, uint32_t I2C_IT);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V00x_I2C_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_iwdg.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* IWDG firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_IWDG_H
#define __CH32V00x_IWDG_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* IWDG_WriteAccess */
#define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
#define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
/* IWDG_prescaler */
#define IWDG_Prescaler_4 ((uint8_t)0x00)
#define IWDG_Prescaler_8 ((uint8_t)0x01)
#define IWDG_Prescaler_16 ((uint8_t)0x02)
#define IWDG_Prescaler_32 ((uint8_t)0x03)
#define IWDG_Prescaler_64 ((uint8_t)0x04)
#define IWDG_Prescaler_128 ((uint8_t)0x05)
#define IWDG_Prescaler_256 ((uint8_t)0x06)
/* IWDG_Flag */
#define IWDG_FLAG_PVU ((uint16_t)0x0001)
#define IWDG_FLAG_RVU ((uint16_t)0x0002)
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
void IWDG_SetReload(uint16_t Reload);
void IWDG_ReloadCounter(void);
void IWDG_Enable(void);
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_IWDG_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_misc.h
* Author : WCH
* Version : V1.0.0
* Date : 2023/12/26
* Description : This file contains all the functions prototypes for the
* miscellaneous firmware library functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00X_MISC_H
#define __CH32V00X_MISC_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* CSR_INTSYSCR_INEST_definition */
#define INTSYSCR_INEST_NoEN 0x00 /* interrupt nesting disable(CSR-0x804 bit1 = 0) */
#define INTSYSCR_INEST_EN 0x01 /* interrupt nesting enable(CSR-0x804 bit1 = 1) */
/* Check the configuration of CSR(0x804) in the startup file(.S)
* interrupt nesting enable(CSR-0x804 bit1 = 1)
* priority - bit[7] - Preemption Priority
* bit[6] - Sub priority
* bit[5:0] - Reserve
* interrupt nesting disable(CSR-0x804 bit1 = 0)
* priority - bit[7:6] - Sub priority
* bit[5:0] - Reserve
*/
#ifndef INTSYSCR_INEST
#define INTSYSCR_INEST INTSYSCR_INEST_EN
#endif
/* NVIC Init Structure definition
* interrupt nesting enable(CSR-0x804 bit1 = 1)
* NVIC_IRQChannelPreemptionPriority - range from 0 to 1.
* NVIC_IRQChannelSubPriority - range from 0 to 1.
*
* interrupt nesting disable(CSR-0x804 bit1 = 0)
* NVIC_IRQChannelPreemptionPriority - range is 0.
* NVIC_IRQChannelSubPriority - range from 0 to 3.
*
*/
typedef struct
{
uint8_t NVIC_IRQChannel;
uint8_t NVIC_IRQChannelPreemptionPriority;
uint8_t NVIC_IRQChannelSubPriority;
FunctionalState NVIC_IRQChannelCmd;
} NVIC_InitTypeDef;
/* Preemption_Priority_Group */
#if (INTSYSCR_INEST == INTSYSCR_INEST_NoEN)
#define NVIC_PriorityGroup_0 ((uint32_t)0x00) /* interrupt nesting enable(CSR-0x804 bit1 = 1) */
#else
#define NVIC_PriorityGroup_1 ((uint32_t)0x01) /* interrupt nesting disable(CSR-0x804 bit1 = 0) */
#endif
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_MISC_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_opa.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* OPA firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_OPA_H
#define __CH32V00x_OPA_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v00x.h"
/* OPA PSEL enumeration */
typedef enum
{
CHP0 = 0,
CHP1
} OPA_PSEL_TypeDef;
/* OPA NSEL enumeration */
typedef enum
{
CHN0 = 0,
CHN1
} OPA_NSEL_TypeDef;
/* OPA Init Structure definition */
typedef struct
{
OPA_PSEL_TypeDef PSEL; /* Specifies the positive channel of OPA */
OPA_NSEL_TypeDef NSEL; /* Specifies the negative channel of OPA */
} OPA_InitTypeDef;
void OPA_DeInit(void);
void OPA_Init(OPA_InitTypeDef *OPA_InitStruct);
void OPA_StructInit(OPA_InitTypeDef *OPA_InitStruct);
void OPA_Cmd(FunctionalState NewState);
#ifdef __cplusplus
}
#endif
#endif

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_pwr.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the PWR
* firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_PWR_H
#define __CH32V00x_PWR_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* PVD_detection_level */
#define PWR_PVDLevel_MODE0 ((uint32_t)0x00000000)
#define PWR_PVDLevel_MODE1 ((uint32_t)0x00000020)
#define PWR_PVDLevel_MODE2 ((uint32_t)0x00000040)
#define PWR_PVDLevel_MODE3 ((uint32_t)0x00000060)
#define PWR_PVDLevel_MODE4 ((uint32_t)0x00000080)
#define PWR_PVDLevel_MODE5 ((uint32_t)0x000000A0)
#define PWR_PVDLevel_MODE6 ((uint32_t)0x000000C0)
#define PWR_PVDLevel_MODE7 ((uint32_t)0x000000E0)
#define PWR_PVDLevel_2V9 PWR_PVDLevel_MODE0
#define PWR_PVDLevel_3V1 PWR_PVDLevel_MODE1
#define PWR_PVDLevel_3V3 PWR_PVDLevel_MODE2
#define PWR_PVDLevel_3V5 PWR_PVDLevel_MODE3
#define PWR_PVDLevel_3V7 PWR_PVDLevel_MODE4
#define PWR_PVDLevel_3V9 PWR_PVDLevel_MODE5
#define PWR_PVDLevel_4V1 PWR_PVDLevel_MODE6
#define PWR_PVDLevel_4V4 PWR_PVDLevel_MODE7
/* PWR_AWU_Prescaler */
#define PWR_AWU_Prescaler_1 ((uint32_t)0x00000000)
#define PWR_AWU_Prescaler_2 ((uint32_t)0x00000002)
#define PWR_AWU_Prescaler_4 ((uint32_t)0x00000003)
#define PWR_AWU_Prescaler_8 ((uint32_t)0x00000004)
#define PWR_AWU_Prescaler_16 ((uint32_t)0x00000005)
#define PWR_AWU_Prescaler_32 ((uint32_t)0x00000006)
#define PWR_AWU_Prescaler_64 ((uint32_t)0x00000007)
#define PWR_AWU_Prescaler_128 ((uint32_t)0x00000008)
#define PWR_AWU_Prescaler_256 ((uint32_t)0x00000009)
#define PWR_AWU_Prescaler_512 ((uint32_t)0x0000000A)
#define PWR_AWU_Prescaler_1024 ((uint32_t)0x0000000B)
#define PWR_AWU_Prescaler_2048 ((uint32_t)0x0000000C)
#define PWR_AWU_Prescaler_4096 ((uint32_t)0x0000000D)
#define PWR_AWU_Prescaler_10240 ((uint32_t)0x0000000E)
#define PWR_AWU_Prescaler_61440 ((uint32_t)0x0000000F)
/* STOP_mode_entry */
#define PWR_STANDBYEntry_WFI ((uint8_t)0x01)
#define PWR_STANDBYEntry_WFE ((uint8_t)0x02)
/* PWR_Flag */
#define PWR_FLAG_PVDO ((uint32_t)0x00000004)
void PWR_DeInit(void);
void PWR_PVDCmd(FunctionalState NewState);
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
void PWR_AutoWakeUpCmd(FunctionalState NewState);
void PWR_AWU_SetPrescaler(uint32_t AWU_Prescaler);
void PWR_AWU_SetWindowValue(uint8_t WindowValue);
void PWR_EnterSTANDBYMode(uint8_t PWR_STANDBYEntry);
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_PWR_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_rcc.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the RCC firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_RCC_H
#define __CH32V00x_RCC_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* RCC_Exported_Types */
typedef struct
{
uint32_t SYSCLK_Frequency; /* returns SYSCLK clock frequency expressed in Hz */
uint32_t HCLK_Frequency; /* returns HCLK clock frequency expressed in Hz */
uint32_t PCLK1_Frequency; /* returns PCLK1 clock frequency expressed in Hz */
uint32_t PCLK2_Frequency; /* returns PCLK2 clock frequency expressed in Hz */
uint32_t ADCCLK_Frequency; /* returns ADCCLK clock frequency expressed in Hz */
} RCC_ClocksTypeDef;
/* HSE_configuration */
#define RCC_HSE_OFF ((uint32_t)0x00000000)
#define RCC_HSE_ON ((uint32_t)0x00010000)
#define RCC_HSE_Bypass ((uint32_t)0x00040000)
/* PLL_entry_clock_source */
#define RCC_PLLSource_HSI_MUL2 ((uint32_t)0x00000000)
#define RCC_PLLSource_HSE_MUL2 ((uint32_t)0x00010000)
/* System_clock_source */
#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
/* AHB_clock_source */
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
#define RCC_SYSCLK_Div2 ((uint32_t)0x00000010)
#define RCC_SYSCLK_Div3 ((uint32_t)0x00000020)
#define RCC_SYSCLK_Div4 ((uint32_t)0x00000030)
#define RCC_SYSCLK_Div5 ((uint32_t)0x00000040)
#define RCC_SYSCLK_Div6 ((uint32_t)0x00000050)
#define RCC_SYSCLK_Div7 ((uint32_t)0x00000060)
#define RCC_SYSCLK_Div8 ((uint32_t)0x00000070)
#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
#define RCC_SYSCLK_Div32 ((uint32_t)0x000000C0)
#define RCC_SYSCLK_Div64 ((uint32_t)0x000000D0)
#define RCC_SYSCLK_Div128 ((uint32_t)0x000000E0)
#define RCC_SYSCLK_Div256 ((uint32_t)0x000000F0)
/* RCC_Interrupt_source */
#define RCC_IT_LSIRDY ((uint8_t)0x01)
#define RCC_IT_HSIRDY ((uint8_t)0x04)
#define RCC_IT_HSERDY ((uint8_t)0x08)
#define RCC_IT_PLLRDY ((uint8_t)0x10)
#define RCC_IT_CSS ((uint8_t)0x80)
/* ADC_clock_source */
#define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
#define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
#define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
#define RCC_PCLK2_Div12 ((uint32_t)0x0000A000)
#define RCC_PCLK2_Div16 ((uint32_t)0x0000E000)
#define RCC_PCLK2_Div24 ((uint32_t)0x0000A800)
#define RCC_PCLK2_Div32 ((uint32_t)0x0000E800)
#define RCC_PCLK2_Div48 ((uint32_t)0x0000B000)
#define RCC_PCLK2_Div64 ((uint32_t)0x0000F000)
#define RCC_PCLK2_Div96 ((uint32_t)0x0000B800)
#define RCC_PCLK2_Div128 ((uint32_t)0x0000F800)
/* AHB_peripheral */
#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
/* APB2_peripheral */
#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
/* APB1_peripheral */
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
/* Clock_source_to_output_on_MCO_pin */
#define RCC_MCO_NoClock ((uint8_t)0x00)
#define RCC_MCO_SYSCLK ((uint8_t)0x04)
#define RCC_MCO_HSI ((uint8_t)0x05)
#define RCC_MCO_HSE ((uint8_t)0x06)
#define RCC_MCO_PLLCLK ((uint8_t)0x07)
/* RCC_Flag */
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
#define RCC_FLAG_PINRST ((uint8_t)0x7A)
#define RCC_FLAG_PORRST ((uint8_t)0x7B)
#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
/* SysTick_clock_source */
#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
void RCC_DeInit(void);
void RCC_HSEConfig(uint32_t RCC_HSE);
ErrorStatus RCC_WaitForHSEStartUp(void);
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
void RCC_HSICmd(FunctionalState NewState);
void RCC_PLLConfig(uint32_t RCC_PLLSource);
void RCC_PLLCmd(FunctionalState NewState);
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
uint8_t RCC_GetSYSCLKSource(void);
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
void RCC_LSICmd(FunctionalState NewState);
void RCC_GetClocksFreq(RCC_ClocksTypeDef *RCC_Clocks);
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
void RCC_MCOConfig(uint8_t RCC_MCO);
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
void RCC_ClearFlag(void);
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
void RCC_ClearITPendingBit(uint8_t RCC_IT);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_RCC_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_spi.h
* Author : WCH
* Version : V1.0.0
* Date : 2024/06/01
* Description : This file contains all the functions prototypes for the
* SPI firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_SPI_H
#define __CH32V00x_SPI_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* SPI Init structure definition */
typedef struct
{
uint16_t SPI_Direction; /* Specifies the SPI unidirectional or bidirectional data mode.
This parameter can be a value of @ref SPI_data_direction */
uint16_t SPI_Mode; /* Specifies the SPI operating mode.
This parameter can be a value of @ref SPI_mode */
uint16_t SPI_DataSize; /* Specifies the SPI data size.
This parameter can be a value of @ref SPI_data_size */
uint16_t SPI_CPOL; /* Specifies the serial clock steady state.
This parameter can be a value of @ref SPI_Clock_Polarity
When using SPI slave mode to send data, the CPOL bit should be set to 1 */
uint16_t SPI_CPHA; /* Specifies the clock active edge for the bit capture.
This parameter can be a value of @ref SPI_Clock_Phase */
uint16_t SPI_NSS; /* Specifies whether the NSS signal is managed by
hardware (NSS pin) or by software using the SSI bit.
This parameter can be a value of @ref SPI_Slave_Select_management */
uint16_t SPI_BaudRatePrescaler; /* Specifies the Baud Rate prescaler value which will be
used to configure the transmit and receive SCK clock.
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
@note The communication clock is derived from the master
clock. The slave clock does not need to be set. */
uint16_t SPI_FirstBit; /* Specifies whether data transfers start from MSB bit. */
uint16_t SPI_CRCPolynomial; /* Specifies the polynomial used for the CRC calculation. */
} SPI_InitTypeDef;
/* SPI_data_direction */
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
/* SPI_mode */
#define SPI_Mode_Master ((uint16_t)0x0104)
#define SPI_Mode_Slave ((uint16_t)0x0000)
/* SPI_data_size */
#define SPI_DataSize_16b ((uint16_t)0x0800)
#define SPI_DataSize_8b ((uint16_t)0x0000)
/* SPI_Clock_Polarity */
#define SPI_CPOL_Low ((uint16_t)0x0000)
#define SPI_CPOL_High ((uint16_t)0x0002)//When using SPI slave mode to send data, the CPOL bit should be set to 1.
/* SPI_Clock_Phase */
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
/* SPI_Slave_Select_management */
#define SPI_NSS_Soft ((uint16_t)0x0200)
#define SPI_NSS_Hard ((uint16_t)0x0000)
/* SPI_BaudRate_Prescaler */
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
/* SPI_MSB_LSB transmission */
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
#define SPI_FirstBit_LSB ((uint16_t)0x0080)//not support SPI slave mode
/* SPI_I2S_DMA_transfer_requests */
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
/* SPI_NSS_internal_software_management */
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
/* SPI_CRC_Transmit_Receive */
#define SPI_CRC_Tx ((uint8_t)0x00)
#define SPI_CRC_Rx ((uint8_t)0x01)
/* SPI_direction_transmit_receive */
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
#define SPI_Direction_Tx ((uint16_t)0x4000)
/* SPI_I2S_interrupts_definition */
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
#define SPI_IT_MODF ((uint8_t)0x55)
#define SPI_IT_CRCERR ((uint8_t)0x54)
#define I2S_IT_UDR ((uint8_t)0x53)
/* SPI_I2S_flags_definition */
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
#define I2S_FLAG_UDR ((uint16_t)0x0008)
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
#define SPI_FLAG_MODF ((uint16_t)0x0020)
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
void SPI_I2S_DeInit(SPI_TypeDef *SPIx);
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct);
void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct);
void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState);
void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data);
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft);
void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState);
void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize);
void SPI_TransmitCRC(SPI_TypeDef *SPIx);
void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState);
uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC);
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx);
void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction);
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG);
void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG);
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT);
void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V00x_SPI_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_tim.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* TIM firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_TIM_H
#define __CH32V00x_TIM_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* TIM Time Base Init structure definition */
typedef struct
{
uint16_t TIM_Prescaler; /* Specifies the prescaler value used to divide the TIM clock.
This parameter can be a number between 0x0000 and 0xFFFF */
uint16_t TIM_CounterMode; /* Specifies the counter mode.
This parameter can be a value of @ref TIM_Counter_Mode */
uint16_t TIM_Period; /* Specifies the period value to be loaded into the active
Auto-Reload Register at the next update event.
This parameter must be a number between 0x0000 and 0xFFFF. */
uint16_t TIM_ClockDivision; /* Specifies the clock division.
This parameter can be a value of @ref TIM_Clock_Division_CKD */
uint8_t TIM_RepetitionCounter; /* Specifies the repetition counter value. Each time the RCR downcounter
reaches zero, an update event is generated and counting restarts
from the RCR value (N).
This means in PWM mode that (N+1) corresponds to:
- the number of PWM periods in edge-aligned mode
- the number of half PWM period in center-aligned mode
This parameter must be a number between 0x00 and 0xFF.
@note This parameter is valid only for TIM1. */
} TIM_TimeBaseInitTypeDef;
/* TIM Output Compare Init structure definition */
typedef struct
{
uint16_t TIM_OCMode; /* Specifies the TIM mode.
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
uint16_t TIM_OutputState; /* Specifies the TIM Output Compare state.
This parameter can be a value of @ref TIM_Output_Compare_state */
uint16_t TIM_OutputNState; /* Specifies the TIM complementary Output Compare state.
This parameter can be a value of @ref TIM_Output_Compare_N_state
@note This parameter is valid only for TIM1. */
uint16_t TIM_Pulse; /* Specifies the pulse value to be loaded into the Capture Compare Register.
This parameter can be a number between 0x0000 and 0xFFFF */
uint16_t TIM_OCPolarity; /* Specifies the output polarity.
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
uint16_t TIM_OCNPolarity; /* Specifies the complementary output polarity.
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
@note This parameter is valid only for TIM1. */
uint16_t TIM_OCIdleState; /* Specifies the TIM Output Compare pin state during Idle state.
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
@note This parameter is valid only for TIM1. */
uint16_t TIM_OCNIdleState; /* Specifies the TIM Output Compare pin state during Idle state.
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
@note This parameter is valid only for TIM1. */
} TIM_OCInitTypeDef;
/* TIM Input Capture Init structure definition */
typedef struct
{
uint16_t TIM_Channel; /* Specifies the TIM channel.
This parameter can be a value of @ref TIM_Channel */
uint16_t TIM_ICPolarity; /* Specifies the active edge of the input signal.
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
uint16_t TIM_ICSelection; /* Specifies the input.
This parameter can be a value of @ref TIM_Input_Capture_Selection */
uint16_t TIM_ICPrescaler; /* Specifies the Input Capture Prescaler.
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
uint16_t TIM_ICFilter; /* Specifies the input capture filter.
This parameter can be a number between 0x0 and 0xF */
} TIM_ICInitTypeDef;
/* BDTR structure definition */
typedef struct
{
uint16_t TIM_OSSRState; /* Specifies the Off-State selection used in Run mode.
This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */
uint16_t TIM_OSSIState; /* Specifies the Off-State used in Idle state.
This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */
uint16_t TIM_LOCKLevel; /* Specifies the LOCK level parameters.
This parameter can be a value of @ref Lock_level */
uint16_t TIM_DeadTime; /* Specifies the delay time between the switching-off and the
switching-on of the outputs.
This parameter can be a number between 0x00 and 0xFF */
uint16_t TIM_Break; /* Specifies whether the TIM Break input is enabled or not.
This parameter can be a value of @ref Break_Input_enable_disable */
uint16_t TIM_BreakPolarity; /* Specifies the TIM Break Input pin polarity.
This parameter can be a value of @ref Break_Polarity */
uint16_t TIM_AutomaticOutput; /* Specifies whether the TIM Automatic Output feature is enabled or not.
This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
} TIM_BDTRInitTypeDef;
/* TIM_Output_Compare_and_PWM_modes */
#define TIM_OCMode_Timing ((uint16_t)0x0000)
#define TIM_OCMode_Active ((uint16_t)0x0010)
#define TIM_OCMode_Inactive ((uint16_t)0x0020)
#define TIM_OCMode_Toggle ((uint16_t)0x0030)
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
/* TIM_One_Pulse_Mode */
#define TIM_OPMode_Single ((uint16_t)0x0008)
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
/* TIM_Channel */
#define TIM_Channel_1 ((uint16_t)0x0000)
#define TIM_Channel_2 ((uint16_t)0x0004)
#define TIM_Channel_3 ((uint16_t)0x0008)
#define TIM_Channel_4 ((uint16_t)0x000C)
/* TIM_Clock_Division_CKD */
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
#define TIM_CKD_DIV2 ((uint16_t)0x0100)
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
/* TIM_Counter_Mode */
#define TIM_CounterMode_Up ((uint16_t)0x0000)
#define TIM_CounterMode_Down ((uint16_t)0x0010)
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
/* TIM_Output_Compare_Polarity */
#define TIM_OCPolarity_High ((uint16_t)0x0000)
#define TIM_OCPolarity_Low ((uint16_t)0x0002)
/* TIM_Output_Compare_N_Polarity */
#define TIM_OCNPolarity_High ((uint16_t)0x0000)
#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
/* TIM_Output_Compare_state */
#define TIM_OutputState_Disable ((uint16_t)0x0000)
#define TIM_OutputState_Enable ((uint16_t)0x0001)
/* TIM_Output_Compare_N_state */
#define TIM_OutputNState_Disable ((uint16_t)0x0000)
#define TIM_OutputNState_Enable ((uint16_t)0x0004)
/* TIM_Capture_Compare_state */
#define TIM_CCx_Enable ((uint16_t)0x0001)
#define TIM_CCx_Disable ((uint16_t)0x0000)
/* TIM_Capture_Compare_N_state */
#define TIM_CCxN_Enable ((uint16_t)0x0004)
#define TIM_CCxN_Disable ((uint16_t)0x0000)
/* Break_Input_enable_disable */
#define TIM_Break_Enable ((uint16_t)0x1000)
#define TIM_Break_Disable ((uint16_t)0x0000)
/* Break_Polarity */
#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
#define TIM_BreakPolarity_High ((uint16_t)0x2000)
/* TIM_AOE_Bit_Set_Reset */
#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
/* Lock_level */
#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
/* OSSI_Off_State_Selection_for_Idle_mode_state */
#define TIM_OSSIState_Enable ((uint16_t)0x0400)
#define TIM_OSSIState_Disable ((uint16_t)0x0000)
/* OSSR_Off_State_Selection_for_Run_mode_state */
#define TIM_OSSRState_Enable ((uint16_t)0x0800)
#define TIM_OSSRState_Disable ((uint16_t)0x0000)
/* TIM_Output_Compare_Idle_State */
#define TIM_OCIdleState_Set ((uint16_t)0x0100)
#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
/* TIM_Output_Compare_N_Idle_State */
#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
/* TIM_Input_Capture_Polarity */
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
/* TIM_Input_Capture_Selection */
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /* TIM Input 1, 2, 3 or 4 is selected to be \
connected to IC1, IC2, IC3 or IC4, respectively */
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /* TIM Input 1, 2, 3 or 4 is selected to be \
connected to IC2, IC1, IC4 or IC3, respectively. */
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /* TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
/* TIM_Input_Capture_Prescaler */
#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /* Capture performed each time an edge is detected on the capture input. */
#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /* Capture performed once every 2 events. */
#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /* Capture performed once every 4 events. */
#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /* Capture performed once every 8 events. */
/* TIM_interrupt_sources */
#define TIM_IT_Update ((uint16_t)0x0001)
#define TIM_IT_CC1 ((uint16_t)0x0002)
#define TIM_IT_CC2 ((uint16_t)0x0004)
#define TIM_IT_CC3 ((uint16_t)0x0008)
#define TIM_IT_CC4 ((uint16_t)0x0010)
#define TIM_IT_COM ((uint16_t)0x0020)
#define TIM_IT_Trigger ((uint16_t)0x0040)
#define TIM_IT_Break ((uint16_t)0x0080)
/* TIM_DMA_Base_address */
#define TIM_DMABase_CR1 ((uint16_t)0x0000)
#define TIM_DMABase_CR2 ((uint16_t)0x0001)
#define TIM_DMABase_SMCR ((uint16_t)0x0002)
#define TIM_DMABase_DIER ((uint16_t)0x0003)
#define TIM_DMABase_SR ((uint16_t)0x0004)
#define TIM_DMABase_EGR ((uint16_t)0x0005)
#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
#define TIM_DMABase_CCER ((uint16_t)0x0008)
#define TIM_DMABase_CNT ((uint16_t)0x0009)
#define TIM_DMABase_PSC ((uint16_t)0x000A)
#define TIM_DMABase_ARR ((uint16_t)0x000B)
#define TIM_DMABase_RCR ((uint16_t)0x000C)
#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
#define TIM_DMABase_CCR4 ((uint16_t)0x0010)
#define TIM_DMABase_BDTR ((uint16_t)0x0011)
#define TIM_DMABase_DCR ((uint16_t)0x0012)
/* TIM_DMA_Burst_Length */
#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
/* TIM_DMA_sources */
#define TIM_DMA_Update ((uint16_t)0x0100)
#define TIM_DMA_CC1 ((uint16_t)0x0200)
#define TIM_DMA_CC2 ((uint16_t)0x0400)
#define TIM_DMA_CC3 ((uint16_t)0x0800)
#define TIM_DMA_CC4 ((uint16_t)0x1000)
#define TIM_DMA_COM ((uint16_t)0x2000)
#define TIM_DMA_Trigger ((uint16_t)0x4000)
/* TIM_External_Trigger_Prescaler */
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
/* TIM_Internal_Trigger_Selection */
#define TIM_TS_ITR0 ((uint16_t)0x0000)
#define TIM_TS_ITR1 ((uint16_t)0x0010)
#define TIM_TS_ITR2 ((uint16_t)0x0020)
#define TIM_TS_ITR3 ((uint16_t)0x0030)
#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
#define TIM_TS_TI2FP2 ((uint16_t)0x0060)
#define TIM_TS_ETRF ((uint16_t)0x0070)
/* TIM_TIx_External_Clock_Source */
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
/* TIM_External_Trigger_Polarity */
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
/* TIM_Prescaler_Reload_Mode */
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
/* TIM_Forced_Action */
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
/* TIM_Encoder_Mode */
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
/* TIM_Event_Source */
#define TIM_EventSource_Update ((uint16_t)0x0001)
#define TIM_EventSource_CC1 ((uint16_t)0x0002)
#define TIM_EventSource_CC2 ((uint16_t)0x0004)
#define TIM_EventSource_CC3 ((uint16_t)0x0008)
#define TIM_EventSource_CC4 ((uint16_t)0x0010)
#define TIM_EventSource_COM ((uint16_t)0x0020)
#define TIM_EventSource_Trigger ((uint16_t)0x0040)
#define TIM_EventSource_Break ((uint16_t)0x0080)
/* TIM_Update_Source */
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /* Source of update is the counter overflow/underflow \
or the setting of UG bit, or an update generation \
through the slave mode controller. */
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /* Source of update is counter overflow/underflow. */
/* TIM_Output_Compare_Preload_State */
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
/* TIM_Output_Compare_Fast_State */
#define TIM_OCFast_Enable ((uint16_t)0x0004)
#define TIM_OCFast_Disable ((uint16_t)0x0000)
/* TIM_Output_Compare_Clear_State */
#define TIM_OCClear_Enable ((uint16_t)0x0080)
#define TIM_OCClear_Disable ((uint16_t)0x0000)
/* TIM_Trigger_Output_Source */
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
#define TIM_TRGOSource_Update ((uint16_t)0x0020)
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
/* TIM_Slave_Mode */
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
/* TIM_Master_Slave_Mode */
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
/* TIM_Flags */
#define TIM_FLAG_Update ((uint16_t)0x0001)
#define TIM_FLAG_CC1 ((uint16_t)0x0002)
#define TIM_FLAG_CC2 ((uint16_t)0x0004)
#define TIM_FLAG_CC3 ((uint16_t)0x0008)
#define TIM_FLAG_CC4 ((uint16_t)0x0010)
#define TIM_FLAG_COM ((uint16_t)0x0020)
#define TIM_FLAG_Trigger ((uint16_t)0x0040)
#define TIM_FLAG_Break ((uint16_t)0x0080)
#define TIM_FLAG_CC1OF ((uint16_t)0x0200)
#define TIM_FLAG_CC2OF ((uint16_t)0x0400)
#define TIM_FLAG_CC3OF ((uint16_t)0x0800)
#define TIM_FLAG_CC4OF ((uint16_t)0x1000)
/* TIM_Legacy */
#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
void TIM_DeInit(TIM_TypeDef *TIMx);
void TIM_TimeBaseInit(TIM_TypeDef *TIMx, TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct);
void TIM_OC1Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct);
void TIM_OC2Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct);
void TIM_OC3Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct);
void TIM_OC4Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct);
void TIM_ICInit(TIM_TypeDef *TIMx, TIM_ICInitTypeDef *TIM_ICInitStruct);
void TIM_PWMIConfig(TIM_TypeDef *TIMx, TIM_ICInitTypeDef *TIM_ICInitStruct);
void TIM_BDTRConfig(TIM_TypeDef *TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct);
void TIM_OCStructInit(TIM_OCInitTypeDef *TIM_OCInitStruct);
void TIM_ICStructInit(TIM_ICInitTypeDef *TIM_ICInitStruct);
void TIM_BDTRStructInit(TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
void TIM_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_CtrlPWMOutputs(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_ITConfig(TIM_TypeDef *TIMx, uint16_t TIM_IT, FunctionalState NewState);
void TIM_GenerateEvent(TIM_TypeDef *TIMx, uint16_t TIM_EventSource);
void TIM_DMAConfig(TIM_TypeDef *TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
void TIM_DMACmd(TIM_TypeDef *TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
void TIM_InternalClockConfig(TIM_TypeDef *TIMx);
void TIM_ITRxExternalClockConfig(TIM_TypeDef *TIMx, uint16_t TIM_InputTriggerSource);
void TIM_TIxExternalClockConfig(TIM_TypeDef *TIMx, uint16_t TIM_TIxExternalCLKSource,
uint16_t TIM_ICPolarity, uint16_t ICFilter);
void TIM_ETRClockMode1Config(TIM_TypeDef *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
uint16_t ExtTRGFilter);
void TIM_ETRClockMode2Config(TIM_TypeDef *TIMx, uint16_t TIM_ExtTRGPrescaler,
uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
void TIM_ETRConfig(TIM_TypeDef *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
uint16_t ExtTRGFilter);
void TIM_PrescalerConfig(TIM_TypeDef *TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
void TIM_CounterModeConfig(TIM_TypeDef *TIMx, uint16_t TIM_CounterMode);
void TIM_SelectInputTrigger(TIM_TypeDef *TIMx, uint16_t TIM_InputTriggerSource);
void TIM_EncoderInterfaceConfig(TIM_TypeDef *TIMx, uint16_t TIM_EncoderMode,
uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
void TIM_ForcedOC1Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction);
void TIM_ForcedOC2Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction);
void TIM_ForcedOC3Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction);
void TIM_ForcedOC4Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction);
void TIM_ARRPreloadConfig(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_SelectCOM(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_SelectCCDMA(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_CCPreloadControl(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_OC1PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload);
void TIM_OC2PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload);
void TIM_OC3PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload);
void TIM_OC4PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload);
void TIM_OC1FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast);
void TIM_OC2FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast);
void TIM_OC3FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast);
void TIM_OC4FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast);
void TIM_ClearOC1Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear);
void TIM_ClearOC2Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear);
void TIM_ClearOC3Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear);
void TIM_ClearOC4Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear);
void TIM_OC1PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity);
void TIM_OC1NPolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCNPolarity);
void TIM_OC2PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity);
void TIM_OC2NPolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCNPolarity);
void TIM_OC3PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity);
void TIM_OC3NPolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCNPolarity);
void TIM_OC4PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity);
void TIM_CCxCmd(TIM_TypeDef *TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
void TIM_CCxNCmd(TIM_TypeDef *TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
void TIM_SelectOCxM(TIM_TypeDef *TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
void TIM_UpdateDisableConfig(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_UpdateRequestConfig(TIM_TypeDef *TIMx, uint16_t TIM_UpdateSource);
void TIM_SelectHallSensor(TIM_TypeDef *TIMx, FunctionalState NewState);
void TIM_SelectOnePulseMode(TIM_TypeDef *TIMx, uint16_t TIM_OPMode);
void TIM_SelectOutputTrigger(TIM_TypeDef *TIMx, uint16_t TIM_TRGOSource);
void TIM_SelectSlaveMode(TIM_TypeDef *TIMx, uint16_t TIM_SlaveMode);
void TIM_SelectMasterSlaveMode(TIM_TypeDef *TIMx, uint16_t TIM_MasterSlaveMode);
void TIM_SetCounter(TIM_TypeDef *TIMx, uint16_t Counter);
void TIM_SetAutoreload(TIM_TypeDef *TIMx, uint16_t Autoreload);
void TIM_SetCompare1(TIM_TypeDef *TIMx, uint16_t Compare1);
void TIM_SetCompare2(TIM_TypeDef *TIMx, uint16_t Compare2);
void TIM_SetCompare3(TIM_TypeDef *TIMx, uint16_t Compare3);
void TIM_SetCompare4(TIM_TypeDef *TIMx, uint16_t Compare4);
void TIM_SetIC1Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC);
void TIM_SetIC2Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC);
void TIM_SetIC3Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC);
void TIM_SetIC4Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC);
void TIM_SetClockDivision(TIM_TypeDef *TIMx, uint16_t TIM_CKD);
uint16_t TIM_GetCapture1(TIM_TypeDef *TIMx);
uint16_t TIM_GetCapture2(TIM_TypeDef *TIMx);
uint16_t TIM_GetCapture3(TIM_TypeDef *TIMx);
uint16_t TIM_GetCapture4(TIM_TypeDef *TIMx);
uint16_t TIM_GetCounter(TIM_TypeDef *TIMx);
uint16_t TIM_GetPrescaler(TIM_TypeDef *TIMx);
FlagStatus TIM_GetFlagStatus(TIM_TypeDef *TIMx, uint16_t TIM_FLAG);
void TIM_ClearFlag(TIM_TypeDef *TIMx, uint16_t TIM_FLAG);
ITStatus TIM_GetITStatus(TIM_TypeDef *TIMx, uint16_t TIM_IT);
void TIM_ClearITPendingBit(TIM_TypeDef *TIMx, uint16_t TIM_IT);
void TIM_IndicateCaptureLevelCmd(TIM_TypeDef *TIMx, FunctionalState NewState);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V00x_TIM_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_usart.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the
* USART firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_USART_H
#define __CH32V00x_USART_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* USART Init Structure definition */
typedef struct
{
uint32_t USART_BaudRate; /* This member configures the USART communication baud rate.
The baud rate is computed using the following formula:
- IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
uint16_t USART_WordLength; /* Specifies the number of data bits transmitted or received in a frame.
This parameter can be a value of @ref USART_Word_Length */
uint16_t USART_StopBits; /* Specifies the number of stop bits transmitted.
This parameter can be a value of @ref USART_Stop_Bits */
uint16_t USART_Parity; /* Specifies the parity mode.
This parameter can be a value of @ref USART_Parity
@note When parity is enabled, the computed parity is inserted
at the MSB position of the transmitted data (9th bit when
the word length is set to 9 data bits; 8th bit when the
word length is set to 8 data bits). */
uint16_t USART_Mode; /* Specifies wether the Receive or Transmit mode is enabled or disabled.
This parameter can be a value of @ref USART_Mode */
uint16_t USART_HardwareFlowControl; /* Specifies wether the hardware flow control mode is enabled
or disabled.
This parameter can be a value of @ref USART_Hardware_Flow_Control */
} USART_InitTypeDef;
/* USART Clock Init Structure definition */
typedef struct
{
uint16_t USART_Clock; /* Specifies whether the USART clock is enabled or disabled.
This parameter can be a value of @ref USART_Clock */
uint16_t USART_CPOL; /* Specifies the steady state value of the serial clock.
This parameter can be a value of @ref USART_Clock_Polarity */
uint16_t USART_CPHA; /* Specifies the clock transition on which the bit capture is made.
This parameter can be a value of @ref USART_Clock_Phase */
uint16_t USART_LastBit; /* Specifies whether the clock pulse corresponding to the last transmitted
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
This parameter can be a value of @ref USART_Last_Bit */
} USART_ClockInitTypeDef;
/* USART_Word_Length */
#define USART_WordLength_8b ((uint16_t)0x0000)
#define USART_WordLength_9b ((uint16_t)0x1000)
/* USART_Stop_Bits */
#define USART_StopBits_1 ((uint16_t)0x0000)
#define USART_StopBits_0_5 ((uint16_t)0x1000)
#define USART_StopBits_2 ((uint16_t)0x2000)
#define USART_StopBits_1_5 ((uint16_t)0x3000)
/* USART_Parity */
#define USART_Parity_No ((uint16_t)0x0000)
#define USART_Parity_Even ((uint16_t)0x0400)
#define USART_Parity_Odd ((uint16_t)0x0600)
/* USART_Mode */
#define USART_Mode_Rx ((uint16_t)0x0004)
#define USART_Mode_Tx ((uint16_t)0x0008)
/* USART_Hardware_Flow_Control */
#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
/* USART_Clock */
#define USART_Clock_Disable ((uint16_t)0x0000)
#define USART_Clock_Enable ((uint16_t)0x0800)
/* USART_Clock_Polarity */
#define USART_CPOL_Low ((uint16_t)0x0000)
#define USART_CPOL_High ((uint16_t)0x0400)
/* USART_Clock_Phase */
#define USART_CPHA_1Edge ((uint16_t)0x0000)
#define USART_CPHA_2Edge ((uint16_t)0x0200)
/* USART_Last_Bit */
#define USART_LastBit_Disable ((uint16_t)0x0000)
#define USART_LastBit_Enable ((uint16_t)0x0100)
/* USART_Interrupt_definition */
#define USART_IT_PE ((uint16_t)0x0028)
#define USART_IT_TXE ((uint16_t)0x0727)
#define USART_IT_TC ((uint16_t)0x0626)
#define USART_IT_RXNE ((uint16_t)0x0525)
#define USART_IT_ORE_RX ((uint16_t)0x0325)
#define USART_IT_IDLE ((uint16_t)0x0424)
#define USART_IT_LBD ((uint16_t)0x0846)
#define USART_IT_CTS ((uint16_t)0x096A)
#define USART_IT_ERR ((uint16_t)0x0060)
#define USART_IT_ORE_ER ((uint16_t)0x0360)
#define USART_IT_NE ((uint16_t)0x0260)
#define USART_IT_FE ((uint16_t)0x0160)
#define USART_IT_ORE USART_IT_ORE_ER
/* USART_DMA_Requests */
#define USART_DMAReq_Tx ((uint16_t)0x0080)
#define USART_DMAReq_Rx ((uint16_t)0x0040)
/* USART_WakeUp_methods */
#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
/* USART_LIN_Break_Detection_Length */
#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
/* USART_IrDA_Low_Power */
#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
#define USART_IrDAMode_Normal ((uint16_t)0x0000)
/* USART_Flags */
#define USART_FLAG_CTS ((uint16_t)0x0200)
#define USART_FLAG_LBD ((uint16_t)0x0100)
#define USART_FLAG_TXE ((uint16_t)0x0080)
#define USART_FLAG_TC ((uint16_t)0x0040)
#define USART_FLAG_RXNE ((uint16_t)0x0020)
#define USART_FLAG_IDLE ((uint16_t)0x0010)
#define USART_FLAG_ORE ((uint16_t)0x0008)
#define USART_FLAG_NE ((uint16_t)0x0004)
#define USART_FLAG_FE ((uint16_t)0x0002)
#define USART_FLAG_PE ((uint16_t)0x0001)
void USART_DeInit(USART_TypeDef *USARTx);
void USART_Init(USART_TypeDef *USARTx, USART_InitTypeDef *USART_InitStruct);
void USART_StructInit(USART_InitTypeDef *USART_InitStruct);
void USART_ClockInit(USART_TypeDef *USARTx, USART_ClockInitTypeDef *USART_ClockInitStruct);
void USART_ClockStructInit(USART_ClockInitTypeDef *USART_ClockInitStruct);
void USART_Cmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_ITConfig(USART_TypeDef *USARTx, uint16_t USART_IT, FunctionalState NewState);
void USART_DMACmd(USART_TypeDef *USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
void USART_SetAddress(USART_TypeDef *USARTx, uint8_t USART_Address);
void USART_WakeUpConfig(USART_TypeDef *USARTx, uint16_t USART_WakeUp);
void USART_ReceiverWakeUpCmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_LINBreakDetectLengthConfig(USART_TypeDef *USARTx, uint16_t USART_LINBreakDetectLength);
void USART_LINCmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_SendData(USART_TypeDef *USARTx, uint16_t Data);
uint16_t USART_ReceiveData(USART_TypeDef *USARTx);
void USART_SendBreak(USART_TypeDef *USARTx);
void USART_SetGuardTime(USART_TypeDef *USARTx, uint8_t USART_GuardTime);
void USART_SetPrescaler(USART_TypeDef *USARTx, uint8_t USART_Prescaler);
void USART_SmartCardCmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_SmartCardNACKCmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_HalfDuplexCmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_OverSampling8Cmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_OneBitMethodCmd(USART_TypeDef *USARTx, FunctionalState NewState);
void USART_IrDAConfig(USART_TypeDef *USARTx, uint16_t USART_IrDAMode);
void USART_IrDACmd(USART_TypeDef *USARTx, FunctionalState NewState);
FlagStatus USART_GetFlagStatus(USART_TypeDef *USARTx, uint16_t USART_FLAG);
void USART_ClearFlag(USART_TypeDef *USARTx, uint16_t USART_FLAG);
ITStatus USART_GetITStatus(USART_TypeDef *USARTx, uint16_t USART_IT);
void USART_ClearITPendingBit(USART_TypeDef *USARTx, uint16_t USART_IT);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_USART_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_wwdg.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file contains all the functions prototypes for the WWDG
* firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V00x_WWDG_H
#define __CH32V00x_WWDG_H
#ifdef __cplusplus
extern "C" {
#endif
#include <ch32v00x.h>
/* WWDG_Prescaler */
#define WWDG_Prescaler_1 ((uint32_t)0x00000000)
#define WWDG_Prescaler_2 ((uint32_t)0x00000080)
#define WWDG_Prescaler_4 ((uint32_t)0x00000100)
#define WWDG_Prescaler_8 ((uint32_t)0x00000180)
void WWDG_DeInit(void);
void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
void WWDG_SetWindowValue(uint8_t WindowValue);
void WWDG_EnableIT(void);
void WWDG_SetCounter(uint8_t Counter);
void WWDG_Enable(uint8_t Counter);
FlagStatus WWDG_GetFlagStatus(void);
void WWDG_ClearFlag(void);
#ifdef __cplusplus
}
#endif
#endif /* __CH32V00x_WWDG_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_dbgmcu.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the DBGMCU firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_dbgmcu.h>
#define IDCODE_DEVID_MASK ((uint32_t)0x0000FFFF)
/*********************************************************************
* @fn DBGMCU_GetREVID
*
* @brief Returns the device revision identifier.
*
* @return Revision identifier.
*/
uint32_t DBGMCU_GetREVID(void)
{
return ((*(uint32_t *)0x1FFFF7C4) >> 16);
}
/*********************************************************************
* @fn DBGMCU_GetDEVID
*
* @brief Returns the device identifier.
*
* @return Device identifier.
*/
uint32_t DBGMCU_GetDEVID(void)
{
return ((*(uint32_t *)0x1FFFF7C4) & IDCODE_DEVID_MASK);
}
/*********************************************************************
* @fn __get_DEBUG_CR
*
* @brief Return the DEBUGE Control Register
*
* @return DEBUGE Control value
*/
uint32_t __get_DEBUG_CR(void)
{
uint32_t result;
__asm volatile("csrr %0,""0x7C0" : "=r"(result));
return (result);
}
/*********************************************************************
* @fn __set_DEBUG_CR
*
* @brief Set the DEBUGE Control Register
*
* @param value - set DEBUGE Control value
*
* @return none
*/
void __set_DEBUG_CR(uint32_t value)
{
__asm volatile("csrw 0x7C0, %0" : : "r"(value));
}
/*********************************************************************
* @fn DBGMCU_Config
*
* @brief Configures the specified peripheral and low power mode behavior
* when the MCU under Debug mode.
*
* @param DBGMCU_Periph - specifies the peripheral and low power mode.
* DBGMCU_IWDG_STOP - Debug IWDG stopped when Core is halted
* DBGMCU_WWDG_STOP - Debug WWDG stopped when Core is halted
* DBGMCU_TIM1_STOP - TIM1 counter stopped when Core is halted
* DBGMCU_TIM2_STOP - TIM2 counter stopped when Core is halted
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
{
uint32_t val;
if(NewState != DISABLE)
{
__set_DEBUG_CR(DBGMCU_Periph);
}
else
{
val = __get_DEBUG_CR();
val &= ~(uint32_t)DBGMCU_Periph;
__set_DEBUG_CR(val);
}
}
/*********************************************************************
* @fn DBGMCU_GetCHIPID
*
* @brief Returns the CHIP identifier.
*
* @return Device identifier.
* ChipID List-
* CH32V003F4P6-0x003005x0
* CH32V003F4U6-0x003105x0
* CH32V003A4M6-0x003205x0
* CH32V003J4M6-0x003305x0
*/
uint32_t DBGMCU_GetCHIPID( void )
{
return( *( uint32_t * )0x1FFFF7C4 );
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_dma.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the DMA firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_dma.h>
#include <ch32v00x_rcc.h>
/* DMA1 Channelx interrupt pending bit masks */
#define DMA1_Channel1_IT_Mask ((uint32_t)(DMA_GIF1 | DMA_TCIF1 | DMA_HTIF1 | DMA_TEIF1))
#define DMA1_Channel2_IT_Mask ((uint32_t)(DMA_GIF2 | DMA_TCIF2 | DMA_HTIF2 | DMA_TEIF2))
#define DMA1_Channel3_IT_Mask ((uint32_t)(DMA_GIF3 | DMA_TCIF3 | DMA_HTIF3 | DMA_TEIF3))
#define DMA1_Channel4_IT_Mask ((uint32_t)(DMA_GIF4 | DMA_TCIF4 | DMA_HTIF4 | DMA_TEIF4))
#define DMA1_Channel5_IT_Mask ((uint32_t)(DMA_GIF5 | DMA_TCIF5 | DMA_HTIF5 | DMA_TEIF5))
#define DMA1_Channel6_IT_Mask ((uint32_t)(DMA_GIF6 | DMA_TCIF6 | DMA_HTIF6 | DMA_TEIF6))
#define DMA1_Channel7_IT_Mask ((uint32_t)(DMA_GIF7 | DMA_TCIF7 | DMA_HTIF7 | DMA_TEIF7))
/* DMA2 FLAG mask */
#define FLAG_Mask ((uint32_t)0x10000000)
/* DMA registers Masks */
#define CFGR_CLEAR_Mask ((uint32_t)0xFFFF800F)
/*********************************************************************
* @fn DMA_DeInit
*
* @brief Deinitializes the DMAy Channelx registers to their default
* reset values.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
*
* @return none
*/
void DMA_DeInit(DMA_Channel_TypeDef *DMAy_Channelx)
{
DMAy_Channelx->CFGR &= (uint16_t)(~DMA_CFGR1_EN);
DMAy_Channelx->CFGR = 0;
DMAy_Channelx->CNTR = 0;
DMAy_Channelx->PADDR = 0;
DMAy_Channelx->MADDR = 0;
if(DMAy_Channelx == DMA1_Channel1)
{
DMA1->INTFCR |= DMA1_Channel1_IT_Mask;
}
else if(DMAy_Channelx == DMA1_Channel2)
{
DMA1->INTFCR |= DMA1_Channel2_IT_Mask;
}
else if(DMAy_Channelx == DMA1_Channel3)
{
DMA1->INTFCR |= DMA1_Channel3_IT_Mask;
}
else if(DMAy_Channelx == DMA1_Channel4)
{
DMA1->INTFCR |= DMA1_Channel4_IT_Mask;
}
else if(DMAy_Channelx == DMA1_Channel5)
{
DMA1->INTFCR |= DMA1_Channel5_IT_Mask;
}
else if(DMAy_Channelx == DMA1_Channel6)
{
DMA1->INTFCR |= DMA1_Channel6_IT_Mask;
}
else if(DMAy_Channelx == DMA1_Channel7)
{
DMA1->INTFCR |= DMA1_Channel7_IT_Mask;
}
}
/*********************************************************************
* @fn DMA_Init
*
* @brief Initializes the DMAy Channelx according to the specified
* parameters in the DMA_InitStruct.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
* DMA_InitStruct - pointer to a DMA_InitTypeDef structure that contains
* contains the configuration information for the specified DMA Channel.
*
* @return none
*/
void DMA_Init(DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct)
{
uint32_t tmpreg = 0;
tmpreg = DMAy_Channelx->CFGR;
tmpreg &= CFGR_CLEAR_Mask;
tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode |
DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc |
DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize |
DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M;
DMAy_Channelx->CFGR = tmpreg;
DMAy_Channelx->CNTR = DMA_InitStruct->DMA_BufferSize;
DMAy_Channelx->PADDR = DMA_InitStruct->DMA_PeripheralBaseAddr;
DMAy_Channelx->MADDR = DMA_InitStruct->DMA_MemoryBaseAddr;
}
/*********************************************************************
* @fn DMA_StructInit
*
* @brief Fills each DMA_InitStruct member with its default value.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
* DMA_InitStruct - pointer to a DMA_InitTypeDef structure that contains
* contains the configuration information for the specified DMA Channel.
*
* @return none
*/
void DMA_StructInit(DMA_InitTypeDef *DMA_InitStruct)
{
DMA_InitStruct->DMA_PeripheralBaseAddr = 0;
DMA_InitStruct->DMA_MemoryBaseAddr = 0;
DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStruct->DMA_BufferSize = 0;
DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable;
DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct->DMA_Priority = DMA_Priority_Low;
DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
}
/*********************************************************************
* @fn DMA_Cmd
*
* @brief Enables or disables the specified DMAy Channelx.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
* NewState - new state of the DMAy Channelx(ENABLE or DISABLE).
*
* @return none
*/
void DMA_Cmd(DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
DMAy_Channelx->CFGR |= DMA_CFGR1_EN;
}
else
{
DMAy_Channelx->CFGR &= (uint16_t)(~DMA_CFGR1_EN);
}
}
/*********************************************************************
* @fn DMA_ITConfig
*
* @brief Enables or disables the specified DMAy Channelx interrupts.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
* DMA_IT - specifies the DMA interrupts sources to be enabled
* or disabled.
* DMA_IT_TC - Transfer complete interrupt mask
* DMA_IT_HT - Half transfer interrupt mask
* DMA_IT_TE - Transfer error interrupt mask
* NewState - new state of the DMAy Channelx(ENABLE or DISABLE).
*
* @return none
*/
void DMA_ITConfig(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState)
{
if(NewState != DISABLE)
{
DMAy_Channelx->CFGR |= DMA_IT;
}
else
{
DMAy_Channelx->CFGR &= ~DMA_IT;
}
}
/*********************************************************************
* @fn DMA_SetCurrDataCounter
*
* @brief Sets the number of data units in the current DMAy Channelx transfer.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
* DataNumber - The number of data units in the current DMAy Channelx
* transfer.
*
* @return none
*/
void DMA_SetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber)
{
DMAy_Channelx->CNTR = DataNumber;
}
/*********************************************************************
* @fn DMA_GetCurrDataCounter
*
* @brief Returns the number of remaining data units in the current
* DMAy Channelx transfer.
*
* @param DMAy_Channelx - here y can be 1 to select the DMA and x can be
* 1 to 7 for DMA1 to select the DMA Channel.
*
* @return DataNumber - The number of remaining data units in the current
* DMAy Channelx transfer.
*/
uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx)
{
return ((uint16_t)(DMAy_Channelx->CNTR));
}
/*********************************************************************
* @fn DMA_GetFlagStatus
*
* @brief Checks whether the specified DMAy Channelx flag is set or not.
*
* @param DMAy_FLAG - specifies the flag to check.
* DMA1_FLAG_GL1 - DMA1 Channel1 global flag.
* DMA1_FLAG_TC1 - DMA1 Channel1 transfer complete flag.
* DMA1_FLAG_HT1 - DMA1 Channel1 half transfer flag.
* DMA1_FLAG_TE1 - DMA1 Channel1 transfer error flag.
* DMA1_FLAG_GL2 - DMA1 Channel2 global flag.
* DMA1_FLAG_TC2 - DMA1 Channel2 transfer complete flag.
* DMA1_FLAG_HT2 - DMA1 Channel2 half transfer flag.
* DMA1_FLAG_TE2 - DMA1 Channel2 transfer error flag.
* DMA1_FLAG_GL3 - DMA1 Channel3 global flag.
* DMA1_FLAG_TC3 - DMA1 Channel3 transfer complete flag.
* DMA1_FLAG_HT3 - DMA1 Channel3 half transfer flag.
* DMA1_FLAG_TE3 - DMA1 Channel3 transfer error flag.
* DMA1_FLAG_GL4 - DMA1 Channel4 global flag.
* DMA1_FLAG_TC4 - DMA1 Channel4 transfer complete flag.
* DMA1_FLAG_HT4 - DMA1 Channel4 half transfer flag.
* DMA1_FLAG_TE4 - DMA1 Channel4 transfer error flag.
* DMA1_FLAG_GL5 - DMA1 Channel5 global flag.
* DMA1_FLAG_TC5 - DMA1 Channel5 transfer complete flag.
* DMA1_FLAG_HT5 - DMA1 Channel5 half transfer flag.
* DMA1_FLAG_TE5 - DMA1 Channel5 transfer error flag.
* DMA1_FLAG_GL6 - DMA1 Channel6 global flag.
* DMA1_FLAG_TC6 - DMA1 Channel6 transfer complete flag.
* DMA1_FLAG_HT6 - DMA1 Channel6 half transfer flag.
* DMA1_FLAG_TE6 - DMA1 Channel6 transfer error flag.
* DMA1_FLAG_GL7 - DMA1 Channel7 global flag.
* DMA1_FLAG_TC7 - DMA1 Channel7 transfer complete flag.
* DMA1_FLAG_HT7 - DMA1 Channel7 half transfer flag.
* DMA1_FLAG_TE7 - DMA1 Channel7 transfer error flag.
*
* @return The new state of DMAy_FLAG (SET or RESET).
*/
FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG)
{
FlagStatus bitstatus = RESET;
uint32_t tmpreg = 0;
tmpreg = DMA1->INTFR;
if((tmpreg & DMAy_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn DMA_ClearFlag
*
* @brief Clears the DMAy Channelx's pending flags.
*
* @param DMAy_FLAG - specifies the flag to check.
* DMA1_FLAG_GL1 - DMA1 Channel1 global flag.
* DMA1_FLAG_TC1 - DMA1 Channel1 transfer complete flag.
* DMA1_FLAG_HT1 - DMA1 Channel1 half transfer flag.
* DMA1_FLAG_TE1 - DMA1 Channel1 transfer error flag.
* DMA1_FLAG_GL2 - DMA1 Channel2 global flag.
* DMA1_FLAG_TC2 - DMA1 Channel2 transfer complete flag.
* DMA1_FLAG_HT2 - DMA1 Channel2 half transfer flag.
* DMA1_FLAG_TE2 - DMA1 Channel2 transfer error flag.
* DMA1_FLAG_GL3 - DMA1 Channel3 global flag.
* DMA1_FLAG_TC3 - DMA1 Channel3 transfer complete flag.
* DMA1_FLAG_HT3 - DMA1 Channel3 half transfer flag.
* DMA1_FLAG_TE3 - DMA1 Channel3 transfer error flag.
* DMA1_FLAG_GL4 - DMA1 Channel4 global flag.
* DMA1_FLAG_TC4 - DMA1 Channel4 transfer complete flag.
* DMA1_FLAG_HT4 - DMA1 Channel4 half transfer flag.
* DMA1_FLAG_TE4 - DMA1 Channel4 transfer error flag.
* DMA1_FLAG_GL5 - DMA1 Channel5 global flag.
* DMA1_FLAG_TC5 - DMA1 Channel5 transfer complete flag.
* DMA1_FLAG_HT5 - DMA1 Channel5 half transfer flag.
* DMA1_FLAG_TE5 - DMA1 Channel5 transfer error flag.
* DMA1_FLAG_GL6 - DMA1 Channel6 global flag.
* DMA1_FLAG_TC6 - DMA1 Channel6 transfer complete flag.
* DMA1_FLAG_HT6 - DMA1 Channel6 half transfer flag.
* DMA1_FLAG_TE6 - DMA1 Channel6 transfer error flag.
* DMA1_FLAG_GL7 - DMA1 Channel7 global flag.
* DMA1_FLAG_TC7 - DMA1 Channel7 transfer complete flag.
* DMA1_FLAG_HT7 - DMA1 Channel7 half transfer flag.
* DMA1_FLAG_TE7 - DMA1 Channel7 transfer error flag.
*
* @return none
*/
void DMA_ClearFlag(uint32_t DMAy_FLAG)
{
DMA1->INTFCR = DMAy_FLAG;
}
/*********************************************************************
* @fn DMA_GetITStatus
*
* @brief Checks whether the specified DMAy Channelx interrupt has
* occurred or not.
*
* @param DMAy_IT - specifies the DMAy interrupt source to check.
* DMA1_IT_GL1 - DMA1 Channel1 global flag.
* DMA1_IT_TC1 - DMA1 Channel1 transfer complete flag.
* DMA1_IT_HT1 - DMA1 Channel1 half transfer flag.
* DMA1_IT_TE1 - DMA1 Channel1 transfer error flag.
* DMA1_IT_GL2 - DMA1 Channel2 global flag.
* DMA1_IT_TC2 - DMA1 Channel2 transfer complete flag.
* DMA1_IT_HT2 - DMA1 Channel2 half transfer flag.
* DMA1_IT_TE2 - DMA1 Channel2 transfer error flag.
* DMA1_IT_GL3 - DMA1 Channel3 global flag.
* DMA1_IT_TC3 - DMA1 Channel3 transfer complete flag.
* DMA1_IT_HT3 - DMA1 Channel3 half transfer flag.
* DMA1_IT_TE3 - DMA1 Channel3 transfer error flag.
* DMA1_IT_GL4 - DMA1 Channel4 global flag.
* DMA1_IT_TC4 - DMA1 Channel4 transfer complete flag.
* DMA1_IT_HT4 - DMA1 Channel4 half transfer flag.
* DMA1_IT_TE4 - DMA1 Channel4 transfer error flag.
* DMA1_IT_GL5 - DMA1 Channel5 global flag.
* DMA1_IT_TC5 - DMA1 Channel5 transfer complete flag.
* DMA1_IT_HT5 - DMA1 Channel5 half transfer flag.
* DMA1_IT_TE5 - DMA1 Channel5 transfer error flag.
* DMA1_IT_GL6 - DMA1 Channel6 global flag.
* DMA1_IT_TC6 - DMA1 Channel6 transfer complete flag.
* DMA1_IT_HT6 - DMA1 Channel6 half transfer flag.
* DMA1_IT_TE6 - DMA1 Channel6 transfer error flag.
* DMA1_IT_GL7 - DMA1 Channel7 global flag.
* DMA1_IT_TC7 - DMA1 Channel7 transfer complete flag.
* DMA1_IT_HT7 - DMA1 Channel7 half transfer flag.
* DMA1_IT_TE7 - DMA1 Channel7 transfer error flag.
*
* @return The new state of DMAy_IT (SET or RESET).
*/
ITStatus DMA_GetITStatus(uint32_t DMAy_IT)
{
ITStatus bitstatus = RESET;
uint32_t tmpreg = 0;
tmpreg = DMA1->INTFR;
if((tmpreg & DMAy_IT) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn DMA_ClearITPendingBit
*
* @brief Clears the DMAy Channelx's interrupt pending bits.
*
* @param DMAy_IT - specifies the DMAy interrupt source to check.
* DMA1_IT_GL1 - DMA1 Channel1 global flag.
* DMA1_IT_TC1 - DMA1 Channel1 transfer complete flag.
* DMA1_IT_HT1 - DMA1 Channel1 half transfer flag.
* DMA1_IT_TE1 - DMA1 Channel1 transfer error flag.
* DMA1_IT_GL2 - DMA1 Channel2 global flag.
* DMA1_IT_TC2 - DMA1 Channel2 transfer complete flag.
* DMA1_IT_HT2 - DMA1 Channel2 half transfer flag.
* DMA1_IT_TE2 - DMA1 Channel2 transfer error flag.
* DMA1_IT_GL3 - DMA1 Channel3 global flag.
* DMA1_IT_TC3 - DMA1 Channel3 transfer complete flag.
* DMA1_IT_HT3 - DMA1 Channel3 half transfer flag.
* DMA1_IT_TE3 - DMA1 Channel3 transfer error flag.
* DMA1_IT_GL4 - DMA1 Channel4 global flag.
* DMA1_IT_TC4 - DMA1 Channel4 transfer complete flag.
* DMA1_IT_HT4 - DMA1 Channel4 half transfer flag.
* DMA1_IT_TE4 - DMA1 Channel4 transfer error flag.
* DMA1_IT_GL5 - DMA1 Channel5 global flag.
* DMA1_IT_TC5 - DMA1 Channel5 transfer complete flag.
* DMA1_IT_HT5 - DMA1 Channel5 half transfer flag.
* DMA1_IT_TE5 - DMA1 Channel5 transfer error flag.
* DMA1_IT_GL6 - DMA1 Channel6 global flag.
* DMA1_IT_TC6 - DMA1 Channel6 transfer complete flag.
* DMA1_IT_HT6 - DMA1 Channel6 half transfer flag.
* DMA1_IT_TE6 - DMA1 Channel6 transfer error flag.
* DMA1_IT_GL7 - DMA1 Channel7 global flag.
* DMA1_IT_TC7 - DMA1 Channel7 transfer complete flag.
* DMA1_IT_HT7 - DMA1 Channel7 half transfer flag.
* DMA1_IT_TE7 - DMA1 Channel7 transfer error flag.
*
* @return none
*/
void DMA_ClearITPendingBit(uint32_t DMAy_IT)
{
DMA1->INTFCR = DMAy_IT;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_exti.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the EXTI firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_exti.h>
/* No interrupt selected */
#define EXTI_LINENONE ((uint32_t)0x00000)
/*********************************************************************
* @fn EXTI_DeInit
*
* @brief Deinitializes the EXTI peripheral registers to their default
* reset values.
*
* @return none.
*/
void EXTI_DeInit(void)
{
EXTI->INTENR = 0x00000000;
EXTI->EVENR = 0x00000000;
EXTI->RTENR = 0x00000000;
EXTI->FTENR = 0x00000000;
EXTI->INTFR = 0x000FFFFF;
}
/*********************************************************************
* @fn EXTI_Init
*
* @brief Initializes the EXTI peripheral according to the specified
* parameters in the EXTI_InitStruct.
*
* @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
*
* @return none.
*/
void EXTI_Init(EXTI_InitTypeDef *EXTI_InitStruct)
{
uint32_t tmp = 0;
tmp = (uint32_t)EXTI_BASE;
if(EXTI_InitStruct->EXTI_LineCmd != DISABLE)
{
EXTI->INTENR &= ~EXTI_InitStruct->EXTI_Line;
EXTI->EVENR &= ~EXTI_InitStruct->EXTI_Line;
tmp += EXTI_InitStruct->EXTI_Mode;
*(__IO uint32_t *)tmp |= EXTI_InitStruct->EXTI_Line;
EXTI->RTENR &= ~EXTI_InitStruct->EXTI_Line;
EXTI->FTENR &= ~EXTI_InitStruct->EXTI_Line;
if(EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
{
EXTI->RTENR |= EXTI_InitStruct->EXTI_Line;
EXTI->FTENR |= EXTI_InitStruct->EXTI_Line;
}
else
{
tmp = (uint32_t)EXTI_BASE;
tmp += EXTI_InitStruct->EXTI_Trigger;
*(__IO uint32_t *)tmp |= EXTI_InitStruct->EXTI_Line;
}
}
else
{
tmp += EXTI_InitStruct->EXTI_Mode;
*(__IO uint32_t *)tmp &= ~EXTI_InitStruct->EXTI_Line;
}
}
/*********************************************************************
* @fn EXTI_StructInit
*
* @brief Fills each EXTI_InitStruct member with its reset value.
*
* @param EXTI_InitStruct - pointer to a EXTI_InitTypeDef structure
*
* @return none.
*/
void EXTI_StructInit(EXTI_InitTypeDef *EXTI_InitStruct)
{
EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStruct->EXTI_LineCmd = DISABLE;
}
/*********************************************************************
* @fn EXTI_GenerateSWInterrupt
*
* @brief Generates a Software interrupt.
*
* @param EXTI_Line - specifies the EXTI lines to be enabled or disabled.
*
* @return none.
*/
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
{
EXTI->SWIEVR |= EXTI_Line;
}
/*********************************************************************
* @fn EXTI_GetFlagStatus
*
* @brief Checks whether the specified EXTI line flag is set or not.
*
* @param EXTI_Line - specifies the EXTI lines to be enabled or disabled.
*
* @return The new state of EXTI_Line (SET or RESET).
*/
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
{
FlagStatus bitstatus = RESET;
if((EXTI->INTFR & EXTI_Line) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn EXTI_ClearFlag
*
* @brief Clears the EXTI's line pending flags.
*
* @param EXTI_Line - specifies the EXTI lines to be enabled or disabled.
*
* @return None
*/
void EXTI_ClearFlag(uint32_t EXTI_Line)
{
EXTI->INTFR = EXTI_Line;
}
/*********************************************************************
* @fn EXTI_GetITStatus
*
* @brief Checks whether the specified EXTI line is asserted or not.
*
* @param EXTI_Line - specifies the EXTI lines to be enabled or disabled.
*
* @return The new state of EXTI_Line (SET or RESET).
*/
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
{
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
enablestatus = EXTI->INTENR & EXTI_Line;
if(((EXTI->INTFR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn EXTI_ClearITPendingBit
*
* @brief Clears the EXTI's line pending bits.
*
* @param EXTI_Line - specifies the EXTI lines to be enabled or disabled.
*
* @return none
*/
void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
{
EXTI->INTFR = EXTI_Line;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_gpio.c
* Author : WCH
* Version : V1.0.0
* Date : 2024/01/09
* Description : This file provides all the GPIO firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_gpio.h>
#include <ch32v00x_rcc.h>
/* MASK */
#define LSB_MASK ((uint16_t)0xFFFF)
#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
#define DBGAFR_SDI_MASK ((uint32_t)0xF8FFFFFF)
#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
/*********************************************************************
* @fn GPIO_DeInit
*
* @brief Deinitializes the GPIOx peripheral registers to their default
* reset values.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
*
* @return none
*/
void GPIO_DeInit(GPIO_TypeDef *GPIOx)
{
if(GPIOx == GPIOA)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
}
else if(GPIOx == GPIOC)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
}
else if(GPIOx == GPIOD)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
}
}
/*********************************************************************
* @fn GPIO_AFIODeInit
*
* @brief Deinitializes the Alternate Functions (remap, event control
* and EXTI configuration) registers to their default reset values.
*
* @return none
*/
void GPIO_AFIODeInit(void)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
}
/*********************************************************************
* @fn GPIO_Init
*
* @brief GPIOx - where x can be (A..D) to select the GPIO peripheral.
*
* @param GPIO_InitStruct - pointer to a GPIO_InitTypeDef structure that
* contains the configuration information for the specified GPIO peripheral.
*
* @return none
*/
void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_InitStruct)
{
uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
uint32_t tmpreg = 0x00, pinmask = 0x00;
currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
if((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
{
currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
}
if(((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
{
tmpreg = GPIOx->CFGLR;
for(pinpos = 0x00; pinpos < 0x08; pinpos++)
{
pos = ((uint32_t)0x01) << pinpos;
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
if(currentpin == pos)
{
pos = pinpos << 2;
pinmask = ((uint32_t)0x0F) << pos;
tmpreg &= ~pinmask;
tmpreg |= (currentmode << pos);
if(GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
{
GPIOx->BCR = (((uint32_t)0x01) << pinpos);
}
else
{
if(GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
{
GPIOx->BSHR = (((uint32_t)0x01) << pinpos);
}
}
}
}
GPIOx->CFGLR = tmpreg;
}
}
/*********************************************************************
* @fn GPIO_StructInit
*
* @brief Fills each GPIO_InitStruct member with its default
*
* @param GPIO_InitStruct - pointer to a GPIO_InitTypeDef structure
* which will be initialized.
*
* @return none
*/
void GPIO_StructInit(GPIO_InitTypeDef *GPIO_InitStruct)
{
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
}
/*********************************************************************
* @fn GPIO_ReadInputDataBit
*
* @brief GPIOx - where x can be (A..D) to select the GPIO peripheral.
*
* @param GPIO_Pin - specifies the port bit to read.
* This parameter can be GPIO_Pin_x where x can be (0..7).
*
* @return The input port pin value.
*/
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
uint8_t bitstatus = 0x00;
if((GPIOx->INDR & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
else
{
bitstatus = (uint8_t)Bit_RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn GPIO_ReadInputData
*
* @brief Reads the specified GPIO input data port.
*
* @param GPIOx: where x can be (A..D) to select the GPIO peripheral.
*
* @return The input port pin value.
*/
uint16_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx)
{
return ((uint16_t)GPIOx->INDR);
}
/*********************************************************************
* @fn GPIO_ReadOutputDataBit
*
* @brief Reads the specified output data port bit.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
* GPIO_Pin - specifies the port bit to read.
* This parameter can be GPIO_Pin_x where x can be (0..7).
*
* @return none
*/
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
uint8_t bitstatus = 0x00;
if((GPIOx->OUTDR & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
else
{
bitstatus = (uint8_t)Bit_RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn GPIO_ReadOutputData
*
* @brief Reads the specified GPIO output data port.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
*
* @return GPIO output port pin value.
*/
uint16_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx)
{
return ((uint16_t)GPIOx->OUTDR);
}
/*********************************************************************
* @fn GPIO_SetBits
*
* @brief Sets the selected data port bits.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
* GPIO_Pin - specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..7).
*
* @return none
*/
void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
GPIOx->BSHR = GPIO_Pin;
}
/*********************************************************************
* @fn GPIO_ResetBits
*
* @brief Clears the selected data port bits.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
* GPIO_Pin - specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..7).
*
* @return none
*/
void GPIO_ResetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
GPIOx->BCR = GPIO_Pin;
}
/*********************************************************************
* @fn GPIO_WriteBit
*
* @brief Sets or clears the selected data port bit.
*
* @param GPIO_Pin - specifies the port bit to be written.
* This parameter can be one of GPIO_Pin_x where x can be (0..7).
* BitVal - specifies the value to be written to the selected bit.
* Bit_RESET - to clear the port pin.
* Bit_SET - to set the port pin.
*
* @return none
*/
void GPIO_WriteBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
{
if(BitVal != Bit_RESET)
{
GPIOx->BSHR = GPIO_Pin;
}
else
{
GPIOx->BCR = GPIO_Pin;
}
}
/*********************************************************************
* @fn GPIO_Write
*
* @brief Writes data to the specified GPIO data port.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
* PortVal - specifies the value to be written to the port output data register.
*
* @return none
*/
void GPIO_Write(GPIO_TypeDef *GPIOx, uint16_t PortVal)
{
GPIOx->OUTDR = PortVal;
}
/*********************************************************************
* @fn GPIO_PinLockConfig
*
* @brief Locks GPIO Pins configuration registers.
*
* @param GPIOx - where x can be (A..D) to select the GPIO peripheral.
* GPIO_Pin - specifies the port bit to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..7).
*
* @return none
*/
void GPIO_PinLockConfig(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
uint32_t tmp = 0x00010000;
tmp |= GPIO_Pin;
GPIOx->LCKR = tmp;
GPIOx->LCKR = GPIO_Pin;
GPIOx->LCKR = tmp;
tmp = GPIOx->LCKR;
tmp = GPIOx->LCKR;
}
/*********************************************************************
* @fn GPIO_PinRemapConfig
*
* @brief Changes the mapping of the specified pin.
*
* @param GPIO_Remap - selects the pin to remap.
* GPIO_Remap_SPI1 - SPI1 Alternate Function mapping
* GPIO_PartialRemap_I2C1 - I2C1 Partial Alternate Function mapping
* GPIO_FullRemap_I2C1 - I2C1 Full Alternate Function mapping
* GPIO_PartialRemap1_USART1 - USART1 Partial1 Alternate Function mapping
* GPIO_PartialRemap2_USART1 - USART1 Partial2 Alternate Function mapping
* GPIO_FullRemap_USART1 - USART1 Full Alternate Function mapping
* GPIO_PartialRemap1_TIM1 - TIM1 Partial1 Alternate Function mapping
* GPIO_PartialRemap2_TIM1 - TIM1 Partial2 Alternate Function mapping
* GPIO_FullRemap_TIM1 - TIM1 Full Alternate Function mapping
* GPIO_PartialRemap1_TIM2 - TIM2 Partial1 Alternate Function mapping
* GPIO_PartialRemap2_TIM2 - TIM2 Partial2 Alternate Function mapping
* GPIO_FullRemap_TIM2 - TIM2 Full Alternate Function mapping
* GPIO_Remap_PA1_2 - PA1_2 Alternate Function mapping
* GPIO_Remap_ADC1_ETRGINJ - ADC1 External Trigger Injected Conversion remapping
* GPIO_Remap_ADC1_ETRGREG - ADC1 External Trigger Regular Conversion remapping
* GPIO_Remap_LSI_CAL - LSI calibration Alternate Function mapping
* GPIO_Remap_SDI_Disable - SDI Disabled
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
{
uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
tmpreg = AFIO->PCFR1;
tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
tmp = GPIO_Remap & LSB_MASK;
if((GPIO_Remap & 0x10000000) == 0x10000000)
{
tmpreg &= ~((1<<1) | (1<<22));
tmpreg |= ~DBGAFR_SDI_MASK;
if(NewState != DISABLE)
{
tmpreg |= (GPIO_Remap & 0xEFFFFFFF);
}
}
else if((GPIO_Remap & 0x80000000) == 0x80000000)
{
tmpreg &= ~((1<<2) | (1<<21));
tmpreg |= ~DBGAFR_SDI_MASK;
if(NewState != DISABLE)
{
tmpreg |= (GPIO_Remap & 0x7FFFFFFF);
}
}
else if((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))/* SDI */
{
tmpreg &= DBGAFR_SDI_MASK;
AFIO->PCFR1 &= DBGAFR_SDI_MASK;
if(NewState != DISABLE)
{
tmpreg |= (tmp << ((GPIO_Remap >> 0x15) * 0x10));
}
}
else if((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)/* [15:0] 2bit */
{
tmp1 = ((uint32_t)0x03) << tmpmask;
tmpreg &= ~tmp1;
tmpreg |= ~DBGAFR_SDI_MASK;
if(NewState != DISABLE)
{
tmpreg |= (tmp << ((GPIO_Remap >> 0x15) * 0x10));
}
}
else/* [31:0] 1bit */
{
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15) * 0x10));
tmpreg |= ~DBGAFR_SDI_MASK;
if(NewState != DISABLE)
{
tmpreg |= (tmp << ((GPIO_Remap >> 0x15) * 0x10));
}
}
AFIO->PCFR1 = tmpreg;
}
/*********************************************************************
* @fn GPIO_EXTILineConfig
*
* @brief Selects the GPIO pin used as EXTI Line.
*
* @param GPIO_PortSource - selects the GPIO port to be used as source for EXTI lines.
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..D).
* GPIO_PinSource - specifies the EXTI line to be configured.
* This parameter can be GPIO_PinSourcex where x can be (0..7).
*
* @return none
*/
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
{
uint32_t tmp = 0x00;
tmp = ((uint32_t)(3<<(GPIO_PinSource<<1)));
AFIO->EXTICR &= ~tmp;
AFIO->EXTICR |= ((uint32_t)(GPIO_PortSource<<(GPIO_PinSource<<1)));
}
/*********************************************************************
* @fn GPIO_IPD_Unused
*
* @brief Configure unused GPIO as input pull-up.
*
* @param none
*
* @return none
*/
void GPIO_IPD_Unused(void)
{
GPIO_InitTypeDef GPIO_InitStructure = {0};
uint32_t chip = 0;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC, ENABLE);
chip = *( uint32_t * )0x1FFFF7C4 & (~0x000000F0);
switch(chip)
{
case 0x00320500: //CH32V003A4M6
{
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_2\
|GPIO_Pin_3;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOC, &GPIO_InitStructure);
break;
}
case 0x00330500: //CH32V003J4M6
{
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_2|GPIO_Pin_3\
|GPIO_Pin_7;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_3\
|GPIO_Pin_5|GPIO_Pin_6\
|GPIO_Pin_7;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOC, &GPIO_InitStructure);
break;
}
default:
{
break;
}
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_i2c.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the I2C firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_i2c.h>
#include <ch32v00x_rcc.h>
/* I2C SPE mask */
#define CTLR1_PE_Set ((uint16_t)0x0001)
#define CTLR1_PE_Reset ((uint16_t)0xFFFE)
/* I2C START mask */
#define CTLR1_START_Set ((uint16_t)0x0100)
#define CTLR1_START_Reset ((uint16_t)0xFEFF)
/* I2C STOP mask */
#define CTLR1_STOP_Set ((uint16_t)0x0200)
#define CTLR1_STOP_Reset ((uint16_t)0xFDFF)
/* I2C ACK mask */
#define CTLR1_ACK_Set ((uint16_t)0x0400)
#define CTLR1_ACK_Reset ((uint16_t)0xFBFF)
/* I2C ENGC mask */
#define CTLR1_ENGC_Set ((uint16_t)0x0040)
#define CTLR1_ENGC_Reset ((uint16_t)0xFFBF)
/* I2C SWRST mask */
#define CTLR1_SWRST_Set ((uint16_t)0x8000)
#define CTLR1_SWRST_Reset ((uint16_t)0x7FFF)
/* I2C PEC mask */
#define CTLR1_PEC_Set ((uint16_t)0x1000)
#define CTLR1_PEC_Reset ((uint16_t)0xEFFF)
/* I2C ENPEC mask */
#define CTLR1_ENPEC_Set ((uint16_t)0x0020)
#define CTLR1_ENPEC_Reset ((uint16_t)0xFFDF)
/* I2C ENARP mask */
#define CTLR1_ENARP_Set ((uint16_t)0x0010)
#define CTLR1_ENARP_Reset ((uint16_t)0xFFEF)
/* I2C NOSTRETCH mask */
#define CTLR1_NOSTRETCH_Set ((uint16_t)0x0080)
#define CTLR1_NOSTRETCH_Reset ((uint16_t)0xFF7F)
/* I2C registers Masks */
#define CTLR1_CLEAR_Mask ((uint16_t)0xFBF5)
/* I2C DMAEN mask */
#define CTLR2_DMAEN_Set ((uint16_t)0x0800)
#define CTLR2_DMAEN_Reset ((uint16_t)0xF7FF)
/* I2C LAST mask */
#define CTLR2_LAST_Set ((uint16_t)0x1000)
#define CTLR2_LAST_Reset ((uint16_t)0xEFFF)
/* I2C FREQ mask */
#define CTLR2_FREQ_Reset ((uint16_t)0xFFC0)
/* I2C ADD0 mask */
#define OADDR1_ADD0_Set ((uint16_t)0x0001)
#define OADDR1_ADD0_Reset ((uint16_t)0xFFFE)
/* I2C ENDUAL mask */
#define OADDR2_ENDUAL_Set ((uint16_t)0x0001)
#define OADDR2_ENDUAL_Reset ((uint16_t)0xFFFE)
/* I2C ADD2 mask */
#define OADDR2_ADD2_Reset ((uint16_t)0xFF01)
/* I2C F/S mask */
#define CKCFGR_FS_Set ((uint16_t)0x8000)
/* I2C CCR mask */
#define CKCFGR_CCR_Set ((uint16_t)0x0FFF)
/* I2C FLAG mask */
#define FLAG_Mask ((uint32_t)0x00FFFFFF)
/* I2C Interrupt Enable mask */
#define ITEN_Mask ((uint32_t)0x07000000)
/*********************************************************************
* @fn I2C_DeInit
*
* @brief Deinitializes the I2Cx peripheral registers to their default
* reset values.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
*
* @return none
*/
void I2C_DeInit(I2C_TypeDef *I2Cx)
{
if(I2Cx == I2C1)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
}
}
/*********************************************************************
* @fn I2C_Init
*
* @brief Initializes the I2Cx peripheral according to the specified
* parameters in the I2C_InitStruct.
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_InitStruct - pointer to a I2C_InitTypeDef structure that
* contains the configuration information for the specified I2C peripheral.
*
* @return none
*/
void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitTypeDef *I2C_InitStruct)
{
uint16_t tmpreg = 0, freqrange = 0;
uint16_t result = 0x04;
uint32_t pclk1 = 8000000;
RCC_ClocksTypeDef rcc_clocks;
tmpreg = I2Cx->CTLR2;
tmpreg &= CTLR2_FREQ_Reset;
RCC_GetClocksFreq(&rcc_clocks);
pclk1 = rcc_clocks.PCLK1_Frequency;
freqrange = (uint16_t)(pclk1 / 1000000);
tmpreg |= freqrange;
I2Cx->CTLR2 = tmpreg;
I2Cx->CTLR1 &= CTLR1_PE_Reset;
tmpreg = 0;
if(I2C_InitStruct->I2C_ClockSpeed <= 100000)
{
result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
if(result < 0x04)
{
result = 0x04;
}
tmpreg |= result;
}
else
{
if(I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
{
result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
}
else
{
result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
result |= I2C_DutyCycle_16_9;
}
if((result & CKCFGR_CCR_Set) == 0)
{
result |= (uint16_t)0x0001;
}
tmpreg |= (uint16_t)(result | CKCFGR_FS_Set);
}
I2Cx->CKCFGR = tmpreg;
I2Cx->CTLR1 |= CTLR1_PE_Set;
tmpreg = I2Cx->CTLR1;
tmpreg &= CTLR1_CLEAR_Mask;
tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
I2Cx->CTLR1 = tmpreg;
I2Cx->OADDR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
}
/*********************************************************************
* @fn I2C_StructInit
*
* @brief Fills each I2C_InitStruct member with its default value.
*
* @param I2C_InitStruct - pointer to an I2C_InitTypeDef structure which
* will be initialized.
*
* @return none
*/
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct)
{
I2C_InitStruct->I2C_ClockSpeed = 5000;
I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
I2C_InitStruct->I2C_OwnAddress1 = 0;
I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
}
/*********************************************************************
* @fn I2C_Cmd
*
* @brief Enables or disables the specified I2C peripheral.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_Cmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_PE_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_PE_Reset;
}
}
/*********************************************************************
* @fn I2C_DMACmd
*
* @brief Enables or disables the specified I2C DMA requests.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_DMACmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR2 |= CTLR2_DMAEN_Set;
}
else
{
I2Cx->CTLR2 &= CTLR2_DMAEN_Reset;
}
}
/*********************************************************************
* @fn I2C_DMALastTransferCmd
*
* @brief Specifies if the next DMA transfer will be the last one.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_DMALastTransferCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR2 |= CTLR2_LAST_Set;
}
else
{
I2Cx->CTLR2 &= CTLR2_LAST_Reset;
}
}
/*********************************************************************
* @fn I2C_GenerateSTART
*
* @brief Generates I2Cx communication START condition.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_GenerateSTART(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_START_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_START_Reset;
}
}
/*********************************************************************
* @fn I2C_GenerateSTOP
*
* @brief Generates I2Cx communication STOP condition.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_GenerateSTOP(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_STOP_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_STOP_Reset;
}
}
/*********************************************************************
* @fn I2C_AcknowledgeConfig
*
* @brief Enables or disables the specified I2C acknowledge feature.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_ACK_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_ACK_Reset;
}
}
/*********************************************************************
* @fn I2C_OwnAddress2Config
*
* @brief Configures the specified I2C own address2.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* Address - specifies the 7bit I2C own address2.
*
* @return none
*/
void I2C_OwnAddress2Config(I2C_TypeDef *I2Cx, uint8_t Address)
{
uint16_t tmpreg = 0;
tmpreg = I2Cx->OADDR2;
tmpreg &= OADDR2_ADD2_Reset;
tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE);
I2Cx->OADDR2 = tmpreg;
}
/*********************************************************************
* @fn I2C_DualAddressCmd
*
* @brief Enables or disables the specified I2C dual addressing mode.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_DualAddressCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->OADDR2 |= OADDR2_ENDUAL_Set;
}
else
{
I2Cx->OADDR2 &= OADDR2_ENDUAL_Reset;
}
}
/*********************************************************************
* @fn I2C_GeneralCallCmd
*
* @brief Enables or disables the specified I2C general call feature.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_ENGC_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_ENGC_Reset;
}
}
/*********************************************************************
* @fn I2C_ITConfig
*
* @brief Enables or disables the specified I2C interrupts.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_IT - specifies the I2C interrupts sources to be enabled or disabled.
* I2C_IT_BUF - Buffer interrupt mask.
* I2C_IT_EVT - Event interrupt mask.
* I2C_IT_ERR - Error interrupt mask.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_ITConfig(I2C_TypeDef *I2Cx, uint16_t I2C_IT, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR2 |= I2C_IT;
}
else
{
I2Cx->CTLR2 &= (uint16_t)~I2C_IT;
}
}
/*********************************************************************
* @fn I2C_SendData
*
* @brief Sends a data byte through the I2Cx peripheral.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* Data - Byte to be transmitted.
*
* @return none
*/
void I2C_SendData(I2C_TypeDef *I2Cx, uint8_t Data)
{
I2Cx->DATAR = Data;
}
/*********************************************************************
* @fn I2C_ReceiveData
*
* @brief Returns the most recent received data by the I2Cx peripheral.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
*
* @return The value of the received data.
*/
uint8_t I2C_ReceiveData(I2C_TypeDef *I2Cx)
{
return (uint8_t)I2Cx->DATAR;
}
/*********************************************************************
* @fn I2C_Send7bitAddress
*
* @brief Transmits the address byte to select the slave device.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* Address - specifies the slave address which will be transmitted.
* I2C_Direction - specifies whether the I2C device will be a
* Transmitter or a Receiver.
* I2C_Direction_Transmitter - Transmitter mode.
* I2C_Direction_Receiver - Receiver mode.
*
* @return none
*/
void I2C_Send7bitAddress(I2C_TypeDef *I2Cx, uint8_t Address, uint8_t I2C_Direction)
{
if(I2C_Direction != I2C_Direction_Transmitter)
{
Address |= OADDR1_ADD0_Set;
}
else
{
Address &= OADDR1_ADD0_Reset;
}
I2Cx->DATAR = Address;
}
/*********************************************************************
* @fn I2C_ReadRegister
*
* @brief Reads the specified I2C register and returns its value.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_Register - specifies the register to read.
* I2C_Register_CTLR1.
* I2C_Register_CTLR2.
* I2C_Register_OADDR1.
* I2C_Register_OADDR2.
* I2C_Register_DATAR.
* I2C_Register_STAR1.
* I2C_Register_STAR2.
* I2C_Register_CKCFGR.
*
* @return none
*/
uint16_t I2C_ReadRegister(I2C_TypeDef *I2Cx, uint8_t I2C_Register)
{
__IO uint32_t tmp = 0;
tmp = (uint32_t)I2Cx;
tmp += I2C_Register;
return (*(__IO uint16_t *)tmp);
}
/*********************************************************************
* @fn I2C_SoftwareResetCmd
*
* @brief Enables or disables the specified I2C software reset.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_SoftwareResetCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_SWRST_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_SWRST_Reset;
}
}
/*********************************************************************
* @fn I2C_NACKPositionConfig
*
* @brief Selects the specified I2C NACK position in master receiver mode.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_NACKPosition - specifies the NACK position.
* I2C_NACKPosition_Next - indicates that the next byte will be
* the last received byte.
* I2C_NACKPosition_Current - indicates that current byte is the
* last received byte.
* Note-
* This function configures the same bit (POS) as I2C_PECPositionConfig()
* but is intended to be used in I2C mode while I2C_PECPositionConfig()
* is intended to used in SMBUS mode.
* @return none
*/
void I2C_NACKPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_NACKPosition)
{
if(I2C_NACKPosition == I2C_NACKPosition_Next)
{
I2Cx->CTLR1 |= I2C_NACKPosition_Next;
}
else
{
I2Cx->CTLR1 &= I2C_NACKPosition_Current;
}
}
/*********************************************************************
* @fn I2C_TransmitPEC
*
* @brief Enables or disables the specified I2C PEC transfer.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_TransmitPEC(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_PEC_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_PEC_Reset;
}
}
/*********************************************************************
* @fn I2C_PECPositionConfig
*
* @brief Selects the specified I2C PEC position.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_PECPosition - specifies the PEC position.
* I2C_PECPosition_Next - indicates that the next byte is PEC.
* I2C_PECPosition_Current - indicates that current byte is PEC.
*
* @return none
*/
void I2C_PECPositionConfig(I2C_TypeDef *I2Cx, uint16_t I2C_PECPosition)
{
if(I2C_PECPosition == I2C_PECPosition_Next)
{
I2Cx->CTLR1 |= I2C_PECPosition_Next;
}
else
{
I2Cx->CTLR1 &= I2C_PECPosition_Current;
}
}
/*********************************************************************
* @fn I2C_CalculatePEC
*
* @brief Enables or disables the PEC value calculation of the transferred bytes.
*
* @param I2Cx- where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_CalculatePEC(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_ENPEC_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_ENPEC_Reset;
}
}
/*********************************************************************
* @fn I2C_GetPEC
*
* @brief Returns the PEC value for the specified I2C.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
*
* @return The PEC value.
*/
uint8_t I2C_GetPEC(I2C_TypeDef *I2Cx)
{
return ((I2Cx->STAR2) >> 8);
}
/*********************************************************************
* @fn I2C_ARPCmd
*
* @brief Enables or disables the specified I2C ARP.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return The PEC value.
*/
void I2C_ARPCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CTLR1 |= CTLR1_ENARP_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_ENARP_Reset;
}
}
/*********************************************************************
* @fn I2C_StretchClockCmd
*
* @brief Enables or disables the specified I2C Clock stretching.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void I2C_StretchClockCmd(I2C_TypeDef *I2Cx, FunctionalState NewState)
{
if(NewState == DISABLE)
{
I2Cx->CTLR1 |= CTLR1_NOSTRETCH_Set;
}
else
{
I2Cx->CTLR1 &= CTLR1_NOSTRETCH_Reset;
}
}
/*********************************************************************
* @fn I2C_FastModeDutyCycleConfig
*
* @brief Selects the specified I2C fast mode duty cycle.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_DutyCycle - specifies the fast mode duty cycle.
* I2C_DutyCycle_2 - I2C fast mode Tlow/Thigh = 2.
* I2C_DutyCycle_16_9 - I2C fast mode Tlow/Thigh = 16/9.
*
* @return none
*/
void I2C_FastModeDutyCycleConfig(I2C_TypeDef *I2Cx, uint16_t I2C_DutyCycle)
{
if(I2C_DutyCycle != I2C_DutyCycle_16_9)
{
I2Cx->CKCFGR &= I2C_DutyCycle_2;
}
else
{
I2Cx->CKCFGR |= I2C_DutyCycle_16_9;
}
}
/*********************************************************************
* @fn I2C_CheckEvent
*
* @brief Checks whether the last I2Cx Event is equal to the one passed
* as parameter.
*
* @param I2Cx- where x can be 1 to select the I2C peripheral.
* I2C_EVENT: specifies the event to be checked.
* I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED - EVT1.
* I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED - EVT1.
* I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED - EVT1.
* I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED - EVT1.
* I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED - EVT1.
* I2C_EVENT_SLAVE_BYTE_RECEIVED - EVT2.
* (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) - EVT2.
* (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) - EVT2.
* I2C_EVENT_SLAVE_BYTE_TRANSMITTED - EVT3.
* (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) - EVT3.
* (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) - EVT3.
* I2C_EVENT_SLAVE_ACK_FAILURE - EVT3_2.
* I2C_EVENT_SLAVE_STOP_DETECTED - EVT4.
* I2C_EVENT_MASTER_MODE_SELECT - EVT5.
* I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED - EVT6.
* I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED - EVT6.
* I2C_EVENT_MASTER_BYTE_RECEIVED - EVT7.
* I2C_EVENT_MASTER_BYTE_TRANSMITTING - EVT8.
* I2C_EVENT_MASTER_BYTE_TRANSMITTED - EVT8_2.
* I2C_EVENT_MASTER_MODE_ADDRESS10 - EVT9.
*
* @return ErrorStatus - READY or NoREADY.
*/
ErrorStatus I2C_CheckEvent(I2C_TypeDef *I2Cx, uint32_t I2C_EVENT)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
ErrorStatus status = NoREADY;
flag1 = I2Cx->STAR1;
flag2 = I2Cx->STAR2;
flag2 = flag2 << 16;
lastevent = (flag1 | flag2) & FLAG_Mask;
if((lastevent & I2C_EVENT) == I2C_EVENT)
{
status = READY;
}
else
{
status = NoREADY;
}
return status;
}
/*********************************************************************
* @fn I2C_GetLastEvent
*
* @brief Returns the last I2Cx Event.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
*
* @return none
*/
uint32_t I2C_GetLastEvent(I2C_TypeDef *I2Cx)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
flag1 = I2Cx->STAR1;
flag2 = I2Cx->STAR2;
flag2 = flag2 << 16;
lastevent = (flag1 | flag2) & FLAG_Mask;
return lastevent;
}
/*********************************************************************
* @fn I2C_GetFlagStatus
*
* @brief Checks whether the last I2Cx Event is equal to the one passed
* as parameter.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_FLAG - specifies the flag to check.
* I2C_FLAG_DUALF - Dual flag (Slave mode).
* I2C_FLAG_GENCALL - General call header flag (Slave mode).
* I2C_FLAG_TRA - Transmitter/Receiver flag.
* I2C_FLAG_BUSY - Bus busy flag.
* I2C_FLAG_MSL - Master/Slave flag.
* I2C_FLAG_PECERR - PEC error in reception flag.
* I2C_FLAG_OVR - Overrun/Underrun flag (Slave mode).
* I2C_FLAG_AF - Acknowledge failure flag.
* I2C_FLAG_ARLO - Arbitration lost flag (Master mode).
* I2C_FLAG_BERR - Bus error flag.
* I2C_FLAG_TXE - Data register empty flag (Transmitter).
* I2C_FLAG_RXNE- Data register not empty (Receiver) flag.
* I2C_FLAG_STOPF - Stop detection flag (Slave mode).
* I2C_FLAG_ADD10 - 10-bit header sent flag (Master mode).
* I2C_FLAG_BTF - Byte transfer finished flag.
* I2C_FLAG_ADDR - Address sent flag (Master mode) "ADSL"
* Address matched flag (Slave mode)"ENDA".
* I2C_FLAG_SB - Start bit flag (Master mode).
*
* @return FlagStatus - SET or RESET.
*/
FlagStatus I2C_GetFlagStatus(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
{
FlagStatus bitstatus = RESET;
__IO uint32_t i2creg = 0, i2cxbase = 0;
i2cxbase = (uint32_t)I2Cx;
i2creg = I2C_FLAG >> 28;
I2C_FLAG &= FLAG_Mask;
if(i2creg != 0)
{
i2cxbase += 0x14;
}
else
{
I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
i2cxbase += 0x18;
}
if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn I2C_ClearFlag
*
* @brief Clears the I2Cx's pending flags.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_FLAG - specifies the flag to clear.
* I2C_FLAG_SMBALERT - SMBus Alert flag.
* I2C_FLAG_TIMEOUT - Timeout or Tlow error flag.
* I2C_FLAG_PECERR - PEC error in reception flag.
* I2C_FLAG_OVR - Overrun/Underrun flag (Slave mode).
* I2C_FLAG_AF - Acknowledge failure flag.
* I2C_FLAG_ARLO - Arbitration lost flag (Master mode).
* I2C_FLAG_BERR - Bus error flag.
* Note-
* - STOPF (STOP detection) is cleared by software sequence: a read operation
* to I2C_STAR1 register (I2C_GetFlagStatus()) followed by a write operation
* to I2C_CTLR1 register (I2C_Cmd() to re-enable the I2C peripheral).
* - ADD10 (10-bit header sent) is cleared by software sequence: a read
* operation to I2C_SATR1 (I2C_GetFlagStatus()) followed by writing the
* second byte of the address in DATAR register.
* - BTF (Byte Transfer Finished) is cleared by software sequence: a read
* operation to I2C_SATR1 register (I2C_GetFlagStatus()) followed by a
* read/write to I2C_DATAR register (I2C_SendData()).
* - ADDR (Address sent) is cleared by software sequence: a read operation to
* I2C_SATR1 register (I2C_GetFlagStatus()) followed by a read operation to
* I2C_SATR2 register ((void)(I2Cx->SR2)).
* - SB (Start Bit) is cleared software sequence: a read operation to I2C_STAR1
* register (I2C_GetFlagStatus()) followed by a write operation to I2C_DATAR
* register (I2C_SendData()).
* @return none
*/
void I2C_ClearFlag(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
{
uint32_t flagpos = 0;
flagpos = I2C_FLAG & FLAG_Mask;
I2Cx->STAR1 = (uint16_t)~flagpos;
}
/*********************************************************************
* @fn I2C_GetITStatus
*
* @brief Checks whether the specified I2C interrupt has occurred or not.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* II2C_IT - specifies the interrupt source to check.
* I2C_IT_PECERR - PEC error in reception flag.
* I2C_IT_OVR - Overrun/Underrun flag (Slave mode).
* I2C_IT_AF - Acknowledge failure flag.
* I2C_IT_ARLO - Arbitration lost flag (Master mode).
* I2C_IT_BERR - Bus error flag.
* I2C_IT_TXE - Data register empty flag (Transmitter).
* I2C_IT_RXNE - Data register not empty (Receiver) flag.
* I2C_IT_STOPF - Stop detection flag (Slave mode).
* I2C_IT_ADD10 - 10-bit header sent flag (Master mode).
* I2C_IT_BTF - Byte transfer finished flag.
* I2C_IT_ADDR - Address sent flag (Master mode) "ADSL" Address matched
* flag (Slave mode)"ENDAD".
* I2C_IT_SB - Start bit flag (Master mode).
*
* @return none
*/
ITStatus I2C_GetITStatus(I2C_TypeDef *I2Cx, uint32_t I2C_IT)
{
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CTLR2));
I2C_IT &= FLAG_Mask;
if(((I2Cx->STAR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn I2C_ClearITPendingBit
*
* @brief Clears the I2Cx interrupt pending bits.
*
* @param I2Cx - where x can be 1 to select the I2C peripheral.
* I2C_IT - specifies the interrupt pending bit to clear.
* I2C_IT_PECERR - PEC error in reception interrupt.
* I2C_IT_OVR - Overrun/Underrun interrupt (Slave mode).
* I2C_IT_AF - Acknowledge failure interrupt.
* I2C_IT_ARLO - Arbitration lost interrupt (Master mode).
* I2C_IT_BERR - Bus error interrupt.
* Note-
* - STOPF (STOP detection) is cleared by software sequence: a read operation
* to I2C_STAR1 register (I2C_GetITStatus()) followed by a write operation to
* I2C_CTLR1 register (I2C_Cmd() to re-enable the I2C peripheral).
* - ADD10 (10-bit header sent) is cleared by software sequence: a read
* operation to I2C_STAR1 (I2C_GetITStatus()) followed by writing the second
* byte of the address in I2C_DATAR register.
* - BTF (Byte Transfer Finished) is cleared by software sequence: a read
* operation to I2C_STAR1 register (I2C_GetITStatus()) followed by a
* read/write to I2C_DATAR register (I2C_SendData()).
* - ADDR (Address sent) is cleared by software sequence: a read operation to
* I2C_STAR1 register (I2C_GetITStatus()) followed by a read operation to
* I2C_STAR2 register ((void)(I2Cx->SR2)).
* - SB (Start Bit) is cleared by software sequence: a read operation to
* I2C_STAR1 register (I2C_GetITStatus()) followed by a write operation to
* I2C_DATAR register (I2C_SendData()).
*
* @return none
*/
void I2C_ClearITPendingBit(I2C_TypeDef *I2Cx, uint32_t I2C_IT)
{
uint32_t flagpos = 0;
flagpos = I2C_IT & FLAG_Mask;
I2Cx->STAR1 = (uint16_t)~flagpos;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_iwdg.c
* Author : WCH
* Version : V1.0.0
* Date : 2023/12/25
* Description : This file provides all the IWDG firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_iwdg.h>
/* CTLR register bit mask */
#define CTLR_KEY_Reload ((uint16_t)0xAAAA)
#define CTLR_KEY_Enable ((uint16_t)0xCCCC)
/*********************************************************************
* @fn IWDG_WriteAccessCmd
*
* @brief Enables or disables write access to IWDG_PSCR and IWDG_RLDR registers.
*
* @param WDG_WriteAccess - new state of write access to IWDG_PSCR and
* IWDG_RLDR registers.
* IWDG_WriteAccess_Enable - Enable write access to IWDG_PSCR and
* IWDG_RLDR registers.
* IWDG_WriteAccess_Disable - Disable write access to IWDG_PSCR
* and IWDG_RLDR registers.
*
* @return none
*/
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
{
IWDG->CTLR = IWDG_WriteAccess;
}
/*********************************************************************
* @fn IWDG_SetPrescaler
*
* @brief Sets IWDG Prescaler value.
*
* @param IWDG_Prescaler - specifies the IWDG Prescaler value.
* IWDG_Prescaler_4 - IWDG prescaler set to 4.
* IWDG_Prescaler_8 - IWDG prescaler set to 8.
* IWDG_Prescaler_16 - IWDG prescaler set to 16.
* IWDG_Prescaler_32 - IWDG prescaler set to 32.
* IWDG_Prescaler_64 - IWDG prescaler set to 64.
* IWDG_Prescaler_128 - IWDG prescaler set to 128.
* IWDG_Prescaler_256 - IWDG prescaler set to 256.
*
* @return none
*/
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
{
IWDG->PSCR = IWDG_Prescaler;
}
/*********************************************************************
* @fn IWDG_SetReload
*
* @brief Sets IWDG Reload value.
*
* @param Reload - specifies the IWDG Reload value.
* This parameter must be a number between 0 and 0x0FFF.
*
* @return none
*/
void IWDG_SetReload(uint16_t Reload)
{
IWDG->RLDR = Reload;
}
/*********************************************************************
* @fn IWDG_ReloadCounter
*
* @brief Reloads IWDG counter with value defined in the reload register.
*
* @return none
*/
void IWDG_ReloadCounter(void)
{
IWDG->CTLR = CTLR_KEY_Reload;
}
/*********************************************************************
* @fn IWDG_Enable
*
* @brief Enables IWDG (write access to IWDG_PSCR and IWDG_RLDR registers disabled).
*
* @return none
*/
void IWDG_Enable(void)
{
IWDG->CTLR = CTLR_KEY_Enable;
while ((RCC->RSTSCKR & 0x2) == RESET);
}
/*********************************************************************
* @fn IWDG_GetFlagStatus
*
* @brief Checks whether the specified IWDG flag is set or not.
*
* @param IWDG_FLAG - specifies the flag to check.
* IWDG_FLAG_PVU - Prescaler Value Update on going.
* IWDG_FLAG_RVU - Reload Value Update on going.
*
* @return none
*/
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
{
FlagStatus bitstatus = RESET;
if((IWDG->STATR & IWDG_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_misc.c
* Author : WCH
* Version : V1.0.0
* Date : 2023/12/25
* Description : This file provides all the miscellaneous firmware functions .
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_misc.h>
__IO uint32_t NVIC_Priority_Group = 0;
/*********************************************************************
* @fn NVIC_PriorityGroupConfig
*
* @brief Configures the priority grouping - pre-emption priority and subpriority.
*
* @param NVIC_PriorityGroup - specifies the priority grouping bits length.
* NVIC_PriorityGroup_0 - 0 bits for pre-emption priority
* 2 bits for subpriority
* NVIC_PriorityGroup_1 - 1 bits for pre-emption priority
* 1 bits for subpriority
*
* @return none
*/
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
{
NVIC_Priority_Group = NVIC_PriorityGroup;
}
/*********************************************************************
* @fn NVIC_Init
*
* @brief Initializes the NVIC peripheral according to the specified parameters in
* the NVIC_InitStruct.
*
* @param NVIC_InitStruct - pointer to a NVIC_InitTypeDef structure that contains the
* configuration information for the specified NVIC peripheral.
* interrupt nesting enable(CSR-0x804 bit1 = 1)
* NVIC_IRQChannelPreemptionPriority - range from 0 to 1.
* NVIC_IRQChannelSubPriority - range from 0 to 1.
*
* interrupt nesting disable(CSR-0x804 bit1 = 0)
* NVIC_IRQChannelPreemptionPriority - range is 0.
* NVIC_IRQChannelSubPriority - range from 0 to 3.
*
* @return none
*/
void NVIC_Init(NVIC_InitTypeDef *NVIC_InitStruct)
{
#if (INTSYSCR_INEST == INTSYSCR_INEST_NoEN)
if(NVIC_Priority_Group == NVIC_PriorityGroup_0)
{
NVIC_SetPriority(NVIC_InitStruct->NVIC_IRQChannel, NVIC_InitStruct->NVIC_IRQChannelSubPriority << 6);
}
#else
if(NVIC_Priority_Group == NVIC_PriorityGroup_1)
{
if(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority == 1)
{
NVIC_SetPriority(NVIC_InitStruct->NVIC_IRQChannel, (1 << 7) | (NVIC_InitStruct->NVIC_IRQChannelSubPriority << 6));
}
else if(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority == 0)
{
NVIC_SetPriority(NVIC_InitStruct->NVIC_IRQChannel, (0 << 7) | (NVIC_InitStruct->NVIC_IRQChannelSubPriority << 6));
}
}
#endif
if(NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
{
NVIC_EnableIRQ(NVIC_InitStruct->NVIC_IRQChannel);
}
else
{
NVIC_DisableIRQ(NVIC_InitStruct->NVIC_IRQChannel);
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_opa.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the OPA firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_opa.h>
/*********************************************************************
* @fn OPA_DeInit
*
* @brief Deinitializes the OPA peripheral registers to their default
* reset values.
*
* @return none
*/
void OPA_DeInit(void)
{
EXTEN->EXTEN_CTR &= ~(uint32_t)(7 << 16);
}
/*********************************************************************
* @fn OPA_Init
*
* @brief Initializes the OPA peripheral according to the specified
* parameters in the OPA_InitStruct.
*
* @param OPA_InitStruct - pointer to a OPA_InitTypeDef structure
*
* @return none
*/
void OPA_Init(OPA_InitTypeDef *OPA_InitStruct)
{
uint32_t tmp = 0;
tmp = EXTEN->EXTEN_CTR;
tmp &= ~(uint32_t)(3<<17);
tmp |= (OPA_InitStruct->PSEL << 18) | (OPA_InitStruct->NSEL << 17);
EXTEN->EXTEN_CTR = tmp;
}
/*********************************************************************
* @fn OPA_StructInit
*
* @brief Fills each OPA_StructInit member with its reset value.
*
* @param OPA_StructInit - pointer to a OPA_InitTypeDef structure
*
* @return none
*/
void OPA_StructInit(OPA_InitTypeDef *OPA_InitStruct)
{
OPA_InitStruct->PSEL = CHP0;
OPA_InitStruct->NSEL = CHN0;
}
/*********************************************************************
* @fn OPA_Cmd
*
* @brief Enables or disables the specified OPA peripheral.
*
* @param OPA_NUM - Select OPA
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void OPA_Cmd(FunctionalState NewState)
{
if(NewState == ENABLE)
{
EXTEN->EXTEN_CTR |= (uint32_t)(1 << 16);
}
else
{
EXTEN->EXTEN_CTR &= ~(uint32_t)(1 << 16);
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_pwr.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the PWR firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_pwr.h>
#include <ch32v00x_rcc.h>
/* PWR registers bit mask */
/* CTLR register bit mask */
#define CTLR_DS_MASK ((uint32_t)0xFFFFFFFD)
#define CTLR_PLS_MASK ((uint32_t)0xFFFFFF1F)
#define AWUPSC_MASK ((uint32_t)0xFFFFFFF0)
#define AWUWR_MASK ((uint32_t)0xFFFFFFC0)
/*********************************************************************
* @fn PWR_DeInit
*
* @brief Deinitializes the PWR peripheral registers to their default
* reset values.
*
* @return none
*/
void PWR_DeInit(void)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
}
/*********************************************************************
* @fn PWR_PVDCmd
*
* @brief Enables or disables the Power Voltage Detector(PVD).
*
* @param NewState - new state of the PVD(ENABLE or DISABLE).
*
* @return none
*/
void PWR_PVDCmd(FunctionalState NewState)
{
if(NewState)
{
PWR->CTLR |= (1 << 4);
}
else
{
PWR->CTLR &= ~(1 << 4);
}
}
/*********************************************************************
* @fn PWR_PVDLevelConfig
*
* @brief Configures the voltage threshold detected by the Power Voltage
* Detector(PVD).
*
* @param PWR_PVDLevel - specifies the PVD detection level
* PWR_PVDLevel_MODE0 - PVD detection level set to mode 0.
* PWR_PVDLevel_MODE1 - PVD detection level set to mode 1.
* PWR_PVDLevel_MODE2 - PVD detection level set to mode 2.
* PWR_PVDLevel_MODE3 - PVD detection level set to mode 3.
* PWR_PVDLevel_MODE4 - PVD detection level set to mode 4.
* PWR_PVDLevel_MODE5 - PVD detection level set to mode 5.
* PWR_PVDLevel_MODE6 - PVD detection level set to mode 6.
* PWR_PVDLevel_MODE7 - PVD detection level set to mode 7.
*
* @return none
*/
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
{
uint32_t tmpreg = 0;
tmpreg = PWR->CTLR;
tmpreg &= CTLR_PLS_MASK;
tmpreg |= PWR_PVDLevel;
PWR->CTLR = tmpreg;
}
/*********************************************************************
* @fn PWR_AutoWakeUpCmd
*
* @brief Enables or disables the Auto WakeUp functionality.
*
* @param NewState - new state of the Auto WakeUp functionality
* (ENABLE or DISABLE).
*
* @return none
*/
void PWR_AutoWakeUpCmd(FunctionalState NewState)
{
if(NewState)
{
PWR->AWUCSR |= (1 << 1);
}
else
{
PWR->AWUCSR &= ~(1 << 1);
}
}
/*********************************************************************
* @fn PWR_AWU_SetPrescaler
*
* @brief Sets the Auto Wake up Prescaler
*
* @param AWU_Prescaler - specifies the Auto Wake up Prescaler
* PWR_AWU_Prescaler_1 - AWU counter clock = LSI/1
* PWR_AWU_Prescaler_2 - AWU counter clock = LSI/2
* PWR_AWU_Prescaler_4 - AWU counter clock = LSI/4
* PWR_AWU_Prescaler_8 - AWU counter clock = LSI/8
* PWR_AWU_Prescaler_16 - AWU counter clock = LSI/16
* PWR_AWU_Prescaler_32 - AWU counter clock = LSI/32
* PWR_AWU_Prescaler_64 - AWU counter clock = LSI/64
* PWR_AWU_Prescaler_128 - AWU counter clock = LSI/128
* PWR_AWU_Prescaler_256 - AWU counter clock = LSI/256
* PWR_AWU_Prescaler_512 - AWU counter clock = LSI/512
* PWR_AWU_Prescaler_1024 - AWU counter clock = LSI/1024
* PWR_AWU_Prescaler_2048 - AWU counter clock = LSI/2048
* PWR_AWU_Prescaler_4096 - AWU counter clock = LSI/4096
* PWR_AWU_Prescaler_10240 - AWU counter clock = LSI/10240
* PWR_AWU_Prescaler_61440 - AWU counter clock = LSI/61440
*
* @return none
*/
void PWR_AWU_SetPrescaler(uint32_t AWU_Prescaler)
{
uint32_t tmpreg = 0;
tmpreg = PWR->AWUPSC & AWUPSC_MASK;
tmpreg |= AWU_Prescaler;
PWR->AWUPSC = tmpreg;
}
/*********************************************************************
* @fn PWR_AWU_SetWindowValue
*
* @brief Sets the WWDG window value
*
* @param WindowValue - specifies the window value to be compared to the
* downcounter,which must be lower than 0x3F
*
* @return none
*/
void PWR_AWU_SetWindowValue(uint8_t WindowValue)
{
__IO uint32_t tmpreg = 0;
tmpreg = PWR->AWUWR & AWUWR_MASK;
tmpreg |= WindowValue;
PWR->AWUWR = tmpreg;
}
/*********************************************************************
* @fn PWR_EnterSTANDBYMode
*
* @brief Enters STANDBY mode.
*
* @param PWR_STANDBYEntry - specifies if STANDBY mode in entered with WFI or WFE instruction.
* PWR_STANDBYEntry_WFI - enter STANDBY mode with WFI instruction
* PWR_STANDBYEntry_WFE - enter STANDBY mode with WFE instruction
*
* @return none
*/
void PWR_EnterSTANDBYMode(uint8_t PWR_STANDBYEntry)
{
PWR->CTLR &= CTLR_DS_MASK;
PWR->CTLR |= PWR_CTLR_PDDS;
NVIC->SCTLR |= (1 << 2);
if(PWR_STANDBYEntry == PWR_STANDBYEntry_WFI)
{
__WFI();
}
else
{
__WFE();
}
NVIC->SCTLR &= ~(1 << 2);
}
/*********************************************************************
* @fn PWR_GetFlagStatus
*
* @brief Checks whether the specified PWR flag is set or not.
*
* @param PWR_FLAG - specifies the flag to check.
* PWR_FLAG_PVDO - PVD Output
*
* @return The new state of PWR_FLAG (SET or RESET).
*/
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
{
FlagStatus bitstatus = RESET;
if((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_rcc.c
* Author : WCH
* Version : V1.0.0
* Date : 2024/03/18
* Description : This file provides all the RCC firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_rcc.h>
/* RCC registers bit address in the alias region */
#define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
/* BDCTLR Register */
#define BDCTLR_OFFSET (RCC_OFFSET + 0x20)
/* RCC registers bit mask */
/* CTLR register bit mask */
#define CTLR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF)
#define CTLR_HSEBYP_Set ((uint32_t)0x00040000)
#define CTLR_HSEON_Reset ((uint32_t)0xFFFEFFFF)
#define CTLR_HSEON_Set ((uint32_t)0x00010000)
#define CTLR_HSITRIM_Mask ((uint32_t)0xFFFFFF07)
#define CFGR0_PLL_Mask ((uint32_t)0xFFFEFFFF)
#define CFGR0_PLLMull_Mask ((uint32_t)0x003C0000)
#define CFGR0_PLLSRC_Mask ((uint32_t)0x00010000)
#define CFGR0_PLLXTPRE_Mask ((uint32_t)0x00020000)
#define CFGR0_SWS_Mask ((uint32_t)0x0000000C)
#define CFGR0_SW_Mask ((uint32_t)0xFFFFFFFC)
#define CFGR0_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F)
#define CFGR0_HPRE_Set_Mask ((uint32_t)0x000000F0)
#define CFGR0_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF)
#define CFGR0_PPRE1_Set_Mask ((uint32_t)0x00000700)
#define CFGR0_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF)
#define CFGR0_PPRE2_Set_Mask ((uint32_t)0x00003800)
#define CFGR0_ADCPRE_Reset_Mask ((uint32_t)0xFFFF07FF)
#define CFGR0_ADCPRE_Set_Mask ((uint32_t)0x0000F800)
/* RSTSCKR register bit mask */
#define RSTSCKR_RMVF_Set ((uint32_t)0x01000000)
/* RCC Flag Mask */
#define FLAG_Mask ((uint8_t)0x1F)
/* INTR register byte 2 (Bits[15:8]) base address */
#define INTR_BYTE2_ADDRESS ((uint32_t)0x40021009)
/* INTR register byte 3 (Bits[23:16]) base address */
#define INTR_BYTE3_ADDRESS ((uint32_t)0x4002100A)
/* CFGR0 register byte 4 (Bits[31:24]) base address */
#define CFGR0_BYTE4_ADDRESS ((uint32_t)0x40021007)
/* BDCTLR register base address */
#define BDCTLR_ADDRESS (PERIPH_BASE + BDCTLR_OFFSET)
static __I uint8_t APBAHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8};
static __I uint8_t ADCPrescTable[20] = {2, 4, 6, 8, 4, 8, 12, 16, 8, 16, 24, 32, 16, 32, 48, 64, 32, 64, 96, 128};
/*********************************************************************
* @fn RCC_DeInit
*
* @brief Resets the RCC clock configuration to the default reset state.
*
* @return none
*/
void RCC_DeInit(void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFFFEFFFF;
RCC->INTR = 0x009F0000;
RCC_AdjustHSICalibrationValue(0x10);
}
/*********************************************************************
* @fn RCC_HSEConfig
*
* @brief Configures the External High Speed oscillator (HSE).
*
* @param RCC_HSE -
* RCC_HSE_OFF - HSE oscillator OFF.
* RCC_HSE_ON - HSE oscillator ON.
* RCC_HSE_Bypass - HSE oscillator bypassed with external clock.
* Note-
* HSE can not be stopped if it is used directly or through the PLL as system clock.
* @return none
*/
void RCC_HSEConfig(uint32_t RCC_HSE)
{
RCC->CTLR &= CTLR_HSEON_Reset;
RCC->CTLR &= CTLR_HSEBYP_Reset;
switch(RCC_HSE)
{
case RCC_HSE_ON:
RCC->CTLR |= CTLR_HSEON_Set;
break;
case RCC_HSE_Bypass:
RCC->CTLR |= CTLR_HSEBYP_Set | CTLR_HSEON_Set;
break;
default:
break;
}
}
/*********************************************************************
* @fn RCC_WaitForHSEStartUp
*
* @brief Waits for HSE start-up.
*
* @return READY - HSE oscillator is stable and ready to use.
* NoREADY - HSE oscillator not yet ready.
*/
ErrorStatus RCC_WaitForHSEStartUp(void)
{
__IO uint32_t StartUpCounter = 0;
ErrorStatus status = NoREADY;
FlagStatus HSEStatus = RESET;
do
{
HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY);
StartUpCounter++;
} while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET));
if(RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET)
{
status = READY;
}
else
{
status = NoREADY;
}
return (status);
}
/*********************************************************************
* @fn RCC_AdjustHSICalibrationValue
*
* @brief Adjusts the Internal High Speed oscillator (HSI) calibration value.
*
* @param HSICalibrationValue - specifies the calibration trimming value.
* This parameter must be a number between 0 and 0x1F.
*
* @return none
*/
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue)
{
uint32_t tmpreg = 0;
tmpreg = RCC->CTLR;
tmpreg &= CTLR_HSITRIM_Mask;
tmpreg |= (uint32_t)HSICalibrationValue << 3;
RCC->CTLR = tmpreg;
}
/*********************************************************************
* @fn RCC_HSICmd
*
* @brief Enables or disables the Internal High Speed oscillator (HSI).
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_HSICmd(FunctionalState NewState)
{
if(NewState)
{
RCC->CTLR |= (1 << 0);
}
else
{
RCC->CTLR &= ~(1 << 0);
}
}
/*********************************************************************
* @fn RCC_PLLConfig
*
* @brief Configures the PLL clock source and multiplication factor.
*
* @param RCC_PLLSource - specifies the PLL entry clock source.
* RCC_PLLSource_HSI_MUL2 - HSI oscillator clock*2
* selected as PLL clock entry.
* RCC_PLLSource_HSE_MUL2 - HSE oscillator clock*2
* selected as PLL clock entry.
*
* @return none
*/
void RCC_PLLConfig(uint32_t RCC_PLLSource)
{
uint32_t tmpreg = 0;
tmpreg = RCC->CFGR0;
tmpreg &= CFGR0_PLL_Mask;
tmpreg |= RCC_PLLSource;
RCC->CFGR0 = tmpreg;
}
/*********************************************************************
* @fn RCC_PLLCmd
*
* @brief Enables or disables the PLL.
* Note-The PLL can not be disabled if it is used as system clock.
*
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_PLLCmd(FunctionalState NewState)
{
if(NewState)
{
RCC->CTLR |= (1 << 24);
}
else
{
RCC->CTLR &= ~(1 << 24);
}
}
/*********************************************************************
* @fn RCC_SYSCLKConfig
*
* @brief Configures the system clock (SYSCLK).
*
* @param RCC_SYSCLKSource - specifies the clock source used as system clock.
* RCC_SYSCLKSource_HSI - HSI selected as system clock.
* RCC_SYSCLKSource_HSE - HSE selected as system clock.
* RCC_SYSCLKSource_PLLCLK - PLL selected as system clock.
*
* @return none
*/
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource)
{
uint32_t tmpreg = 0;
uint8_t tmp = 0;
tmp = *( uint8_t * )CFG0_PLL_TRIM;
if(tmp != 0xFF)
{
if((RCC_SYSCLKSource == RCC_SYSCLKSource_PLLCLK) && ((RCC->CFGR0 & (1<<16)) == RCC_PLLSource_HSI_MUL2))
{
RCC_AdjustHSICalibrationValue((tmp & 0x1F));
}
else
{
RCC_AdjustHSICalibrationValue(0x10);
}
}
tmpreg = RCC->CFGR0;
tmpreg &= CFGR0_SW_Mask;
tmpreg |= RCC_SYSCLKSource;
RCC->CFGR0 = tmpreg;
}
/*********************************************************************
* @fn RCC_GetSYSCLKSource
*
* @brief Returns the clock source used as system clock.
*
* @return 0x00 - HSI used as system clock.
* 0x04 - HSE used as system clock.
* 0x08 - PLL used as system clock.
*/
uint8_t RCC_GetSYSCLKSource(void)
{
return ((uint8_t)(RCC->CFGR0 & CFGR0_SWS_Mask));
}
/*********************************************************************
* @fn RCC_HCLKConfig
*
* @brief Configures the AHB clock (HCLK).
*
* @param RCC_SYSCLK - defines the AHB clock divider. This clock is derived from
* the system clock (SYSCLK).
* RCC_SYSCLK_Div1 - AHB clock = SYSCLK.
* RCC_SYSCLK_Div2 - AHB clock = SYSCLK/2.
* RCC_SYSCLK_Div3 - AHB clock = SYSCLK/3.
* RCC_SYSCLK_Div4 - AHB clock = SYSCLK/4.
* RCC_SYSCLK_Div5 - AHB clock = SYSCLK/5.
* RCC_SYSCLK_Div6 - AHB clock = SYSCLK/6.
* RCC_SYSCLK_Div7 - AHB clock = SYSCLK/7.
* RCC_SYSCLK_Div8 - AHB clock = SYSCLK/8.
* RCC_SYSCLK_Div16 - AHB clock = SYSCLK/16.
* RCC_SYSCLK_Div32 - AHB clock = SYSCLK/32.
* RCC_SYSCLK_Div64 - AHB clock = SYSCLK/64.
* RCC_SYSCLK_Div128 - AHB clock = SYSCLK/128.
* RCC_SYSCLK_Div256 - AHB clock = SYSCLK/256.
*
* @return none
*/
void RCC_HCLKConfig(uint32_t RCC_SYSCLK)
{
uint32_t tmpreg = 0;
tmpreg = RCC->CFGR0;
tmpreg &= CFGR0_HPRE_Reset_Mask;
tmpreg |= RCC_SYSCLK;
RCC->CFGR0 = tmpreg;
}
/*********************************************************************
* @fn RCC_ITConfig
*
* @brief Enables or disables the specified RCC interrupts.
*
* @param RCC_IT - specifies the RCC interrupt sources to be enabled or disabled.
* RCC_IT_LSIRDY - LSI ready interrupt.
* RCC_IT_HSIRDY - HSI ready interrupt.
* RCC_IT_HSERDY - HSE ready interrupt.
* RCC_IT_PLLRDY - PLL ready interrupt.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState)
{
if(NewState != DISABLE)
{
*(__IO uint8_t *)INTR_BYTE2_ADDRESS |= RCC_IT;
}
else
{
*(__IO uint8_t *)INTR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT;
}
}
/*********************************************************************
* @fn RCC_ADCCLKConfig
*
* @brief Configures the ADC clock (ADCCLK).
*
* @param RCC_PCLK2 - defines the ADC clock divider. This clock is derived from
* the APB2 clock (PCLK2).
* RCC_PCLK2_Div2 - ADC clock = PCLK2/2.
* RCC_PCLK2_Div4 - ADC clock = PCLK2/4.
* RCC_PCLK2_Div6 - ADC clock = PCLK2/6.
* RCC_PCLK2_Div8 - ADC clock = PCLK2/8.
* RCC_PCLK2_Div12 - ADC clock = PCLK2/12.
* RCC_PCLK2_Div16 - ADC clock = PCLK2/16.
* RCC_PCLK2_Div24 - ADC clock = PCLK2/24.
* RCC_PCLK2_Div32 - ADC clock = PCLK2/32.
* RCC_PCLK2_Div48 - ADC clock = PCLK2/48.
* RCC_PCLK2_Div64 - ADC clock = PCLK2/64.
* RCC_PCLK2_Div96 - ADC clock = PCLK2/96.
* RCC_PCLK2_Div128 - ADC clock = PCLK2/128.
*
* @return none
*/
void RCC_ADCCLKConfig(uint32_t RCC_PCLK2)
{
uint32_t tmpreg = 0;
tmpreg = RCC->CFGR0;
tmpreg &= CFGR0_ADCPRE_Reset_Mask;
tmpreg |= RCC_PCLK2;
RCC->CFGR0 = tmpreg;
}
/*********************************************************************
* @fn RCC_LSICmd
*
* @brief Enables or disables the Internal Low Speed oscillator (LSI).
* Note-
* LSI can not be disabled if the IWDG is running.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_LSICmd(FunctionalState NewState)
{
if(NewState)
{
RCC->RSTSCKR |= (1 << 0);
}
else
{
RCC->RSTSCKR &= ~(1 << 0);
}
}
/*********************************************************************
* @fn RCC_GetClocksFreq
*
* @brief The result of this function could be not correct when using
* fractional value for HSE crystal.
*
* @param RCC_Clocks - pointer to a RCC_ClocksTypeDef structure which will hold
* the clocks frequencies.
*
* @return none
*/
void RCC_GetClocksFreq(RCC_ClocksTypeDef *RCC_Clocks)
{
uint32_t tmp = 0, pllsource = 0, presc = 0;
tmp = RCC->CFGR0 & CFGR0_SWS_Mask;
switch(tmp)
{
case 0x00:
RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;
break;
case 0x04:
RCC_Clocks->SYSCLK_Frequency = HSE_VALUE;
break;
case 0x08:
pllsource = RCC->CFGR0 & CFGR0_PLLSRC_Mask;
if(pllsource == 0x00)
{
RCC_Clocks->SYSCLK_Frequency = HSI_VALUE * 2;
}
else
{
RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * 2;
}
break;
default:
RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;
break;
}
tmp = RCC->CFGR0 & CFGR0_HPRE_Set_Mask;
tmp = tmp >> 4;
presc = APBAHBPrescTable[tmp];
if(((RCC->CFGR0 & CFGR0_HPRE_Set_Mask) >> 4) < 8)
{
RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency / presc;
}
else
{
RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc;
}
RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency;
RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency;
tmp = RCC->CFGR0 & CFGR0_ADCPRE_Set_Mask;
tmp = tmp >> 11;
tmp = ((tmp & 0x18) >> 3) | ((tmp & 0x7) << 2);
if((tmp & 0x13) >= 4)
{
tmp -= 12;
}
else
{
tmp &= 0x3;
}
presc = ADCPrescTable[tmp];
RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc;
}
/*********************************************************************
* @fn RCC_AHBPeriphClockCmd
*
* @brief Enables or disables the AHB peripheral clock.
*
* @param RCC_AHBPeriph - specifies the AHB peripheral to gates its clock.
* RCC_AHBPeriph_DMA1.
* RCC_AHBPeriph_SRAM.
* Note-
* SRAM clock can be disabled only during sleep mode.
* NewState: ENABLE or DISABLE.
*
* @return none
*/
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
{
if(NewState != DISABLE)
{
RCC->AHBPCENR |= RCC_AHBPeriph;
}
else
{
RCC->AHBPCENR &= ~RCC_AHBPeriph;
}
}
/*********************************************************************
* @fn RCC_APB2PeriphClockCmd
*
* @brief Enables or disables the High Speed APB (APB2) peripheral clock.
*
* @param RCC_APB2Periph - specifies the APB2 peripheral to gates its clock.
* RCC_APB2Periph_AFIO.
* RCC_APB2Periph_GPIOA.
* RCC_APB2Periph_GPIOC.
* RCC_APB2Periph_GPIOD.
* RCC_APB2Periph_ADC1.
* RCC_APB2Periph_TIM1.
* RCC_APB2Periph_SPI1.
* RCC_APB2Periph_USART1.
* NewState - ENABLE or DISABLE
*
* @return none
*/
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
{
if(NewState != DISABLE)
{
RCC->APB2PCENR |= RCC_APB2Periph;
}
else
{
RCC->APB2PCENR &= ~RCC_APB2Periph;
}
}
/*********************************************************************
* @fn RCC_APB1PeriphClockCmd
*
* @brief Enables or disables the Low Speed APB (APB1) peripheral clock.
*
* @param RCC_APB1Periph - specifies the APB1 peripheral to gates its clock.
* RCC_APB1Periph_TIM2.
* RCC_APB1Periph_WWDG.
* RCC_APB1Periph_I2C1.
* RCC_APB1Periph_PWR.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
{
if(NewState != DISABLE)
{
RCC->APB1PCENR |= RCC_APB1Periph;
}
else
{
RCC->APB1PCENR &= ~RCC_APB1Periph;
}
}
/*********************************************************************
* @fn RCC_APB2PeriphResetCmd
*
* @brief Forces or releases High Speed APB (APB2) peripheral reset.
*
* @param RCC_APB2Periph - specifies the APB2 peripheral to reset.
* RCC_APB2Periph_AFIO.
* RCC_APB2Periph_GPIOA.
* RCC_APB2Periph_GPIOC.
* RCC_APB2Periph_GPIOD.
* RCC_APB2Periph_ADC1.
* RCC_APB2Periph_TIM1.
* RCC_APB2Periph_SPI1.
* RCC_APB2Periph_USART1.
* NewState - ENABLE or DISABLE
*
* @return none
*/
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
{
if(NewState != DISABLE)
{
RCC->APB2PRSTR |= RCC_APB2Periph;
}
else
{
RCC->APB2PRSTR &= ~RCC_APB2Periph;
}
}
/*********************************************************************
* @fn RCC_APB1PeriphResetCmd
*
* @brief Forces or releases Low Speed APB (APB1) peripheral reset.
*
* @param RCC_APB1Periph - specifies the APB1 peripheral to reset.
* RCC_APB1Periph_TIM2.
* RCC_APB1Periph_WWDG.
* RCC_APB1Periph_I2C1.
* RCC_APB1Periph_PWR.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
{
if(NewState != DISABLE)
{
RCC->APB1PRSTR |= RCC_APB1Periph;
}
else
{
RCC->APB1PRSTR &= ~RCC_APB1Periph;
}
}
/*********************************************************************
* @fn RCC_ClockSecuritySystemCmd
*
* @brief Enables or disables the Clock Security System.
*
* @param NewState - ENABLE or DISABLE.
*
* @return none
*/
void RCC_ClockSecuritySystemCmd(FunctionalState NewState)
{
if(NewState)
{
RCC->CTLR |= (1 << 19);
}
else
{
RCC->CTLR &= ~(1 << 19);
}
}
/*********************************************************************
* @fn RCC_MCOConfig
*
* @brief Selects the clock source to output on MCO pin.
*
* @param RCC_MCO - specifies the clock source to output.
* RCC_MCO_NoClock - No clock selected.
* RCC_MCO_SYSCLK - System clock selected.
* RCC_MCO_HSI - HSI oscillator clock selected.
* RCC_MCO_HSE - HSE oscillator clock selected.
* RCC_MCO_PLLCLK - PLL clock selected.
*
* @return none
*/
void RCC_MCOConfig(uint8_t RCC_MCO)
{
*(__IO uint8_t *)CFGR0_BYTE4_ADDRESS = RCC_MCO;
}
/*********************************************************************
* @fn RCC_GetFlagStatus
*
* @brief Checks whether the specified RCC flag is set or not.
*
* @param RCC_FLAG - specifies the flag to check.
* RCC_FLAG_HSIRDY - HSI oscillator clock ready.
* RCC_FLAG_HSERDY - HSE oscillator clock ready.
* RCC_FLAG_PLLRDY - PLL clock ready.
* RCC_FLAG_LSIRDY - LSI oscillator clock ready.
* RCC_FLAG_PINRST - Pin reset.
* RCC_FLAG_PORRST - POR/PDR reset.
* RCC_FLAG_SFTRST - Software reset.
* RCC_FLAG_IWDGRST - Independent Watchdog reset.
* RCC_FLAG_WWDGRST - Window Watchdog reset.
* RCC_FLAG_LPWRRST - Low Power reset.
*
* @return FlagStatus - SET or RESET.
*/
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG)
{
uint32_t tmp = 0;
uint32_t statusreg = 0;
FlagStatus bitstatus = RESET;
tmp = RCC_FLAG >> 5;
if(tmp == 1)
{
statusreg = RCC->CTLR;
}
else
{
statusreg = RCC->RSTSCKR;
}
tmp = RCC_FLAG & FLAG_Mask;
if((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn RCC_ClearFlag
*
* @brief Clears the RCC reset flags.
* Note-
* The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST,
* RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST
* @return none
*/
void RCC_ClearFlag(void)
{
RCC->RSTSCKR |= RSTSCKR_RMVF_Set;
}
/*********************************************************************
* @fn RCC_GetITStatus
*
* @brief Checks whether the specified RCC interrupt has occurred or not.
*
* @param RCC_IT - specifies the RCC interrupt source to check.
* RCC_IT_LSIRDY - LSI ready interrupt.
* RCC_IT_HSIRDY - HSI ready interrupt.
* RCC_IT_HSERDY - HSE ready interrupt.
* RCC_IT_PLLRDY - PLL ready interrupt.
* RCC_IT_CSS - Clock Security System interrupt.
*
* @return ITStatus - SET or RESET.
*/
ITStatus RCC_GetITStatus(uint8_t RCC_IT)
{
ITStatus bitstatus = RESET;
if((RCC->INTR & RCC_IT) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn RCC_ClearITPendingBit
*
* @brief Clears the RCC's interrupt pending bits.
*
* @param RCC_IT - specifies the interrupt pending bit to clear.
* RCC_IT_LSIRDY - LSI ready interrupt.
* RCC_IT_HSIRDY - HSI ready interrupt.
* RCC_IT_HSERDY - HSE ready interrupt.
* RCC_IT_PLLRDY - PLL ready interrupt.
* RCC_IT_CSS - Clock Security System interrupt.
*
* @return none
*/
void RCC_ClearITPendingBit(uint8_t RCC_IT)
{
*(__IO uint8_t *)INTR_BYTE3_ADDRESS = RCC_IT;
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v00x_spi.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : This file provides all the SPI firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <ch32v00x_rcc.h>
#include <ch32v00x_spi.h>
/* SPI SPE mask */
#define CTLR1_SPE_Set ((uint16_t)0x0040)
#define CTLR1_SPE_Reset ((uint16_t)0xFFBF)
/* SPI CRCNext mask */
#define CTLR1_CRCNext_Set ((uint16_t)0x1000)
/* SPI CRCEN mask */
#define CTLR1_CRCEN_Set ((uint16_t)0x2000)
#define CTLR1_CRCEN_Reset ((uint16_t)0xDFFF)
/* SPI SSOE mask */
#define CTLR2_SSOE_Set ((uint16_t)0x0004)
#define CTLR2_SSOE_Reset ((uint16_t)0xFFFB)
/* SPI registers Masks */
#define CTLR1_CLEAR_Mask ((uint16_t)0x3040)
#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
/*********************************************************************
* @fn SPI_I2S_DeInit
*
* @brief Deinitializes the SPIx peripheral registers to their default
* reset values.
* @param SPIx - where x can be 1 to select the SPI peripheral.
*
* @return none
*/
void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
{
if(SPIx == SPI1)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
}
}
/*********************************************************************
* @fn SPI_Init
*
* @brief Initializes the SPIx peripheral according to the specified
* parameters in the SPI_InitStruct.
* When using SPI slave mode to send data, the CPOL bit should be set to 1.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* SPI_InitStruct - pointer to a SPI_InitTypeDef structure that
* contains the configuration information for the specified SPI peripheral.
*
* @return none
*/
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct)
{
uint16_t tmpreg = 0;
tmpreg = SPIx->CTLR1;
tmpreg &= CTLR1_CLEAR_Mask;
tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
SPIx->CTLR1 = tmpreg;
SPIx->CRCR = SPI_InitStruct->SPI_CRCPolynomial;
}
/*********************************************************************
* @fn SPI_StructInit
*
* @brief Fills each SPI_InitStruct member with its default value.
*
* @param SPI_InitStruct - pointer to a SPI_InitTypeDef structure which
* will be initialized.
*
* @return none
*/
void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct)
{
SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
/*"SPI_FirstBit_LSB" not support SPI slave mode*/
SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStruct->SPI_CRCPolynomial = 7;
}
/*********************************************************************
* @fn SPI_Cmd
*
* @brief Enables or disables the specified SPI peripheral.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
SPIx->CTLR1 |= CTLR1_SPE_Set;
}
else
{
SPIx->CTLR1 &= CTLR1_SPE_Reset;
}
}
/*********************************************************************
* @fn SPI_I2S_ITConfig
*
* @brief Enables or disables the specified SPI interrupts.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* SPI_I2S_IT - specifies the SPI interrupt source to be
* enabled or disabled.
* SPI_I2S_IT_TXE - Tx buffer empty interrupt mask.
* SPI_I2S_IT_RXNE - Rx buffer not empty interrupt mask.
* SPI_I2S_IT_ERR - Error interrupt mask.
* NewState: ENABLE or DISABLE.
* @return none
*/
void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
{
uint16_t itpos = 0, itmask = 0;
itpos = SPI_I2S_IT >> 4;
itmask = (uint16_t)1 << (uint16_t)itpos;
if(NewState != DISABLE)
{
SPIx->CTLR2 |= itmask;
}
else
{
SPIx->CTLR2 &= (uint16_t)~itmask;
}
}
/*********************************************************************
* @fn SPI_I2S_DMACmd
*
* @brief Enables or disables the SPIx DMA interface.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* SPI_I2S_DMAReq - specifies the SPI DMA transfer request to
* be enabled or disabled.
* SPI_I2S_DMAReq_Tx - Tx buffer DMA transfer request.
* SPI_I2S_DMAReq_Rx - Rx buffer DMA transfer request.
* NewState - ENABLE or DISABLE.
*
* @return none
*/
void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
{
if(NewState != DISABLE)
{
SPIx->CTLR2 |= SPI_I2S_DMAReq;
}
else
{
SPIx->CTLR2 &= (uint16_t)~SPI_I2S_DMAReq;
}
}
/*********************************************************************
* @fn SPI_I2S_SendData
*
* @brief Transmits a Data through the SPIx peripheral.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* Data - Data to be transmitted.
*
* @return none
*/
void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data)
{
SPIx->DATAR = Data;
}
/*********************************************************************
* @fn SPI_I2S_ReceiveData
*
* @brief Returns the most recent received data by the SPIx peripheral.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* Data - Data to be transmitted.
*
* @return SPIx->DATAR - The value of the received data.
*/
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx)
{
return SPIx->DATAR;
}
/*********************************************************************
* @fn SPI_NSSInternalSoftwareConfig
*
* @brief Configures internally by software the NSS pin for the selected SPI.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* SPI_NSSInternalSoft -
* SPI_NSSInternalSoft_Set - Set NSS pin internally.
* SPI_NSSInternalSoft_Reset - Reset NSS pin internally.
*
* @return none
*/
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft)
{
if(SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
{
SPIx->CTLR1 |= SPI_NSSInternalSoft_Set;
}
else
{
SPIx->CTLR1 &= SPI_NSSInternalSoft_Reset;
}
}
/*********************************************************************
* @fn SPI_SSOutputCmd
*
* @brief Enables or disables the SS output for the selected SPI.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* NewState - new state of the SPIx SS output.
*
* @return none
*/
void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
SPIx->CTLR2 |= CTLR2_SSOE_Set;
}
else
{
SPIx->CTLR2 &= CTLR2_SSOE_Reset;
}
}
/*********************************************************************
* @fn SPI_DataSizeConfig
*
* @brief Configures the data size for the selected SPI.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* SPI_DataSize - specifies the SPI data size.
* SPI_DataSize_16b - Set data frame format to 16bit.
* SPI_DataSize_8b - Set data frame format to 8bit.
*
* @return none
*/
void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize)
{
SPIx->CTLR1 &= (uint16_t)~SPI_DataSize_16b;
SPIx->CTLR1 |= SPI_DataSize;
}
/*********************************************************************
* @fn SPI_TransmitCRC
*
* @brief Transmit the SPIx CRC value.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
*
* @return none
*/
void SPI_TransmitCRC(SPI_TypeDef *SPIx)
{
SPIx->CTLR1 |= CTLR1_CRCNext_Set;
}
/*********************************************************************
* @fn SPI_CalculateCRC
*
* @brief Enables or disables the CRC value calculation of the transferred bytes.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* NewState - new state of the SPIx CRC value calculation.
*
* @return none
*/
void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
SPIx->CTLR1 |= CTLR1_CRCEN_Set;
}
else
{
SPIx->CTLR1 &= CTLR1_CRCEN_Reset;
}
}
/*********************************************************************
* @fn SPI_GetCRC
*
* @brief Returns the transmit or the receive CRC register value for the specified SPI.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* SPI_CRC - specifies the CRC register to be read.
* SPI_CRC_Tx - Selects Tx CRC register.
* SPI_CRC_Rx - Selects Rx CRC register.
*
* @return crcreg: The selected CRC register value.
*/
uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC)
{
uint16_t crcreg = 0;
if(SPI_CRC != SPI_CRC_Rx)
{
crcreg = SPIx->TCRCR;
}
else
{
crcreg = SPIx->RCRCR;
}
return crcreg;
}
/*********************************************************************
* @fn SPI_GetCRCPolynomial
*
* @brief Returns the CRC Polynomial register value for the specified SPI.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
*
* @return SPIx->CRCR - The CRC Polynomial register value.
*/
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
{
return SPIx->CRCR;
}
/*********************************************************************
* @fn SPI_BiDirectionalLineConfig
*
* @brief Selects the data transfer direction in bi-directional mode
* for the specified SPI.
*
* @param SPIx - where x can be 1 to select the SPI peripheral.
* SPI_Direction - specifies the data transfer direction in
* bi-directional mode.
* SPI_Direction_Tx - Selects Tx transmission direction.
* SPI_Direction_Rx - Selects Rx receive direction.
*
* @return none
*/
void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction)
{
if(SPI_Direction == SPI_Direction_Tx)
{
SPIx->CTLR1 |= SPI_Direction_Tx;
}
else
{
SPIx->CTLR1 &= SPI_Direction_Rx;
}
}
/*********************************************************************
* @fn SPI_I2S_GetFlagStatus
*
* @brief Checks whether the specified SPI flag is set or not.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* SPI_I2S_FLAG - specifies the SPI/I2S flag to check.
* SPI_I2S_FLAG_TXE - Transmit buffer empty flag.
* SPI_I2S_FLAG_RXNE - Receive buffer not empty flag.
* SPI_I2S_FLAG_BSY - Busy flag.
* SPI_I2S_FLAG_OVR - Overrun flag.
* SPI_FLAG_MODF - Mode Fault flag.
* SPI_FLAG_CRCERR - CRC Error flag.
* I2S_FLAG_UDR - Underrun Error flag.
* I2S_FLAG_CHSIDE - Channel Side flag.
*
* @return FlagStatus: SET or RESET.
*/
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
{
FlagStatus bitstatus = RESET;
if((SPIx->STATR & SPI_I2S_FLAG) != (uint16_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn SPI_I2S_ClearFlag
*
* @brief Clears the SPIx CRC Error (CRCERR) flag.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* SPI_I2S_FLAG - specifies the SPI flag to clear.
* SPI_FLAG_CRCERR - CRC Error flag.
* Note-
* - OVR (OverRun error) flag is cleared by software sequence: a read
* operation to SPI_DATAR register (SPI_I2S_ReceiveData()) followed by a read
* operation to SPI_STATR register (SPI_I2S_GetFlagStatus()).
* - UDR (UnderRun error) flag is cleared by a read operation to
* SPI_STATR register (SPI_I2S_GetFlagStatus()).
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
* operation to SPI_STATR register (SPI_I2S_GetFlagStatus()) followed by a
* write operation to SPI_CTLR1 register (SPI_Cmd() to enable the SPI).
* @return FlagStatus: SET or RESET.
*/
void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
{
SPIx->STATR = (uint16_t)~SPI_I2S_FLAG;
}
/*********************************************************************
* @fn SPI_I2S_GetITStatus
*
* @brief Checks whether the specified SPI interrupt has occurred or not.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* SPI_I2S_IT - specifies the SPI interrupt source to check..
* SPI_I2S_IT_TXE - Transmit buffer empty interrupt.
* SPI_I2S_IT_RXNE - Receive buffer not empty interrupt.
* SPI_I2S_IT_OVR - Overrun interrupt.
* SPI_IT_MODF - Mode Fault interrupt.
* SPI_IT_CRCERR - CRC Error interrupt.
* I2S_IT_UDR - Underrun Error interrupt.
*
* @return FlagStatus: SET or RESET.
*/
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
{
ITStatus bitstatus = RESET;
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
itmask = SPI_I2S_IT >> 4;
itmask = 0x01 << itmask;
enablestatus = (SPIx->CTLR2 & itmask);
if(((SPIx->STATR & itpos) != (uint16_t)RESET) && enablestatus)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*********************************************************************
* @fn SPI_I2S_ClearITPendingBit
*
* @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
*
* @param SPIx - where x can be
* - 1 in SPI mode.
* SPI_I2S_IT - specifies the SPI interrupt pending bit to clear.
* SPI_IT_CRCERR - CRC Error interrupt.
* Note-
* - OVR (OverRun Error) interrupt pending bit is cleared by software
* sequence: a read operation to SPI_DATAR register (SPI_I2S_ReceiveData())
* followed by a read operation to SPI_STATR register (SPI_I2S_GetITStatus()).
* - UDR (UnderRun Error) interrupt pending bit is cleared by a read
* operation to SPI_STATR register (SPI_I2S_GetITStatus()).
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
* a read/write operation to SPI_STATR register (SPI_I2S_GetITStatus())
* followed by a write operation to SPI_CTLR1 register (SPI_Cmd() to enable
* the SPI).
* @return none
*/
void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
{
uint16_t itpos = 0;
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
SPIx->STATR = (uint16_t)~itpos;
}

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