Further clean up py32f030xx.svd
Missed some multiline descriptions. Also manually fixed some descriptions
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@ -9336,8 +9336,7 @@
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</field>
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<field>
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<name>OPTVERR</name>
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<description>Option and Engineering bits loading
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validity error</description>
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<description>Option and Engineering bits loading validity error</description>
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<bitOffset>15</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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@ -9378,8 +9377,7 @@
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</field>
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<field>
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<name>OBL_LAUNCH</name>
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<description>Force the option byte
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loading</description>
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<description>Load option bytes and reset (requires OPTLOCK=0)</description>
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<bitOffset>27</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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@ -9444,38 +9442,37 @@
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<fields>
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<field>
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<name>nBOOT1</name>
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<description>Boot configuration</description>
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<description>BOOT1 configuration</description>
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<bitOffset>15</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>NRST_MODE</name>
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<description>NRST_MODE</description>
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<description>Reset pin configure as NRST or PF2(GPIO)</description>
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<bitOffset>14</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>WWDG_SW</name>
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<description>Window watchdog selection</description>
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<description>Window watchdog hardware / software selection</description>
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<bitOffset>13</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>IDWG_SW</name>
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<description>Independent watchdog selection</description>
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<description>Independent watchdog hardware / software selection</description>
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<bitOffset>12</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>BORF_LEV</name>
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<description>These bits contain the VDD supply level
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threshold that activates the reset</description>
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<name>BOR_LEV</name>
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<description>VDD supply level threshold that activates BOR reset</description>
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<bitOffset>9</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>BOREN</name>
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<description>BOR reset Level</description>
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<name>BOR_EN</name>
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<description>BOR reset enable</description>
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<bitOffset>8</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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