diff --git a/misc/svd/py32f030xx.svd b/misc/svd/py32f030xx.svd
index 8afdb39..bade743 100644
--- a/misc/svd/py32f030xx.svd
+++ b/misc/svd/py32f030xx.svd
@@ -9336,8 +9336,7 @@
 						</field>
 						<field>
 							<name>OPTVERR</name>
-							<description>Option and Engineering bits loading
-							validity error</description>
+							<description>Option and Engineering bits loading validity error</description>
 							<bitOffset>15</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>
@@ -9378,8 +9377,7 @@
 						</field>
 						<field>
 							<name>OBL_LAUNCH</name>
-							<description>Force the option byte
-							loading</description>
+							<description>Load option bytes and reset (requires OPTLOCK=0)</description>
 							<bitOffset>27</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>
@@ -9444,38 +9442,37 @@
 					<fields>
 						<field>
 							<name>nBOOT1</name>
-							<description>Boot configuration</description>
+							<description>BOOT1 configuration</description>
 							<bitOffset>15</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>
 						<field>
 							<name>NRST_MODE</name>
-							<description>NRST_MODE</description>
+							<description>Reset pin configure as NRST or PF2(GPIO)</description>
 							<bitOffset>14</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>
 						<field>
 							<name>WWDG_SW</name>
-							<description>Window watchdog selection</description>
+							<description>Window watchdog hardware / software selection</description>
 							<bitOffset>13</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>
 						<field>
 							<name>IDWG_SW</name>
-							<description>Independent watchdog selection</description>
+							<description>Independent watchdog hardware / software selection</description>
 							<bitOffset>12</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>
 						<field>
-							<name>BORF_LEV</name>
-							<description>These bits contain the VDD supply level
-							threshold that activates the reset</description>
+							<name>BOR_LEV</name>
+							<description>VDD supply level threshold that activates BOR reset</description>
 							<bitOffset>9</bitOffset>
 							<bitWidth>3</bitWidth>
 						</field>
 						<field>
-							<name>BOREN</name>
-							<description>BOR reset Level</description>
+							<name>BOR_EN</name>
+							<description>BOR reset enable</description>
 							<bitOffset>8</bitOffset>
 							<bitWidth>1</bitWidth>
 						</field>