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Further clean up py32f030xx.svd 

Missed some multiline descriptions. Also manually fixed some descriptions
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true 2023-10-21 16:43:23 -07:00
parent 229f8da6d7
commit 79a52374de
1 changed files with 10 additions and 13 deletions
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misc/svd/py32f030xx.svd
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@ -9336,8 +9336,7 @@
</field> </field>
<field> <field>
<name>OPTVERR</name> <name>OPTVERR</name>
<description>Option and Engineering bits loading <description>Option and Engineering bits loading validity error</description>
validity error</description>
<bitOffset>15</bitOffset> <bitOffset>15</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>
@ -9378,8 +9377,7 @@
</field> </field>
<field> <field>
<name>OBL_LAUNCH</name> <name>OBL_LAUNCH</name>
<description>Force the option byte <description>Load option bytes and reset (requires OPTLOCK=0)</description>
loading</description>
<bitOffset>27</bitOffset> <bitOffset>27</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>
@ -9444,38 +9442,37 @@
<fields> <fields>
<field> <field>
<name>nBOOT1</name> <name>nBOOT1</name>
<description>Boot configuration</description> <description>BOOT1 configuration</description>
<bitOffset>15</bitOffset> <bitOffset>15</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>
<field> <field>
<name>NRST_MODE</name> <name>NRST_MODE</name>
<description>NRST_MODE</description> <description>Reset pin configure as NRST or PF2(GPIO)</description>
<bitOffset>14</bitOffset> <bitOffset>14</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>
<field> <field>
<name>WWDG_SW</name> <name>WWDG_SW</name>
<description>Window watchdog selection</description> <description>Window watchdog hardware / software selection</description>
<bitOffset>13</bitOffset> <bitOffset>13</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>
<field> <field>
<name>IDWG_SW</name> <name>IDWG_SW</name>
<description>Independent watchdog selection</description> <description>Independent watchdog hardware / software selection</description>
<bitOffset>12</bitOffset> <bitOffset>12</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>
<field> <field>
<name>BORF_LEV</name> <name>BOR_LEV</name>
<description>These bits contain the VDD supply level <description>VDD supply level threshold that activates BOR reset</description>
threshold that activates the reset</description>
<bitOffset>9</bitOffset> <bitOffset>9</bitOffset>
<bitWidth>3</bitWidth> <bitWidth>3</bitWidth>
</field> </field>
<field> <field>
<name>BOREN</name> <name>BOR_EN</name>
<description>BOR reset Level</description> <description>BOR reset enable</description>
<bitOffset>8</bitOffset> <bitOffset>8</bitOffset>
<bitWidth>1</bitWidth> <bitWidth>1</bitWidth>
</field> </field>