soft i2c work
added a check to soft i2c master for clock stretch on write. mostly implemented soft i2c slave.
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@ -10,7 +10,8 @@
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*
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* quirks and features:
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* - this implementation is blocking.
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* - partial clock stretching is supported (only during read phase).
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* - partial clock stretching is supported
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* (only during start of write, and within read phase).
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* - timings likely haven't been tested so long as this message exists.
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*/
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@ -152,6 +153,9 @@ uint8_t i2cm_wr(uint8_t dat)
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uint8_t x;
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uint8_t ack;
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SCL_IN_HI();
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while (!SCL_GET()); // clock stretch
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for (x = 8; x; x--) {
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if (dat & 0x80) { SDA_IN_HI(); }
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else { SDA_OUTLO(); }
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@ -4,7 +4,6 @@
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* hastily written. likely has bugs.
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*
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* known quirks:
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* - STOP is never checked for
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* - a fast repeated start may not work as this code
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* does not check for START after the beginning
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*/
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@ -16,10 +15,13 @@
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#include <stdint.h>
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#define I2CSS_ERR_TIMEOUT 4 // timeout in bit-times before i2c slave releases control
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#define I2CSS_IDLE_TIMEOUT 2 // idle timeout required in bit-times before i2c slave can be addressed again
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#define I2CSS_ERR_TIMEOUT 6 // timeout in bit-times before i2c slave releases control
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#define I2CSS_IDLE_TIMEOUT 3 // idle timeout required in bit-times before i2c slave can be addressed again
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// todo: use with struct instead of hard-coding to allow for multiple slaves, but make it fast too
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// note: will have issues with non-responsive slaves with more than one, so is it necessary?
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#define SDA_PIN 13
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#define SDA_BIT (1 << (SDA_PIN % 8))
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#define SDA_DIR_REG R8_PA_DIR_0
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@ -47,54 +49,51 @@
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static uint16_t err_timeout;
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static uint16_t bit_time;
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static uint16_t idle_timeout = 0;
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static inline inline void i2css_reload_timeout(uint16_t bit_time)
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static int8_t i2css_wait_for_scl_hi()
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{
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err_timeout = I2CSS_ERR_TIMEOUT * bit_time;
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int16_t timeout = I2CSS_ERR_TIMEOUT * bit_time;
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while (!SCL_GET()) { if (!timeout--) return I2CSS_SCL_TIMEOUT; }
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return I2CSS_OK;
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}
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static inline int8_t i2css_wait_for_scl_hi()
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{
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while (!SCL_GET()) { if (!err_timeout--) return -1; }
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return 0;
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}
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static inline int8_t i2css_wait_for_scl_lo()
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static int8_t i2css_wait_for_scl_lo()
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{
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uint8_t old_data = SDA_GET();
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int16_t timeout = I2CSS_ERR_TIMEOUT * bit_time;
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err_timeout--; // compensation
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timeout--; // compensation
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while (SCL_GET()) {
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if (err_timeout <= 1) return -1;
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if (SDA_GET() != old_data) return -2;
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err_timeout -= 2;
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if (timeout <= 1) return I2CSS_SCL_TIMEOUT;
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if (SDA_GET() != old_data) return I2CSS_START_STOP;
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timeout -= 2;
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}
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return 0;
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return I2CSS_OK;
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}
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static inline int8_t i2css_ack(uint16_t bit_time)
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{
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uint8_t ret;
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SDA_OUTLO();
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i2css_reload_timeout(bit_time);
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if (i2css_wait_for_scl_hi()) return I2CSS_ACK_ERROR;
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i2css_reload_timeout(bit_time);
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if (i2css_wait_for_scl_lo()) return I2CSS_ACK_TIMEOUT;
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ret = i2css_wait_for_scl_lo();
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SDA_IN_HI();
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return 0;
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_ACK_TIMEOUT;
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return ret;
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}
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// blocking implementation of i2c slave, with 8-bit address register.
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// basically, simulates a 24C02 EEPROM.
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// externally kicked off by a low transition on SCL.
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int8_t i2css_idle_init(struct I2CSoftSlave *slave)
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{
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// set up a hardware timer to tick our idle timer
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@ -120,63 +119,206 @@ int8_t i2css_idle_check(struct I2CSoftSlave *slave)
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int8_t i2css_read(struct I2CSoftSlave *slave)
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{
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return 0;
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int8_t i;
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int8_t ret;
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uint8_t ack = 0;
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uint8_t dat = 0;
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// with no read function configured, we can't do anything
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if (!slave->rd_cb) {
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SCL_IN_HI();
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return I2CSS_NO_READ_FUNCTION;
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}
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// clock low for first bit / stretch, get data to send to master
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SCL_OUTLO();
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dat = slave->rd_cb();
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// release clock, wait for clock to be low by the master
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SCL_IN_HI();
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ret = i2css_wait_for_scl_lo();
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_READ_TIMEOUT;
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if (ret) return ret;
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// send data to master
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for (i = 8; i; i--) {
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if (dat &= 0x80) { SDA_IN_HI(); }
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else { SDA_OUTLO(); }
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dat <<= 1;
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if (i2css_wait_for_scl_hi()) return I2CSS_READ_ERROR;
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ret = i2css_wait_for_scl_lo();
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_READ_TIMEOUT;
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if (ret) return ret;
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}
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// get (n)ack from master
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if (i2css_wait_for_scl_hi()) return I2CSS_READ_ERROR;
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ack = SDA_GET();
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return ack ? I2CSS_NACK : I2CSS_OK;
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}
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int8_t i2css_write(struct I2CSoftSlave *slave)
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{
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int8_t i;
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int8_t ret;
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uint8_t dat = 0;
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uint8_t ack;
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// release clock for master
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SCL_IN_HI();
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// with no read function configured, we can't do anything
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if (!slave->wr_cb) {
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return I2CSS_NO_WRITE_FUNCTION;
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}
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// get data from master
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for (i = 8; i; i--) {
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if (i2css_wait_for_scl_hi()) return I2CSS_WRITE_ERROR;
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dat |= SDA_GET() ? 1 : 0;
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dat <<=1;
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ret = i2css_wait_for_scl_lo();
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_WRITE_TIMEOUT;
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if (ret) return ret;
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}
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// stretch clock, write our data with callback
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SCL_OUTLO();
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ack = slave->wr_cb(dat);
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// send (n)ack to master
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if (ack) { SDA_IN_HI(); } // nack
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else { SDA_OUTLO(); } // ack
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// release clock and wait
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SCL_IN_HI();
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if (i2css_wait_for_scl_hi()) return I2CSS_WRITE_ERROR;
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// wait for clock to go low
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ret = i2css_wait_for_scl_lo();
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_WRITE_TIMEOUT;
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if (ret) return ret;
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// then stretch
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SCL_OUTLO();
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return 0;
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}
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int8_t i2css_blocking(struct I2CSoftSlave *slave)
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// blocking implementation of i2c slave, with 8-bit address register.
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// basically, simulates a 24C02 EEPROM.
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// externally kicked off by a low transition on SCL.
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static inline int8_t i2css_process(struct I2CSoftSlave *slave)
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{
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int8_t i;
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int32_t i;
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int8_t ret;
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uint8_t rx_addr = 0;
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SCL_IN_HI();
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// wait for SCL low to indicate start condition
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i2css_reload_timeout(slave->bit_time);
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while (!SCL_GET()) { if (!err_timeout--) return I2CSS_START_SCL_NOT_LOW; }
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// wait for SCL low to indicate data has begun
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ret = i2css_wait_for_scl_lo();
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_START_SCL_NOT_LOW;
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if (ret) return ret;
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// read address from bus
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for (i = 0; i < 7; i++) {
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i2css_reload_timeout(slave->bit_time);
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for (i = 7; i; i--) {
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if (i2css_wait_for_scl_hi()) return I2CSS_ADDR_READ_ERROR;
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rx_addr |= SDA_GET() ? 1 : 0;
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rx_addr <<=1;
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i2css_reload_timeout(slave->bit_time);
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if (i2css_wait_for_scl_lo()) return I2CSS_ADDR_READ_TIMEOUT;
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ret = i2css_wait_for_scl_lo();
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if (ret == I2CSS_SCL_TIMEOUT) return I2CSS_ADDR_READ_TIMEOUT;
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if (ret) return ret;
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}
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// is this us?
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slave->addr_last_seen = rx_addr;
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if (slave->addr != rx_addr) return I2CSS_ADDR_NO_MATCH;
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// seems so. get the read/write bit
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i2css_reload_timeout(slave->bit_time);
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if (i2css_wait_for_scl_hi()) return I2CSS_ADDR_READ_LASTBIT_TIMEOUT;
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rx_addr |= SDA_GET() ? 1 : 0;
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// let the host know we're ready to serve
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i = i2css_ack(slave->bit_time);
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if (i) return i;
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ret = i2css_ack(slave->bit_time);
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if (ret) return ret;
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// stretch clock while preparing slave to receive
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SCL_OUTLO();
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if (slave->start_cb) slave->start_cb();
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switch (rx_addr & 1) {
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case 0: { // writing
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while (!i2css_write(slave));
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case 0: { // master is writing to us
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do {
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ret = i2css_write(slave);
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} while (!ret);
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break;
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}
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case 1: { // reading
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while (!i2css_read(slave)) {
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i = i2css_ack(slave->bit_time);
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if (i) return i;
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}
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case 1: { // master is reading from us
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do {
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// stretch clock
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SCL_OUTLO();
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ret = i2css_read(slave);
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} while (!ret);
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break;
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}
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}
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return 0;
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return ret;
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}
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int8_t i2css_blocking(struct I2CSoftSlave *slave)
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{
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int8_t ret;
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int8_t start;
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do {
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ret = i2css_process(slave);
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start = 0;
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if (ret == I2CSS_START_STOP) {
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// determine which
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// high = stop, low = start
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start = SDA_GET() ? 0 : 1;
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}
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} while (start);
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return ret;
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}
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// call this function with SDA falling low interrupt.
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int8_t i2css_start(struct I2CSoftSlave *slave)
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{
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uint8_t scl;
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// idle our clock and check for start/stop
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SCL_IN_HI();
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scl = SCL_GET();
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// module will use this bit time for this communication
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bit_time = slave->bit_time;
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// ensure SDA pin will go low when set as an output
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SDA_SET_LO();
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// if SCL is high, this should be a start condition.
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if (scl) {
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return i2css_blocking(slave);
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}
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// if it isn't, there must be some other communication going on, and it doesn't involve us
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return I2CSS_BUS_BUSY;
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}
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@ -15,16 +15,19 @@
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typedef struct I2CSoftSlave {
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uint8_t addr;
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uint8_t addr2;
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uint8_t addr_last_seen;
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uint16_t bit_time;
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uint8_t (*rd_cb)(uint8_t addr, uint8_t *data); // return 0 to ACK
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void (*wr_cb)(uint8_t addr, uint8_t data);
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void (*start_cb)(); // call on any new read/write operation
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uint8_t (*rd_cb)(); // returns data
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int8_t (*wr_cb)(uint8_t data); // return 0 to ACK, all other NACK
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} I2CSoftSlave;
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enum I2CSoftSlave_Error {
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// standard responses
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I2CSS_OK,
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I2CSS_STOP,
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I2CSS_NACK,
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I2CSS_ADDR_NO_MATCH,
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// errors
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I2CSS_START_SCL_NOT_LOW = -1,
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@ -33,11 +36,22 @@ enum I2CSoftSlave_Error {
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I2CSS_ADDR_READ_LASTBIT_TIMEOUT = -4,
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I2CSS_ACK_ERROR = -5, // could be timeout, start or stop condition detected
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I2CSS_ACK_TIMEOUT = -6,
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I2CSS_READ_ERROR = -7,
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I2CSS_READ_TIMEOUT = -8,
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I2CSS_WRITE_ERROR = -9,
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I2CSS_WRITE_TIMEOUT = -10,
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I2CSS_NO_READ_FUNCTION = -32,
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I2CSS_NO_WRITE_FUNCTION = -33,
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I2CSS_SCL_TIMEOUT = -126,
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I2CSS_BUS_BUSY = -127,
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I2CSS_START_STOP = -128
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};
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int8_t i2css_blocking(struct I2CSoftSlave *slave);
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// call this function with SDA falling low interrupt.
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void i2css_init();
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int8_t i2css_start(struct I2CSoftSlave *slave);
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@ -107,5 +107,5 @@ void ch32sub_write_1b(uint16_t reg, uint8_t dat)
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void ch32sub_rgb_hwen(uint8_t en)
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{
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i2c_addr(SUB_I2C_ADDR, 1);
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ch32sub_write_1b(REG_RGB_HWEN, en);
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}
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@ -28,11 +28,75 @@
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struct I2CSoftSlave gat_slave;
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enum {
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GAT_MODE_STARTING,
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GAT_MODE_READ,
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GAT_MODE_WRITE
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};
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uint8_t gat_state;
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uint16_t gat_data_idx;
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uint8_t gat_data[GAT_DATA_SIZE];
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uint8_t gat_i2c_read_cb()
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{
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uint8_t ret;
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switch (gat_state) {
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case GAT_MODE_STARTING: {
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gat_state = GAT_MODE_READ;
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// no break
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}
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case GAT_MODE_READ: {
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// can't read past end of buffer; just send 0xff
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if (gat_data_idx == GAT_DATA_SIZE) {
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ret = 0xff;
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} else {
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ret = gat_data[gat_data_idx & 0xff];
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if (gat_data_idx <= GAT_DATA_SIZE) gat_data_idx++;
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}
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return ret;
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}
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default: {
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return 0;
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}
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}
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}
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int8_t gat_i2c_write_cb(uint8_t dat)
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{
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switch (gat_state) {
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case GAT_MODE_STARTING: {
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// master wrote our address
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gat_data_idx = dat;
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gat_state = GAT_MODE_WRITE;
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break;
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}
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case GAT_MODE_WRITE: {
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if (gat_data_idx >= GAT_DATA_SIZE) {
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return I2CSS_NACK;
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} else {
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gat_data[gat_data_idx++] = dat;
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}
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return I2CSS_OK;
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}
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default: {
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return I2CSS_NACK;
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}
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}
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}
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void gat_i2c_start_cb()
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{
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gat_state = GAT_MODE_STARTING;
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}
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void gat_i2c_init()
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@ -43,11 +107,16 @@ void gat_i2c_init()
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// roughly guess bit time length for expected speed
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gat_slave.bit_time = GetSysClock() / GAT_I2C_SPEED / 4;
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// set up callbacks
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gat_slave.start_cb = gat_i2c_start_cb;
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gat_slave.rd_cb = gat_i2c_read_cb;
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gat_slave.wr_cb = gat_i2c_write_cb;
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// enable interrupt on SDA pin to detect start condition
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// this assumes GPIO has already been configured
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}
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||||
void gat_i2c_irq_cb()
|
||||
{
|
||||
i2css_blocking(&gat_slave);
|
||||
i2css_start(&gat_slave);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user