Implement flash config storage
Calibration needs to be saved for each badge in continuity mode. Added a flash-backed user config storing option with basic wear leveling. Have NOT yet tested the write and erase functions.
This commit is contained in:
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6394c3aaff
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@ -16,9 +16,39 @@
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#define FLASH_HSI_24MHz (uint32_t *)0x1FFF0F6C
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#define UCONF_FLASH_SIZE 512
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#define UCONF_FLASH_START (FLASH_END + 1) - UCONF_FLASH_SIZE
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#define UCONF_SIZE 64 // size in bytes
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#define UCONF_COUNT (UCONF_FLASH_SIZE / UCONF_SIZE)
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#define UCONF_KEY 0x3713
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typedef struct UConf {
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uint16_t conf_key; // should read 0x3713
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uint8_t cont_buzzer; // continuity buzzer on/off
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uint8_t cont_sensitivity; // continuity sensitivity high/low
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uint16_t cont_shorted; // ADC counts when probes shorted in continuity mode
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uint16_t diode_shorted; // unused, unneeded
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uint32_t rsvd_1[4];
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uint32_t rsvd_2[8];
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uint32_t vctr; // increment every update of config
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uint32_t crc32; // CRC of preceding 60 bytes
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} UConf; // 64 bytes
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extern struct UConf conf;
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void flash_init();
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void flash_load_conf();
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void flash_commit_conf();
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#endif /* _INC_FLASH_H */
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@ -14,7 +14,7 @@
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void rgbprog_run();
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void rgbprog_error_flasher(uint8_t r, uint8_t g, uint8_t b);
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void rgbprog_error_flasher(uint8_t scale, uint8_t r, uint8_t g, uint8_t b);
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@ -56,14 +56,14 @@ debug_build_flags =
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[env:sc7-testobot_REV1-py32f-dbg_pyocd]
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build_type = debug
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board_upload.maximum_size = 32256 ; 512 bytes for config
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debug_build_flags = ${common.debug_build_flags}
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-DTESTO_REV1
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[env:sc7-testobot_REV2-py32f-dbg_pyocd]
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build_type = debug
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board_upload.maximum_size = 32256 ; 512 bytes for config
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debug_build_flags = ${common.debug_build_flags}
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-DTESTO_REV2
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@ -71,8 +71,7 @@ debug_build_flags = ${common.debug_build_flags}
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[env:sc7-testobot_REV1-py32f-rel_bl]
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build_type = release
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board_build.ldscript = py32f030x6_bl.ld
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board_upload.maximum_size = 30720 ; 2K reserved for bootloader
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board_upload.maximum_size = 30208 ; 2K reserved for bootloader, 512 bytes for config
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build_flags = ${common.build_flags}
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-DBOOTLOADED
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-DTESTO_REV1
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@ -81,8 +80,7 @@ build_flags = ${common.build_flags}
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[env:sc7-testobot_REV2-py32f-rel_bl]
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build_type = release
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board_build.ldscript = py32f030x6_bl.ld
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board_upload.maximum_size = 30720 ; 2K reserved for bootloader
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board_upload.maximum_size = 30208 ; 2K reserved for bootloader, 512 bytes for config
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build_flags = ${common.build_flags}
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-DBOOTLOADED
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-DTESTO_REV2
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@ -30,7 +30,7 @@ _Min_Stack_Size = 0x100; /* required amount of stack: 256 bytes */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 4K
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K - 512
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}
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/* Define output sections */
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@ -30,7 +30,7 @@ _Min_Stack_Size = 0x100; /* required amount of stack: 256 bytes */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 4K
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FLASH (rx) : ORIGIN = 0x08000800, LENGTH = 32K - 2K
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FLASH (rx) : ORIGIN = 0x08000800, LENGTH = 32K - 2K - 512
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}
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/* Define output sections */
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216
src/flash.c
216
src/flash.c
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@ -15,6 +15,11 @@
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#include "flash.h"
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struct UConf conf = {0};
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/*
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* loads flash timing values.
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* ensure flash is unlocked before calling this function,
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@ -34,6 +39,7 @@ void flash_set_timing(uint32_t *timing_table)
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// the values listed in the reference manual. this is true of
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// all versions I have access to - English v1.0 and Chinese v1.2.
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// for example, @8MHz, RM says 0x5dc0 for PERTPE but ROM holds 0x6b60
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// in testing, either ROM or RM value seems to work.
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// note: the datasheet doesn't say it anywhere, but if flash is not unlocked,
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// then flash timing values aren't writeable
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@ -84,8 +90,8 @@ __attribute__ ((long_call, section(".ramfunc"))) void flash_init()
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// enable EOPIE (per DS, EOP isn't set unless EOPIE is set)
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// and signal that we want to write option bits,
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// then trigger the write by writing to a random address shown in the DS
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FLASH->CR |= FLASH_CR_EOPIE | FLASH_CR_OPTSTRT;
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// then trigger the write by writing to a random address shown in the DS
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*((__IO uint32_t *)(0x40022080)) = 0x55aa55aa;
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// wait for BSY to go low, then EOP to go high
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@ -103,3 +109,211 @@ __attribute__ ((long_call, section(".ramfunc"))) void flash_init()
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// re-lock flash when done
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FLASH->CR = FLASH_CR_LOCK;
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}
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/*
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* loads latest configuration from flash to conf variable in RAM.
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*/
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void flash_load_conf()
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{
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int8_t i, j;
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uint8_t loaded = 0;
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struct UConf *fconf;
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uint32_t *f32;
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uint32_t *u32;
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for (i = (UCONF_COUNT - 1); i >= 0; i--) {
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fconf = (struct UConf *)(UCONF_FLASH_START + (UCONF_SIZE * i));
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f32 = (uint32_t *)fconf;
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// empty flash = nothing here
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if (fconf->crc32 == 0xffffffff) continue;
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// invalid header = skip
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if (fconf->conf_key != UCONF_KEY) continue;
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// calculate crc32
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CRC->CR = CRC_CR_RESET;
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while (CRC->CR & CRC_CR_RESET);
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for (j = 0; j < ((UCONF_SIZE / 4) - 1); j++) {
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CRC->DR = f32[j];
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}
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// check crc32
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if (CRC->DR == f32[(UCONF_SIZE / 4) - 1]) {
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// it passes. copy to RAM and break out
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u32 = (uint32_t *)&conf;
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for (j = 0; j < (UCONF_SIZE / 4); j++) {
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*u32++ = *f32++;
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}
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loaded = 1;
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break;
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}
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}
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if (!loaded) {
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// default config of zeroes works
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}
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}
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/*
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* erases a flash page at the specified address.
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*/
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__attribute__ ((long_call, section(".ramfunc"))) void flash_erase_page(uint32_t addr)
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{
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uint32_t primask;
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// ensure flash is not busy
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while (FLASH->SR & FLASH_SR_BSY);
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// unlock flash
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FLASH->KEYR = FLASH_KEY1;
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FLASH->KEYR = FLASH_KEY2;
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while (FLASH->CR & FLASH_CR_LOCK); // still locked? then stall forever
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// enable EOPIE (per DS, EOP isn't set unless EOPIE is set)
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// and signal that we want to erase a page
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FLASH->CR |= FLASH_CR_EOPIE | FLASH_CR_PER;
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// disable interrupts
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primask = __get_PRIMASK();
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__disable_irq();
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// trigger the erase by writing to a random address shown in the DS
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*((__IO uint32_t *)(addr)) = 0x55aa55aa;
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// ensure flash is not busy, then wait for end of programming
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while (FLASH->SR & FLASH_SR_BSY);
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while (!(FLASH->SR & FLASH_SR_EOP));
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// re-enable interrupts
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__set_PRIMASK(primask);
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// clear EOP
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FLASH->SR |= FLASH_SR_EOP;
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// and re-lock flash
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FLASH->CR = FLASH_CR_LOCK;
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}
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/*
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* erases a flash page at the specified address.
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* data must be a pointer to a full page and
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* must contain 128 bytes (32 words) of data to write.
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*/
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__attribute__ ((long_call, section(".ramfunc"))) void flash_write_page(uint32_t addr, uint32_t *data)
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{
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uint32_t primask;
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uint8_t i;
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uint32_t *src;
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volatile uint32_t *dst;
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// ensure flash is not busy
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while (FLASH->SR & FLASH_SR_BSY);
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// unlock flash
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FLASH->KEYR = FLASH_KEY1;
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FLASH->KEYR = FLASH_KEY2;
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while (FLASH->CR & FLASH_CR_LOCK); // still locked? then stall forever
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// enable EOPIE (per DS, EOP isn't set unless EOPIE is set)
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// and signal that we want to write a page
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FLASH->CR |= FLASH_CR_EOPIE | FLASH_CR_PG;
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// disable interrupts
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primask = __get_PRIMASK();
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__disable_irq();
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// write data to flash
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src = data;
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dst = (volatile uint32_t *)addr;
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for (i = 0; i < (FLASH_PAGE_SIZE / 4); i++) {
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// on the last page, enable the page write start bit to commit to flash
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if (i == (FLASH_PAGE_SIZE / 4) - 1) {
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FLASH->CR |= FLASH_CR_PGSTRT;
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}
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*dst++ = *src++;
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}
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// ensure flash is not busy, then wait for end of programming
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while (FLASH->SR & FLASH_SR_BSY);
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while (!(FLASH->SR & FLASH_SR_EOP));
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// re-enable interrupts
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__set_PRIMASK(primask);
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// clear EOP
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FLASH->SR |= FLASH_SR_EOP;
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// and re-lock flash
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FLASH->CR = FLASH_CR_LOCK;
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}
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/*
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* stores configuration from conf variable in RAM to flash.
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* performs very basic wear leveling.
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*/
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void flash_commit_conf()
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{
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uint32_t i;
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uint8_t flash_idx = 0;
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uint8_t flash_full;
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struct UConf *fconf;
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uint32_t *f32, *u32;
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uint32_t write[(FLASH_PAGE_SIZE / 4)];
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// find first free page index
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for (i = 0; i < UCONF_COUNT; i++) {
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fconf = (struct UConf *)(UCONF_FLASH_START + (UCONF_SIZE * i));
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if ((fconf->crc32 == 0xffffffff) || (fconf->conf_key != UCONF_KEY)) {
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flash_idx = i;
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break;
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}
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}
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// if all pages are occupied, erase the first page
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if (i == UCONF_COUNT) {
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flash_full = 1;
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flash_erase_page(UCONF_FLASH_START);
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}
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// copy flash page from ROM to the write buffer,
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// as our data (64 bytes) is smaller than the page write size (128 bytes)
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f32 = (uint32_t *)fconf;
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u32 = (uint32_t *)write;
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for (i = 0; i < (FLASH_PAGE_SIZE / 4); i++) {
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*u32++ = *f32++;
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}
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// ensure config header is correct, and calculate CRC
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conf.conf_key = UCONF_KEY;
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u32 = (uint32_t *)&conf;
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CRC->CR = CRC_CR_RESET;
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while (CRC->CR & CRC_CR_RESET);
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for (i = 0; i < (UCONF_SIZE / 4) - 1; i++) {
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CRC->DR = u32[i];
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}
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u32[(UCONF_SIZE / 4) - 1] = CRC->DR;
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// copy user config from RAM to write buffer at the appropriate offset
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f32 = (uint32_t *)&conf;
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u32 = (uint32_t *)write;
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for (i = (flash_idx ? UCONF_SIZE : 0); i < (UCONF_SIZE / 4); i++) {
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*u32++ = *f32++;
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}
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// if flash was full, erase other pages
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if (flash_full) {
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for (i = (UCONF_FLASH_START + FLASH_PAGE_SIZE); i < FLASH_END; i += FLASH_PAGE_SIZE) {
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flash_erase_page(i);
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}
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}
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}
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@ -104,6 +104,9 @@ int main()
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flash_init(); // also configures option bytes to enable PF2, if necessary
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gpio_init();
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// load configuration from flash
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flash_load_conf();
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// peripheral initialization
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led_init();
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adc_init();
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@ -117,7 +117,7 @@ void rgbprog_run()
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// if SET1 is out of range, indicate that instead of
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// running the normal program
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if (userio_get_set1_limit()) {
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rgbprog_error_flasher(120, 0, 0);
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rgbprog_error_flasher(0, 120, 0, 0);
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return;
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}
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@ -405,22 +405,20 @@ void rgbprog_prog7(uint8_t k0)
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*
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* flashes LEDs, indicating a SET1 knob error.
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*/
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static uint8_t err_ctr;
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static uint8_t err_ctr = 0;
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static uint8_t err_tog = 0;
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void rgbprog_error_flasher(uint8_t r, uint8_t g, uint8_t b)
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void rgbprog_error_flasher(uint8_t scale, uint8_t r, uint8_t g, uint8_t b)
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{
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err_ctr++;
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uint8_t x;
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x = (1 << scale);
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err_ctr += x;
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err_ctr &= ~(x - 1);
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if (!err_ctr) {
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err_tog ^= 1;
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}
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rgb[0].r = r;
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rgb[0].g = g;
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rgb[0].b = b;
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rgb_setled(err_tog, &rgb[0]);
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rgb[0].r = 0;
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rgb[0].g = 0;
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rgb[0].b = 0;
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rgb_setled(err_tog ^ 1, &rgb[0]);
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led_setrgb(err_tog, r, g, b);
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led_setrgb(err_tog ^ 1, 0, 0, 0);
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}
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