WIP Code
ADC now works in interrupt mode. No idea why DMA was unreliable. Initial button push / release detection and mode switch detection working. No callbacks implemented yet.
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13700b96ca
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@ -13,8 +13,16 @@
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void adc_init();
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#define ADC_CHANNELS 6
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#define ADC_HISTLEN 16
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extern uint16_t adc_avg[ADC_CHANNELS];
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void adc_init();
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uint8_t adc_next();
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106
src/adc.c
106
src/adc.c
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@ -13,20 +13,27 @@
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* of about 33KHz, still well beyond what is needed in this application.
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* this value may change in the future.
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*
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* note: attempted to use DMA for this and scanning all channels
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* at once, but that didn't work. would not reliably read channels.
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* tried many different variations and it just wasn't working.
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* because of this I moved to using interrupt and the built-in
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* wait mode just in case things went slow.
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*
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* file creation: 20231015 0121
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*/
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#include <stdlib.h>
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#include "adc.h"
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#include "testo.h"
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#define SAMPLE_TIME LL_ADC_SAMPLINGTIME_239CYCLES_5
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#define ADC_CHANNELS 6
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#define ADC_HISTLEN 16
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#define ADC_SEQ_RDY 0xff
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#define ADC_SEQ_STARTUP 0xfe
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#define CONF_CALIBRATE (1 << 0)
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#define CONF_USEPROBE (1 << 1)
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@ -35,8 +42,10 @@
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static uint16_t adc_read[ADC_CHANNELS];
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static uint16_t adc_hist[ADC_CHANNELS][ADC_HISTLEN];
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static uint16_t adc_avg[ADC_CHANNELS];
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uint16_t adc_avg[ADC_CHANNELS];
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static uint8_t adc_seq = 0;
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static uint8_t adc_idx = ADC_HISTLEN + 1;
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static int16_t vref;
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@ -61,13 +70,15 @@ void adc_init()
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ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL12;
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ADC1->SMPR = SAMPLE_TIME;
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// run in non-circular DMA mode, with wait mode enabled
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ADC1->CFGR1 = ADC_CFGR1_OVRMOD | ADC_CFGR1_WAIT | LL_ADC_REG_DMA_TRANSFER_LIMITED;
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// run in one-shot mode (scan all channels) but with wait mode active
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ADC1->CFGR1 = ADC_CFGR1_OVRMOD | ADC_CFGR1_WAIT;
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// by default, DMA selection for all channels is ADC
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// so all we need to do is set the peripheral address
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DMA1_Channel1->CPAR = (uint32_t)&ADC1->DR;
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DMA1_Channel1->CMAR = (uint32_t)adc_read;
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// enable end of conversion interrupt
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ADC1->IER = ADC_IER_EOCIE;
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// and enable the interrupt source in the NVIC
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NVIC_EnableIRQ(ADC_COMP_IRQn);
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NVIC_SetPriority(ADC_COMP_IRQn, 3);
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}
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/*
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@ -89,16 +100,8 @@ void adc_go()
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// stop if conversion in progress (it shouldn't ever be)
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adc_stop();
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// configure and enable DMA
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DMA1_Channel1->CCR = 0;
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DMA1_Channel1->CNDTR = ADC_CHANNELS;
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DMA1_Channel1->CCR = LL_DMA_PRIORITY_HIGH |
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LL_DMA_MDATAALIGN_HALFWORD |
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LL_DMA_PDATAALIGN_HALFWORD |
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LL_DMA_MEMORY_INCREMENT |
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LL_DMA_MODE_NORMAL |
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LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
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DMA_CCR_EN;
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// restart sequence
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adc_seq = 0;
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// enable and start ADC
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ADC1->ISR = 0x1e; // clear all interrupt flags (per DS; mistranslated)
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@ -122,6 +125,7 @@ void adc_switch0()
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adc_hist[0][i] = 0;
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}
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// reset history index
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adc_idx = 0;
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// force ADC read to get fresh data
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@ -133,32 +137,44 @@ uint8_t adc_next()
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uint8_t i, j;
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int16_t w;
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// stop if conversion in progress (it shouldn't ever be)
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adc_stop();
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// start ADC calibration
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if (calibrate) {
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calibrate = 0;
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// disable ADC and start calibration
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ADC1->CR &= ~(ADC_CR_ADEN);
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ADC1->CR |= ADC_CR_ADCAL;
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}
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// copy data to history from last read
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// on first boot, do a calibration
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if (adc_idx > ADC_HISTLEN) {
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// nothing to copy when first starting
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adc_idx = 0;
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calibrate = 1;
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} else {
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// copy data to history
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}
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// start ADC calibration
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if (calibrate) {
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adc_stop();
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// disable ADC and start calibration
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ADC1->CR &= ~(ADC_CR_ADEN);
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ADC1->CR |= ADC_CR_ADCAL;
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// clear cal flag; reset sequence to allow conversions to start
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calibrate = 0;
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adc_seq = ADC_SEQ_RDY;
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// wait for calibration to complete, if started
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while (ADC1->CR & ADC_CR_ADCAL) {};
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// do our first round of conversions
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adc_go();
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return ADC_SEQ_STARTUP;
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}
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if (adc_seq == ADC_SEQ_RDY) {
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// copy read data to history
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for (i = 0; i < ADC_CHANNELS; i++) {
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adc_hist[i][adc_idx] = adc_read[i];
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}
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// next one
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// if we're looping, then average our last reads
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// and start over again
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adc_idx++;
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// if we're looping, then average our last reads
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if (adc_idx >= ADC_HISTLEN) {
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adc_idx = 0;
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@ -182,10 +198,22 @@ uint8_t adc_next()
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}
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}
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// wait for calibration to complete, if started
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while (ADC1->CR & ADC_CR_ADCAL) {};
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adc_go();
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return adc_idx;
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}
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void ADC_COMP_IRQHandler()
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{
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if (adc_seq != 0xff) {
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adc_read[adc_seq++] = ADC1->DR;
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// is this the end of conversions?
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if (ADC1->ISR & ADC_ISR_EOSEQ) {
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adc_seq = ADC_SEQ_RDY;
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}
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}
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// clear all interrupt flags
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ADC1->ISR = 0x1e;
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}
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17
src/main.c
17
src/main.c
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@ -81,12 +81,6 @@ static inline void systick_init()
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// configure timebase with interrupt at 4096Hz
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// this assumes we'll always be running at 8MHz
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SysTick_Config((8000000 / 4096) - 1);
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// configure unused DMA channels to not be on ADC
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// (otherwise ADC can shows reads of 0... it's a hardware bug)
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SYSCFG->CFGR3 = LL_SYSCFG_DMA_MAP_ADC | // ch0
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LL_SYSCFG_DMA_MAP_TIM17_UP << 8 | // ch1
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LL_SYSCFG_DMA_MAP_TIM17_UP << 16; // ch2
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}
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/*
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@ -124,6 +118,7 @@ int main()
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/*
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* main application interrupt
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*/
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void SysTick_Handler(void)
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{
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uint16_t cs;
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@ -144,18 +139,12 @@ void SysTick_Handler(void)
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// shifted counter for use in the program
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cs = ctr >> 2;
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// adc (512Hz/16 avg = 32Hz update rate)
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if (cs & 1) {
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// adc tested to result in about 61 reads/second
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if (!adc_next()) {
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// adc has new computed results,
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// so we can do userio, probe, etc
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// but the results are only valid
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// after our first cycle
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// adc has new computed results, so we can do userio, probe, etc
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if (uptime || cs) {
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userio_parse();
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}
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}
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}
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}
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}
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66
src/userio.c
66
src/userio.c
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#include <stdint.h>
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#include <stdlib.h>
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#include "adc.h"
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#include "testo.h"
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#define MODE_CONT 0
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#define MODE_CONT_TARGET (4096 * (1 - (1 / 4)))
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#define MODE_CONT_TARGET 3072 // (4096 * (1 - (1 / 4)))
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#define MODE_FUN 1
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#define MODE_FUN_TARGET (4096 * (1 - (1 / 3)))
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#define MODE_FUN_TARGET 2731 // (4096 * (1 - (1 / 3)))
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#define MODE_DIODE 2
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#define MODE_DIODE_TARGET (4096 * (1 - (1 / 2)))
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#define MODE_DIODE_TARGET 2048 // (4096 * 1 - ((1 / 2)))
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#define MODE_HYSTERESIS 60 // 3x worst case expected (1% tol)
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#define MODE_SET_LIMIT 60 // 3x worst case expected (1% tol)
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#define MODE_CHANGE_TICKS 4 // how many samples before switching modes
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#define MODE_ANALOG_MIN 20
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@ -46,7 +51,7 @@
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uint8_t mode;
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uint8_t mode_next;
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uint8_t mode_count;
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static const uint16_t mode_targets[] = {
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static const int16_t mode_targets[] = {
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MODE_CONT_TARGET, MODE_FUN_TARGET, MODE_DIODE_TARGET
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};
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void userio_parse()
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{
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uint8_t i;
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volatile int16_t m, w;
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// button
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// debounce is handled by the fact that we've had to have averaged
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// about 16ms of measured hold time below the zero threshold.
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m = adc_avg[ADC_SET_MODE];
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if (m < MODE_ANALOG_MIN) {
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// button is pushed
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btn = 1;
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if (btn_held != 0xffff) btn_held++;
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} else if (btn == 1) {
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// button is released
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btn = 0;
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}
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// mode
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if (!btn) {
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for (i = 0; i < 4; i++) {
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// clear mode_count if we aren't actively changing modes
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if (i == 3) {
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mode_count = 0;
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break;
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}
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// normalize mode selection
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w = abs(m - mode_targets[i]);
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// determine if we mode switch
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if (w < MODE_SET_LIMIT) {
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// currently in this mode? if so, ignore it
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if (mode == i) continue;
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// is the next mode set to this item?
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if (mode_next == i) {
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// increment the verification count
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mode_count++;
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if (mode_count >= MODE_CHANGE_TICKS) {
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// we've got enough data to do a change of mode
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mode = i;
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mode_count = 0;
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}
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} else {
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// set the next mode to the newly selected mode
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mode_next = i;
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mode_count = 0;
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}
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break;
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}
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}
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}
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}
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