500 lines
16 KiB
C
500 lines
16 KiB
C
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/**
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******************************************************************************
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* @file py32f0xx_ll_lptim.h
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* @author MCU Application Team
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* @brief Header file of LPTIM LL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef PY32F0XX_LL_LPTIM_H
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#define PY32F0XX_LL_LPTIM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "py32f0xx.h"
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/** @addtogroup PY32F0XX_LL_Driver
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* @{
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*/
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#if defined (LPTIM)
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/** @defgroup LPTIM_LL LPTIM
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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#if defined(USE_FULL_LL_DRIVER)
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/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
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* @{
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*/
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/**
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* @}
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*/
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#endif /*USE_FULL_LL_DRIVER*/
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/* Exported types ------------------------------------------------------------*/
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#if defined(USE_FULL_LL_DRIVER)
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/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
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* @{
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*/
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/**
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* @brief LPTIM Init structure definition
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*/
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typedef struct
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{
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uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
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This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
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This feature can be modified afterwards using using unitary
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function @ref LL_LPTIM_SetPrescaler().*/
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uint32_t UpdateMode; /*!< Specifies whether to update immediately or after the end
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of current period.
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This parameter can be a value of @ref LPTIM_LL_EC_UPDATE_MODE
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This feature can be modified afterwards using using unitary
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function @ref LL_LPTIM_SetUpdateMode().*/
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} LL_LPTIM_InitTypeDef;
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/**
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* @}
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*/
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#endif /* USE_FULL_LL_DRIVER */
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
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* @{
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*/
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/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
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* @brief Flags defines which can be used with LL_LPTIM_ReadReg function
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* @{
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*/
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#define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
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/**
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* @}
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*/
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/** @defgroup LPTIM_LL_EC_IT IT Defines
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* @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
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* @{
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*/
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#define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
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/**
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* @}
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*/
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/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
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* @{
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*/
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#define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
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/**
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* @}
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*/
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/** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
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* @{
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*/
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#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
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#define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
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/**
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* @}
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*/
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/** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
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* @{
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*/
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#define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
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#define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
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#define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
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#define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
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#define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
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#define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
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#define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
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#define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
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* @{
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*/
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/** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
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* @{
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*/
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/**
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* @brief Write a value in LPTIM register
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* @param __INSTANCE__ LPTIM Instance
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* @param __REG__ Register to be written
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* @param __VALUE__ Value to be written in the register
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* @retval None
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*/
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#define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
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/**
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* @brief Read a value in LPTIM register
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* @param __INSTANCE__ LPTIM Instance
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* @param __REG__ Register to be read
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* @retval Register value
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*/
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#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
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* @{
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
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* @{
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*/
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ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
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void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
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ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
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/**
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* @}
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*/
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#endif /* USE_FULL_LL_DRIVER */
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/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
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* @{
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*/
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/**
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* @brief Enable the LPTIM instance
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* @note After setting the ENABLE bit, a delay of two counter clock is needed
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* before the LPTIM instance is actually enabled.
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* @rmtoll CR ENABLE LL_LPTIM_Enable
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* @param LPTIMx Low-Power Timer instance
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
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{
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SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
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}
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/**
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* @brief Disable the LPTIM instance
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* @rmtoll CR ENABLE LL_LPTIM_Disable
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* @param LPTIMx Low-Power Timer instance
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
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{
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CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
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}
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/**
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* @brief Indicates whether the LPTIM instance is enabled.
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* @rmtoll CR ENABLE LL_LPTIM_IsEnabled
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* @param LPTIMx Low-Power Timer instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
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{
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return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
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}
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/**
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* @brief Starts the LPTIM counter in the desired mode.
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* @note LPTIM instance must be enabled before starting the counter.
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* @rmtoll CR SNGSTRT LL_LPTIM_StartCounter
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* @param LPTIMx Low-Power Timer instance
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* @param OperatingMode This parameter can be one of the following values:
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* @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
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{
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MODIFY_REG(LPTIMx->CR, LPTIM_CR_SNGSTRT, OperatingMode);
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}
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/**
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* @brief Enable reset after read.
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* @note After calling this function any read access to LPTIM_CNT
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* register will asynchronously reset the LPTIM_CNT register content.
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* @rmtoll CR RSTARE LL_LPTIM_EnableResetAfterRead
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* @param LPTIMx Low-Power Timer instance
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef *LPTIMx)
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{
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SET_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
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}
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/**
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* @brief Disable reset after read.
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* @rmtoll CR RSTARE LL_LPTIM_DisableResetAfterRead
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* @param LPTIMx Low-Power Timer instance
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef *LPTIMx)
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{
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CLEAR_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
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}
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/**
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* @brief Indicate whether the reset after read feature is enabled.
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* @rmtoll CR RSTARE LL_LPTIM_IsEnabledResetAfterRead
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* @param LPTIMx Low-Power Timer instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledResetAfterRead(LPTIM_TypeDef *LPTIMx)
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{
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return (((READ_BIT(LPTIMx->CR, LPTIM_CR_RSTARE) == LPTIM_CR_RSTARE) ? 1UL : 0UL));
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}
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/**
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* @brief Set the LPTIM registers update mode (enable/disable register preload)
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* @note This function must be called when the LPTIM instance is disabled.
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* @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
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* @param LPTIMx Low-Power Timer instance
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* @param UpdateMode This parameter can be one of the following values:
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* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
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* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
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{
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MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
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}
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/**
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* @brief Get the LPTIM registers update mode
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* @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
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* @param LPTIMx Low-Power Timer instance
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
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* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
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*/
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__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
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{
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return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
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}
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/**
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* @brief Set the auto reload value
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* @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
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* @note After a write to the LPTIMx_ARR register a new write operation to the
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* same register can only be performed when the previous write operation
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* is completed. Any successive write before the ARROK flag is set, will
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* lead to unpredictable results.
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* @note autoreload value be strictly greater than the compare value.
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* @rmtoll ARR ARR LL_LPTIM_SetAutoReload
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* @param LPTIMx Low-Power Timer instance
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* @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
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* @retval None
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*/
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__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
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{
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MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
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}
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/**
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* @brief Get actual auto reload value
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* @rmtoll ARR ARR LL_LPTIM_GetAutoReload
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* @param LPTIMx Low-Power Timer instance
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* @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
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*/
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__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
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{
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return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
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}
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/**
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* @brief Get actual counter value
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* @note When the LPTIM instance is running with an asynchronous clock, reading
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* the LPTIMx_CNT register may return unreliable values. So in this case
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* it is necessary to perform two consecutive read accesses and verify
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* that the two returned values are identical.
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* @rmtoll CNT CNT LL_LPTIM_GetCounter
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* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval Counter value
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set actual prescaler division ratio.
|
||
|
|
* @note This function must be called when the LPTIM instance is disabled.
|
||
|
|
* @note When the LPTIM is configured to be clocked by an internal clock source
|
||
|
|
* and the LPTIM counter is configured to be updated by active edges
|
||
|
|
* detected on the LPTIM external Input1, the internal clock provided to
|
||
|
|
* the LPTIM must be not be prescaled.
|
||
|
|
* @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @param Prescaler This parameter can be one of the following values:
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV1
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV2
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV4
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV8
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV16
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV32
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV64
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV128
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
|
||
|
|
{
|
||
|
|
MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Get actual prescaler division ratio.
|
||
|
|
* @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval Returned value can be one of the following values:
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV1
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV2
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV4
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV8
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV16
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV32
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV64
|
||
|
|
* @arg @ref LL_LPTIM_PRESCALER_DIV128
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Clear the autoreload match flag (ARRMCF)
|
||
|
|
* @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Inform application whether a autoreload match interrupt has occurred.
|
||
|
|
* @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval State of bit (1 or 0).
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enable autoreload match interrupt (ARRMIE).
|
||
|
|
* @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Disable autoreload match interrupt (ARRMIE).
|
||
|
|
* @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
|
||
|
|
* @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
|
||
|
|
* @param LPTIMx Low-Power Timer instance
|
||
|
|
* @retval State of bit (1 or 0).
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
|
||
|
|
{
|
||
|
|
return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* LPTIM */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* PY32F0XX_LL_LPTIM_H */
|
||
|
|
|
||
|
|
/************************ (C) COPYRIGHT Puya *****END OF FILE****/
|