setting cursor to off would keep its last state active. fixed. cursor wouldn't turn off all the way and would glitch out. fixed. cursor now has a nicer fadeout. fixed potentiometer scaling factors. tried fixing clockspeed stuff. with these changes clock speed can more reliably change to 24MHz or 48MHz, but this isn't thoroughly tested. 3MHz to 24MHz was still crashing. as ADC is in use, code would need to be refactored to not change clock speed while ADC is converting. since I don't want to do this right now, this will run at a fixed speed at the expense of 0.5-1mA. editor buttons working and updated to the new arrangement, but not tested in depth. pressing and holding to exit parameter editor while edit mode active would result in next entry into parameter editor being in edit mode. fixed. lsens / stat LED now functioning in program and parameter edit modes.
108 lines
3.0 KiB
C
108 lines
3.0 KiB
C
/*******************************************************************************
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* File Name : system_ch32x035.c
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*******************************************************************************/
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#include "ch32x035.h"
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#include "global.h"
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uint32_t SystemCoreClock;
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__I uint8_t AHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8};
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void SetSysClock(uint32_t clock);
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static void SetSysClockToX_HSI(uint32_t div, uint8_t latency);
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/*********************************************************************
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* @fn SystemInit
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*
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* @brief Setup the microcontroller system Initialize the Embedded Flash Interface,
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* update the SystemCoreClock variable.
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*
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* @return none
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*/
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void SystemInit (void)
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{
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// ensure internal oscillator is running and ready
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RCC->CTLR |= (uint32_t)RCC_HSION;
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while (!(RCC->CTLR & RCC_HSIRDY)) {};
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// default to 8MHz before doing anything else
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// this is POR default
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RCC->CFGR0 = (uint32_t)RCC_HPRE_DIV6;
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// set user-requested startup clock
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SetSysClock(SYSCLK_FREQ_STARTUP);
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}
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/*********************************************************************
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* @fn SystemCoreClockUpdate
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*
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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*
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* @return none
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*/
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void SystemCoreClockUpdate (void)
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{
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uint32_t tmp = 0;
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SystemCoreClock = HSI_VALUE;
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tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)];
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if(((RCC->CFGR0 & RCC_HPRE) >> 4) < 8) {
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SystemCoreClock /= tmp;
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} else {
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SystemCoreClock >>= tmp;
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}
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}
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/*********************************************************************
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* @fn SetSysClock
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*
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* @brief Configures the System clock frequency, HCLK prescalers.
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*
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* @return none
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*/
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void SetSysClock(uint32_t clock)
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{
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switch (clock) {
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case SYSCLK_FREQ_48MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV1, FLASH_ACTLR_LATENCY_2); break; }
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case SYSCLK_FREQ_24MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV2, FLASH_ACTLR_LATENCY_1); break; }
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case SYSCLK_FREQ_16MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV3, FLASH_ACTLR_LATENCY_1); break; }
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case SYSCLK_FREQ_12MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV4, FLASH_ACTLR_LATENCY_0); break; }
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case SYSCLK_FREQ_3MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV16, FLASH_ACTLR_LATENCY_0); break; }
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default: {
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SetSysClockToX_HSI(RCC_HPRE_DIV6, FLASH_ACTLR_LATENCY_0);
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clock = 8000000;
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break;
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}
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}
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SystemCoreClock = clock;
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}
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static void SetSysClockToX_HSI(uint32_t div, uint8_t latency)
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{
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uint32_t cfgr0;
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// set flash access to 2 wait states (boot default is 0 at 48MHz??)
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FLASH->ACTLR = (uint32_t)FLASH_ACTLR_LATENCY_2;
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// the vendor didn't wait here. but switching from slow to high speed
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// often causes crashes without this.
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asm("nop"); asm("nop"); asm("nop");
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/* HCLK = SYSCLK = APB1 */
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cfgr0 = RCC->CFGR0 &= (uint32_t)~RCC_HPRE;
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RCC->CFGR0 = (uint32_t)(cfgr0 | (div & 0xf0));
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/* Flash set wait state */
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FLASH->ACTLR = (uint32_t)(latency & 0x03);
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}
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