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soft I2C implemented, LEDs are now lighting

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copied over and modified for use my CH59x soft I2C.

CH32X GPIO does not have an open drain mode, so I have to implement this with RMW to the mode register. After doing this and adding missing functions needed for existing code, LED writes and EEPROM reads and writes.

using the AWU for system timing so the clock speed can change.

existing issues:
- changing clock speed divider in soft i2c routines causes the system to crash
- ADC seems to be reading, but result isn't being used
This commit is contained in:
true 2025-07-24 06:19:24 -07:00
parent 805489c98f
commit f8a987a592
18 changed files with 247 additions and 207 deletions
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12
firmware/retro_tech_fw/.cproject
View File

@ -18,7 +18,7 @@
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</tool>
@ -256,7 +256,7 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="debug" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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4
firmware/retro_tech_fw/.template
View File

@ -10,10 +10,10 @@ PeripheralVersion=1.9
Description=Website: https://www.wch.cn/products/CH32X035.html?\nROM(byte): 62K, SRAM(byte): 20K, CHIP PINS: 48, GPIO PORTS: 46.\nWCH CH32X033 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
Mcu Type=CH32X035
Address=0x08000000
Target Path=obj/retro_tech_fw.hex
Target Path=bin/dbg/retro_tech_fw.hex
Exe Path=
Exe Arguments=
CLKSpeed=1
CLKSpeed=2
DebugInterfaceMode=0
Erase All=true
Program=true

8
firmware/retro_tech_fw/code/ch32x035_conf.h
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@ -12,6 +12,7 @@
#ifndef __CH32X035_CONF_H
#define __CH32X035_CONF_H
#include "ch32x035_adc.h"
#include "ch32x035_awu.h"
#include "ch32x035_dbgmcu.h"
@ -21,7 +22,7 @@
#include "ch32x035_gpio.h"
#include "ch32x035_i2c.h"
#include "ch32x035_iwdg.h"
#include "ch32x035_pwr.h"
//#include "ch32x035_pwr.h"
#include "ch32x035_rcc.h"
#include "ch32x035_spi.h"
#include "ch32x035_tim.h"
@ -32,8 +33,3 @@
#endif

6
firmware/retro_tech_fw/code/ch32x035_it.c
View File

@ -22,6 +22,7 @@
void NMI_Handler(void);
void HardFault_Handler(void);
void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void AWU_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn NMI_Handler
@ -55,8 +56,11 @@ void HardFault_Handler(void)
volatile uint16_t ticnt;
volatile uint32_t uptime;
void SysTick_Handler(void)
void AWU_IRQHandler(void)
{
// clear interrupt flag
EXTI->INTFR = EXTI_INTF_INTF27;
if (++ticnt > 0x1ff) {
ticnt = 0;
uptime++;

20
firmware/retro_tech_fw/code/global.h Normal file
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@ -0,0 +1,20 @@
/*
global config
*/
#ifndef INC_GLOBAL_H_
#define INC_GLOBAL_H_
#include "system_ch32x035.h"
#define SYSCLK_FREQ_NORMAL SYSCLK_FREQ_24MHz_HSI
#define SYSCLK_FREQ_USEI2C SYSCLK_FREQ_24MHz_HSI
#define SYSCLK_FREQ_IDLE SYSCLK_FREQ_12MHz_HSI
#endif /* INC_GLOBAL_H_ */

24
firmware/retro_tech_fw/code/main.c
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@ -32,6 +32,9 @@
#include "src/rand.h"
#include "src/ui.h"
#include "global.h"
void systick_init(void)
{
@ -43,6 +46,20 @@ void systick_init(void)
NVIC_EnableIRQ(SysTicK_IRQn); // enable interrupt
}
void awu_init(void)
{
AWU_SetPrescaler(AWU_Prescaler_2);
AWU_SetWindowValue(47);
AutoWakeUpCmd(ENABLE);
// if rising edge and interrupt isn't set on EXTI line 27,
// interrupt won't fire.
EXTI->RTENR = EXTI_RTENR_TR27;
EXTI->INTENR = EXTI_INTENR_MR27;
NVIC_EnableIRQ(AWU_IRQn);
}
void gpio_init()
{
GPIO_InitTypeDef gpio = {0};
@ -106,7 +123,6 @@ int main(void)
{
// configure core
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
SystemCoreClockUpdate();
// enable peripheral clocks
RCC_APB1PeriphClockCmd( RCC_APB1Periph_PWR | RCC_APB1Periph_I2C1, ENABLE);
@ -119,7 +135,7 @@ int main(void)
// get saved settings, or reset if BTN1 is pushed
i2cm_init();
userconf_load((BTN_PORT->INDR & (1 << BTN1_PIN)) ? 0 : 1);
userconf_load((BTN_PORT->INDR & (1 << BTN2_PIN)) ? 0 : 1);
// configure hardware
adc_init();
@ -132,8 +148,8 @@ int main(void)
// configure UI
ui_init();
// configure systick interrupt
systick_init();
// configure auto-wakeup to run at 498Hz
awu_init();
// set up LEDs initially
led_rgb_firstrun();

12
firmware/retro_tech_fw/code/src/31fl3729.c
View File

@ -12,14 +12,14 @@
void is31fl3729_set_global_current(uint8_t i2c_addr, uint8_t global_current)
{
i2c_write_reg_8b(i2c_addr, FL3729_REG_G_CURRENT, global_current);
i2c_write_reg8_1b(i2c_addr, FL3729_REG_G_CURRENT, global_current);
}
void is31fl3729_set_scaling_current(uint8_t i2c_addr, uint8_t cs, uint8_t current)
{
if (cs > 0xf) return;
i2c_write_reg_8b(i2c_addr, FL3729_REG_SCALING + cs, current);
i2c_write_reg8_1b(i2c_addr, FL3729_REG_SCALING + cs, current);
}
/* sends the IS31FL3729 initial config.
@ -34,10 +34,10 @@ void is31fl3729_init(uint8_t i2c_addr, uint8_t config, uint8_t global_current)
#endif
// reset config registers
i2c_write_reg_8b(i2c_addr, FL3729_REG_CONFIG, FL3729_RESET_VALUE);
i2c_write_reg8_1b(i2c_addr, FL3729_REG_CONFIG, FL3729_RESET_VALUE);
// write initial config
i2c_write_reg_8b(i2c_addr, FL3729_REG_CONFIG, config);
i2c_write_reg8_1b(i2c_addr, FL3729_REG_CONFIG, config);
is31fl3729_set_global_current(i2c_addr, global_current);
}
@ -56,7 +56,7 @@ void is31fl3729_set_scaling_current_multi(uint8_t i2c_addr, const uint8_t *curre
if (!count) return;
if (count > 16) count = 16;
i2c_write_addr1b(i2c_addr, FL3729_REG_SCALING, current, count);
i2c_write_reg8(i2c_addr, FL3729_REG_SCALING, current, count);
}
/* updates LEDs. data is arranged as 16 bytes per switch output.
@ -75,5 +75,5 @@ void is31fl3729_set_outputs(uint8_t i2c_addr, uint8_t sw, const uint8_t *out, ui
sw <<= 4;
sw++;
i2c_write_addr1b(i2c_addr, sw, out, len);
i2c_write_reg8(i2c_addr, sw, out, len);
}

10
firmware/retro_tech_fw/code/src/btn.c
View File

@ -18,18 +18,14 @@ void btn_init()
{
uint8_t i;
// configure GPIO (now handled as part of main GPIO init function)
// BTN_PORT->BSHR = (BTN1_PUPD << BTN1_PIN) | (BTN2_PUPD << BTN2_PIN);
// BTN_PORT->CFGLR &= ~((0xf << (BTN1_PIN*4)) | ((0xf << (BTN2_PIN*4))));
// BTN_PORT->CFGLR |= (0x8 << (BTN1_PIN*4)) | (0x8 << (BTN2_PIN*4));
// configure default setup
for (i = 0; i < BTN_COUNT; i++) {
btn[i]._mask = BTN_RELEASE;
}
btn[0]._pintype = BTN1_PIN | BTN_ACTIVE_LO;
btn[1]._pintype = BTN2_PIN;
btn[0]._pintype = BTN0_PIN | BTN_ACTIVE_LO;
btn[1]._pintype = BTN1_PIN | BTN_ACTIVE_LO;
btn[2]._pintype = BTN2_PIN | BTN_ACTIVE_LO;
// check button, and ignore if held
if (!(BTN_PORT->INDR & (1 << BTN1_PIN))) {

13
firmware/retro_tech_fw/code/src/btn.h
View File

@ -10,10 +10,10 @@
#define BTN_COUNT 2
#define BTN_DEBOUNCE (12 >> 1) // debounce time in 2ms
#define BTN_COUNT 3
#define BTN_DEBOUNCE (10 >> 1) // debounce time in 2ms
#define BTN_PORT GPIOC
#define BTN_PORT GPIOA
#define BTN_MODE 0x80
#define BTN_PULL_UP (1 << 0)
@ -22,11 +22,14 @@
#define BTN_ACTIVE_LO 0x10
#define BTN_PIN_MASK 0x0f
#define BTN0_PIN 4
#define BTN0_PUPD BTN_PULL_UP
#define BTN1_PIN 5
#define BTN1_PUPD BTN_PULL_UP
#define BTN2_PIN 4
#define BTN2_PUPD BTN_PULL_DOWN
#define BTN2_PIN 6
#define BTN2_PUPD BTN_PULL_UP
#define BTN_PUSH (1 << 0)
#define BTN_HOLD (1 << 1)

2
firmware/retro_tech_fw/code/src/config.h
View File

@ -22,7 +22,7 @@
#define CONF_CURSOR_FLASH_MASK 0x70
#define CONF_CURSOR_FLASH_SHIFT 4
#define CHECKVAL 0x2024dc32
#define CHECKVAL 0x2025dc33

8
firmware/retro_tech_fw/code/src/eeprom.c
View File

@ -42,7 +42,7 @@ void eeprom_read_bytes(uint8_t page, uint8_t addr, uint8_t *data, uint8_t len)
{
page = page_to_i2caddr(page);
i2c_read_addr1b(page, addr, data, len);
i2c_read_reg8(page, addr, data, len);
}
/*********************************************************************
@ -68,9 +68,9 @@ void eeprom_write_bytes(uint8_t page, uint8_t addr, uint8_t *data, uint8_t len)
EEPROM_WP_PORT->BCR = EEPROM_WP_PIN;
#endif
while (!i2c_addr_scan(page));
i2c_write_addr1b(page, addr, data, len);
while (!i2c_addr_scan(page));
while (!i2cm_addr_scan(page)) {};
i2c_write_reg8(page, addr, data, len);
while (!i2cm_addr_scan(page)) {};
#ifdef EEPROM_WP_PORT
EEPROM_WP_PORT->BSHR = EEPROM_WP_PIN;

28
firmware/retro_tech_fw/code/src/i2c_soft.c
View File

@ -116,7 +116,7 @@ void i2cm_start()
{
SDA_IN_HI(); bit_delay_hi();
SCL_IN_HI(); bit_delay_hi();
while (!SCL_GET()); // clock stretch
while (!SCL_GET()) {}; // clock stretch
SDA_OUTLO(); bit_delay_lo();
SCL_OUTLO(); bit_delay_lo();
}
@ -126,7 +126,7 @@ void i2cm_restart()
{
SDA_IN_HI(); bit_delay_hi();
SCL_IN_HI();
while (!SCL_GET()); // clock stretch
while (!SCL_GET()) {}; // clock stretch
bit_delay_hi(); // attempt to fix corruption; unnecessary?
i2cm_start();
}
@ -136,7 +136,7 @@ void i2cm_stop()
{
SDA_OUTLO(); bit_delay_lo();
SCL_IN_HI(); bit_delay_hi();
while (!SCL_GET()); // clock stretch
while (!SCL_GET()) {}; // clock stretch
SDA_IN_HI(); bit_delay_hi();
bit_delay_hi();
bit_delay_hi();
@ -156,7 +156,7 @@ uint8_t i2cm_rd(uint8_t ack)
in <<= 1; // clock next bit
SCL_IN_HI();
while (!SCL_GET()); // clock stretch
while (!SCL_GET()) {}; // clock stretch
rd_delay();
@ -188,7 +188,7 @@ uint8_t i2cm_wr(uint8_t dat)
else { SDA_OUTLO(); }
SCL_IN_HI();
while (!SCL_GET()); // clock stretch
while (!SCL_GET()) {}; // clock stretch
wr_delay_hi();
dat <<= 1;
@ -198,7 +198,7 @@ uint8_t i2cm_wr(uint8_t dat)
SDA_IN_HI(); __nop(); // slave will now try to ack
SCL_IN_HI(); bit_delay_hi();
while (!SCL_GET()); // nothing should stretch here, but...
while (!SCL_GET()) {}; // nothing should stretch here, but...
ack = SDA_GET();
@ -233,3 +233,19 @@ void i2cm_wrbuf(const uint8_t *dat, uint16_t len)
}
// i2cm_stop();
}
int8_t i2cm_addr_scan(uint8_t addr)
{
uint8_t found;
// no low addresses
if ((addr >> 4) == 0) return 0;
// no high addresses
if ((addr & 0xf8) == 0xf8) return 0;
i2cm_start();
found = i2cm_wr(addr);
i2cm_stop();
return found ? 0 : addr;
}

71
firmware/retro_tech_fw/code/src/i2c_soft.h
View File

@ -2,12 +2,14 @@
* i2c_soft.h
*/
#ifndef USER_COMM_SOFT_I2C_MASTER_H_
#define USER_COMM_SOFT_I2C_MASTER_H_
#ifndef I2C_SOFT_MASTER_H_
#define I2C_SOFT_MASTER_H_
#include <ch32x035.h>
#include <stdint.h>
#include "global.h"
void i2cm_init();
@ -23,6 +25,69 @@ uint8_t i2cm_addr(uint8_t addr, uint8_t reading_bit);
void i2cm_rdbuf(uint8_t *dat, uint16_t len);
void i2cm_wrbuf(const uint8_t *dat, uint16_t len);
int8_t i2cm_addr_scan(uint8_t addr);
#endif /* USER_COMM_SOFT_I2C_MASTER_H_ */
#define i2c_init() i2cm_init()
#define i2c_start() { /*SetSysClock(SYSCLK_FREQ_USEI2C);*/ i2cm_start(); }
#define i2c_restart() i2cm_restart()
#define i2c_stop() { i2cm_stop(); /*SetSysClock(SYSCLK_FREQ_NORMAL);*/ }
#define i2c_rd(ack) i2cm_rd(ack)
#define i2c_wr(dat) i2cm_wr(dat)
#define i2c_addr(a, w) i2c_start(); i2cm_addr(a, w)
#define i2c_rdbuf(d, s) i2cm_rdbuf(d, s); i2c_stop()
#define i2c_wrbuf(d, s) i2cm_wrbuf(d, s); i2c_stop()
#define i2c_read(a, d, s) i2c_start(); \
i2cm_addr(a, 1); \
i2cm_rdbuf(d, s); \
i2c_stop()
#define i2c_read_reg8(a, r, d, s) i2c_start(); \
i2cm_addr(a, 0); \
i2cm_wr(r); \
i2cm_restart(); \
i2cm_addr(a, 1); \
i2cm_rdbuf(d, s); \
i2c_stop()
#define i2c_read_reg16(a, r, d, s) i2c_start(); \
i2cm_addr(a, 0); \
i2cm_wr(r >> 8); \
i2cm_wr(r & 0xff); \
i2cm_restart(); \
i2cm_addr(a, 1); \
i2cm_rdbuf(d, s); \
i2c_stop()
#define i2c_write(a, d, s) i2c_start(); \
i2cm_addr(a, 0); \
i2cm_wrbuf(d, s); \
i2c_stop()
#define i2c_write_reg8(a, r, d, s) i2c_start(); \
i2cm_addr(a, 0); \
i2cm_wr(r); \
i2cm_wrbuf(d, s); \
i2c_stop()
#define i2c_write_reg8_1b(a, r, d) i2c_start(); \
i2cm_addr(a, 0); \
i2cm_wr(r); \
i2cm_wr(d); \
i2c_stop()
#define i2c_write_reg16(a, r, d, s) i2c_start(); \
i2cm_addr(a, 0); \
i2cm_wr(r >> 8); \
i2cm_wr(r & 0xff); \
i2cm_wrbuf(d, s); \
i2c_stop()
#endif /* I2C_SOFT_MASTER_H_ */

12
firmware/retro_tech_fw/code/src/ui.c
View File

@ -348,11 +348,11 @@ void ui_init()
btn[0].cb_hold = ui_btn_hold_cb;
btn[0].cb_release = ui_btn_release_cb;
btn[1].hold = 420 >> 1;
btn[1].repeat = 0;
btn[1].cb_push = ui_btn_push_cb;
btn[1].cb_hold = ui_btn_hold_cb;
btn[1].cb_release = ui_btn_release_cb;
btn[2].hold = 420 >> 1;
btn[2].repeat = 0;
btn[2].cb_push = ui_btn_push_cb;
btn[2].cb_hold = ui_btn_hold_cb;
btn[2].cb_release = ui_btn_release_cb;
}
static void rgb_prog_random_timer_generate() {
@ -433,7 +433,7 @@ void ui_render()
// set brightness from knob 32 times/second
// (the knob value updates less frequently, but we need to fade nicely)
if (tick & 7 == 7) {
if ((tick & 7) == 7) {
w = adc_get_pot();
if (w < 2) w = 0;
else {

177
firmware/retro_tech_fw/code/system_ch32x035.c
View File

@ -10,38 +10,37 @@
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "ch32x035.h"
#include "global.h"
/*
* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after
* reset the HSI is used as SYSCLK source).
*/
//#define SYSCLK_FREQ_8MHz_HSI 8000000
#define SYSCLK_FREQ_12MHz_HSI 12000000
//#define SYSCLK_FREQ_16MHz_HSI 16000000
//#define SYSCLK_FREQ_24MHz_HSI 24000000
//#define SYSCLK_FREQ_48MHz_HSI HSI_VALUE
/* Clock Definitions */
/*
#ifdef SYSCLK_FREQ_8MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSI; /* System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSI; // System Clock Frequency (Core Clock)
#elif defined SYSCLK_FREQ_12MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_12MHz_HSI; /* System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = SYSCLK_FREQ_12MHz_HSI; // System Clock Frequency (Core Clock)
#elif defined SYSCLK_FREQ_16MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_16MHz_HSI; /* System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = SYSCLK_FREQ_16MHz_HSI; // System Clock Frequency (Core Clock)
#elif defined SYSCLK_FREQ_24MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz_HSI; /* System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz_HSI; // System Clock Frequency (Core Clock)
#else
uint32_t SystemCoreClock = HSI_VALUE; /* System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = HSI_VALUE; // System Clock Frequency (Core Clock)
#endif
*/
uint32_t SystemCoreClock;
__I uint8_t AHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8};
/* system_private_function_proto_types */
static void SetSysClock(void);
void SetSysClock(uint32_t clock);
/*
#ifdef SYSCLK_FREQ_8MHz_HSI
static void SetSysClockTo8_HSI( void );
#elif defined SYSCLK_FREQ_12MHz_HSI
@ -52,8 +51,11 @@ static void SetSysClockTo16_HSI( void );
static void SetSysClockTo24_HSI( void );
#elif defined SYSCLK_FREQ_48MHz_HSI
static void SetSysClockTo48_HSI( void );
#endif
*/
static void SetSysClockToX_HSI(uint32_t div, uint32_t latency);
/*********************************************************************
* @fn SystemInit
@ -68,7 +70,7 @@ void SystemInit (void)
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 |= (uint32_t)0x00000050;
RCC->CFGR0 &= (uint32_t)0xF8FFFF5F;
SetSysClock();
SetSysClock(SYSCLK_FREQ_NORMAL);
}
/*********************************************************************
@ -102,10 +104,23 @@ void SystemCoreClockUpdate (void)
*
* @return none
*/
static void SetSysClock(void)
void SetSysClock(uint32_t clock)
{
// GPIO_IPD_Unused();
switch (clock) {
case SYSCLK_FREQ_48MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV1, FLASH_ACTLR_LATENCY_2); break; }
case SYSCLK_FREQ_24MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV2, FLASH_ACTLR_LATENCY_1); break; }
case SYSCLK_FREQ_16MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV3, FLASH_ACTLR_LATENCY_1); break; }
case SYSCLK_FREQ_12MHz_HSI: { SetSysClockToX_HSI(RCC_HPRE_DIV4, FLASH_ACTLR_LATENCY_0); break; }
default: {
SetSysClockToX_HSI(RCC_HPRE_DIV6, FLASH_ACTLR_LATENCY_0);
clock = 8000000;
break;
}
}
SystemCoreClock = clock;
/*
#ifdef SYSCLK_FREQ_8MHz_HSI
SetSysClockTo8_HSI();
#elif defined SYSCLK_FREQ_12MHz_HSI
@ -116,130 +131,24 @@ static void SetSysClock(void)
SetSysClockTo24_HSI();
#elif defined SYSCLK_FREQ_48MHz_HSI
SetSysClockTo48_HSI();
#endif
*/
}
#ifdef SYSCLK_FREQ_8MHz_HSI
/*********************************************************************
* @fn SetSysClockTo8_HSI
*
* @brief Sets HSE as System clock source and configure HCLK prescalers.
*
* @return none
*/
static void SetSysClockTo8_HSI(void)
static void SetSysClockToX_HSI(uint32_t div, uint32_t latency)
{
uint32_t actlr;
uint32_t cfgr0;
/* Flash 2 wait state */
FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
actlr = FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
FLASH->ACTLR = (uint32_t)actlr | FLASH_ACTLR_LATENCY_2;
/* HCLK = SYSCLK = APB1 */
RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV6;
cfgr0 = RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
RCC->CFGR0 = (uint32_t)cfgr0 | (div & 0xf0);
/* Flash 0 wait state */
FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0;
/* Flash set wait state */
FLASH->ACTLR = (uint32_t)actlr | (latency & 0x03);
}
#elif defined SYSCLK_FREQ_12MHz_HSI
/*********************************************************************
* @fn SetSysClockTo12_HSI
*
* @brief Sets System clock frequency to 12MHz and configure HCLK prescalers.
*
* @return none
*/
static void SetSysClockTo12_HSI(void)
{
uint32_t ws;
ws = FLASH->ACTLR & (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
/* Flash 2 wait state */
FLASH->ACTLR = ws | (uint32_t)FLASH_ACTLR_LATENCY_2;
/* HCLK = SYSCLK = APB1 */
RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV4;
/* Flash 0 wait state */
FLASH->ACTLR = ws | (uint32_t)FLASH_ACTLR_LATENCY_0;
}
#elif defined SYSCLK_FREQ_16MHz_HSI
/*********************************************************************
* @fn SetSysClockTo16_HSI
*
* @brief Sets System clock frequency to 16MHz and configure HCLK prescalers.
*
* @return none
*/
static void SetSysClockTo16_HSI(void)
{
uint32_t ws;
ws = FLASH->ACTLR & (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
/* Flash 2 wait state */
FLASH->ACTLR = ws | (uint32_t)FLASH_ACTLR_LATENCY_2;
/* HCLK = SYSCLK = APB1 */
RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV3;
/* Flash 1 wait state */
FLASH->ACTLR = ws | (uint32_t)FLASH_ACTLR_LATENCY_1;
}
#elif defined SYSCLK_FREQ_24MHz_HSI
/*********************************************************************
* @fn SetSysClockTo24_HSI
*
* @brief Sets System clock frequency to 24MHz and configure HCLK prescalers.
*
* @return none
*/
static void SetSysClockTo24_HSI(void)
{
/* Flash 2 wait state */
FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
/* HCLK = SYSCLK = APB1 */
RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV2;
/* Flash 1 wait state */
FLASH->ACTLR = (uint32_t)FLASH_ACTLR_LATENCY_1;
}
#elif defined SYSCLK_FREQ_48MHz_HSI
/*********************************************************************
* @fn SetSysClockTo48_HSI
*
* @brief Sets System clock frequency to 48MHz and configure HCLK prescalers.
*
* @return none
*/
static void SetSysClockTo48_HSI(void)
{
/* Flash 2 wait state */
FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
/* HCLK = SYSCLK = APB1 */
RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
}
#endif

18
firmware/retro_tech_fw/code/system_ch32x035.h
View File

@ -14,15 +14,27 @@
#ifdef __cplusplus
extern "C" {
#endif
#endif
#define SYSCLK_FREQ_8MHz_HSI 8000000
#define SYSCLK_FREQ_12MHz_HSI 12000000
#define SYSCLK_FREQ_16MHz_HSI 16000000
#define SYSCLK_FREQ_24MHz_HSI 24000000
#define SYSCLK_FREQ_48MHz_HSI HSI_VALUE
extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
/* System_Exported_Functions */
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
void SystemInit(void);
void SystemCoreClockUpdate(void);
void SetSysClock(uint32_t clock);

4
firmware/retro_tech_fw/retro_tech_fw.launch
View File

@ -24,9 +24,9 @@
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerExecutable" value="${eclipse_home}toolchain/OpenOCD/bin/${openocd_executable}"/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerOther" value="-f &quot;${eclipse_home}toolchain/OpenOCD/bin/wch-riscv.cfg&quot;"/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbServerOther" value="-f &quot;${eclipse_home}toolchain/OpenOCD/bin/wch-riscv.cfg&quot; -c noload"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${eclipse_home}toolchain/RISC-V Embedded GCC/bin/riscv-none-embed-gdb.exe"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${eclipse_home}toolchain/RISC-V Embedded GCC12/bin/riscv-none-elf-gdb.exe"/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#xD;&#xA;set architecture riscv:rv32&#xD;&#xA;set remotetimeout unlimited&#xD;&#xA;set disassembler-options xw"/>
<stringAttribute key="com.mounriver.debug.gdbjtag.openocd.firstResetType" value="init"/>

25
firmware/retro_tech_fw/retro_tech_fw.wvproj
View File

@ -42,7 +42,10 @@
"post_script": "",
"post_script_description": "",
"excludeResources": [
"${project}/debug"
"${project}/debug",
"${project}/code/src/i2c_hw.c",
"${project}/code/src/i2c_hw.h",
"${project}/peripheral/src/ch32x035_pwr.c"
],
"optimization": {
"level": "size",
@ -85,7 +88,7 @@
"other_warning_flags": ""
},
"debugging": {
"debug_level": "default",
"debug_level": "max",
"debug_format": "default",
"generate_prof_information": false,
"generate_gprof_information": false,
@ -261,7 +264,7 @@
},
"createFlash": {
"enabled": true,
"outputFileFormat": "ihex",
"outputFileFormat": "ihexAndbinary",
"copy_only_section_text": false,
"copy_only_section_data": false,
"copy_only_sections": [],
@ -302,11 +305,11 @@
"tuning": "default",
"code_model": "default",
"small_data_limit": 8,
"align": "default",
"align": "strict",
"save_restore": true,
"other_target_flags": ""
},
"component_toolchain": "${WCH:Toolchain:GCC8}",
"component_toolchain": "${WCH:Toolchain:GCC12}",
"name": "bin/dbg",
"configVariables": []
}
@ -315,9 +318,9 @@
"flashConfig": {
"mcutype": "CH32X035",
"address": "0x08000000",
"target_path": "obj/retro_tech_fw.hex",
"clkSpeed": "High",
"debug_interface_mode": "1-wire serial",
"target_path": "bin/dbg/retro_tech_fw.hex",
"clkSpeed": "Middle",
"debug_interface_mode": "",
"erase": true,
"program": true,
"verify": true,
@ -337,16 +340,16 @@
"telnetport": 4444,
"tclport": 6666,
"configOptions": [
"-f \"${WCH:OpenOCD:default}/bin/wch-riscv.cfg\""
"-f \"${WCH:OpenOCD:default}/bin/wch-riscv.cfg\" -c noload"
],
"host": "localhost",
"port": 3333,
"skipDownloadBeforeDebug": false,
"skipDownloadBeforeDebug": true,
"enablePageEraser": false,
"enableNoZeroWaitingAreaFlash": false
},
"gdbCfg": {
"executable": "${WCH:Toolchain:GCC8}",
"executable": "${WCH:Toolchain:GCC12}",
"options": [],
"commands": [
"set mem inaccessible-by-default off",