trueControl
/
dc32-retro-tech-addon
1
0
Fork 0
Code Issues Pull Requests Releases 3 Activity

bootloader now functions 

several issues with the bootloader, from gpio config, UART baud, etc.

bootloader now does the following:
- enters bootloader mode upon holding BTN2 at power-up
- flashes LED4 rapidly to indicate in bootloader mode
- operates WCH ISP bootloader at 115200 baud on the UART pins on GAT header
This commit is contained in:
true 2024-08-04 06:39:10 -07:00
parent 5177b02ab0
commit d8bf688001
9 changed files with 82 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

BIN
firmware/bootloader_utility/CH375DLL.DLL Normal file
View File

Binary file not shown.

BIN
firmware/bootloader_utility/WCHMcuIAP_WinAPP.exe Normal file
View File

Binary file not shown.

2
firmware/ch32v003_bootloader/.cproject
View File

@ -147,5 +147,5 @@
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="refreshScope"/>
</cproject>

2
firmware/ch32v003_bootloader/.settings/language.settings.xml
View File

@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1665227271106920866" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-90729660781185971" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

9
firmware/ch32v003_bootloader/.settings/org.eclipse.core.resources.prefs
View File

@ -3,12 +3,21 @@ encoding//core/core_riscv.h=GBK
encoding//ld/ch32v003_bl.ld=GBK
encoding//periph/inc/ch32v00x.h=GBK
encoding//periph/inc/ch32v00x_gpio.h=GBK
encoding//periph/inc/ch32v00x_rcc.h=GBK
encoding//periph/inc/ch32v00x_tim.h=GBK
encoding//periph/inc/ch32v00x_usart.h=GBK
encoding//periph/src/ch32v00x_adc.c=GBK
encoding//periph/src/ch32v00x_flash.c=GBK
encoding//periph/src/ch32v00x_gpio.c=GBK
encoding//periph/src/ch32v00x_pwr.c=GBK
encoding//periph/src/ch32v00x_rcc.c=GBK
encoding//periph/src/ch32v00x_tim.c=GBK
encoding//periph/src/ch32v00x_usart.c=GBK
encoding//startup/startup_ch32v00x.S=GBK
encoding//user/ch32v00x_conf.h=GBK
encoding//user/ch32v00x_it.c=GBK
encoding//user/ch32v00x_it.h=GBK
encoding//user/flash.c=GBK
encoding//user/iap.c=GBK
encoding//user/iap.h=GBK
encoding//user/main.c=GBK

BIN
firmware/ch32v003_bootloader/bin/ch32v003_bootloader_factory.bin Normal file
View File

Binary file not shown.

40
firmware/ch32v003_bootloader/user/iap.c
View File

@ -38,17 +38,18 @@ u8 EP2_Rx_Buffer[USBD_DATA_SIZE];
void USART1_CFG(u32 baudrate)
{
uint32_t w;
// configure GPIO pins for USART mode
GPIOD->CFGLR = 0x48B44444; // Set GPIOD Mode, Speed
GPIOD->BCR = (((uint32_t)0x01) << 6);
GPIOD->BCR = (((uint32_t)0x01) << 6); // pull down RX line
w = GPIOD->CFGLR & ~(0x0ff00000);
GPIOD->CFGLR = w | 0x08a00000; // Set GPIOD Mode, Speed
// configure USART
USART1->CTLR2 |= USART_StopBits_1;
USART1->CTLR2 = USART_StopBits_1;
USART1->CTLR1 = USART_Parity_No | USART_Mode_Rx | USART_Mode_Tx; // Set USART mode, Parity
USART1->CTLR3 |= USART_HardwareFlowControl_None;
USART1->CTLR3 = USART_HardwareFlowControl_None;
USART1->BRR = (8 << 4) | 11; // 115200; use 0x34 for 460800
USART1->BRR = (13 << 4); // 115200; was originally 0x34 for 460800 supposedly?
USART1->CTLR1 |= ((uint16_t)0x2000); // enable USART
}
@ -151,27 +152,6 @@ void GPIO_Cfg_init(void)
}
/*********************************************************************
* @fn PC0_Check
*
* @brief Check PC0 state
*
* @return 1 - IAP
* 0 - APP
*/
u8 btn2_pushed(void)
{
// configure GPIOC
GPIOC->BCR = GPIO_Pin_4; // configure pull-down
GPIOC->CFGLR &= ~(0x04 << (4 * 4)); // clear PC4 config
GPIOC->CFGLR |= 0x08 << (4 * 4); // configure PC4 as pullup/down input
// GPIOC->BSHR = ((uint32_t)0x01);
// is button pushed (active high)?
return (GPIOC->INDR & GPIO_Pin_4); // ^ GPIO_Pin_4;
}
/*********************************************************************
* @fn UART3_SendMultiyData
*
@ -218,8 +198,10 @@ void UART1_SendData(u8 data)
*/
u8 Uart1_Rx(void)
{
while( USART_GetFlagStatus(USART1, USART_FLAG_RXNE) == RESET);
return USART_ReceiveData( USART1);
// todo: rewrite the whole receive routine to not depend
// on this easily breakable code.
while(USART_GetFlagStatus(USART1, USART_FLAG_RXNE) == RESET);
return USART_ReceiveData(USART1);
}
/*********************************************************************

2
firmware/ch32v003_bootloader/user/iap.h
View File

@ -52,7 +52,7 @@ void GPIO_Cfg_init(void);
void USART1_CFG(u32 baudrate);
void UART_Rx_Deal(void);
u8 btn2_pushed(void);
#endif

64
firmware/ch32v003_bootloader/user/main.c
View File

@ -25,6 +25,8 @@
#include "string.h"
#include "iap.h"
#define RSTSCKR_RMVF_Set ((uint32_t)0x01000000) // from ch32v00x_rcc.c
/*********************************************************************
* @fn IAP_2_APP
*
@ -34,11 +36,46 @@
*/
void IAP_2_APP(void)
{
RCC_ClearFlag();
RCC->RSTSCKR |= RSTSCKR_RMVF_Set; // RCC_ClearFlag();
SystemReset_StartMode(Start_Mode_USER);
//TIM1->BDTR = 0; // disable PWM outputs
//TIM1->CCER = 0; // disable PWM selects
//TIM1->CHCTLR1 = 0; // disable PWM mappings
//TIM1->CTLR1 = 0; // disable TIM1
//RCC->APB2PCENR = 0; // disable peripheral clocks
NVIC_SystemReset();
}
static inline void bootloader_led_flash()
{
uint32_t w;
// configure bootloader LED pins
GPIOA->BCR = GPIO_Pin_2; // LSENS_K
GPIOD->BSHR = GPIO_Pin_0; // LSENS_A
w = GPIOA->CFGLR & ~(0x0f << (4 * 2)); // clear PA2 config
GPIOA->CFGLR = w | 0x0a << (4 * 2); // and configure as AF_PP output
w = GPIOD->CFGLR & ~(0x0f << (4 * 0)); // clear PD0 config
GPIOD->CFGLR = w | 0x02 << (4 * 0); // and configure as PP output
TIM1->ATRLR = 40 - 1; // period
TIM1->PSC = 65535; // prescaler
TIM1->SWEVGR = TIM_PSCReloadMode_Immediate;
TIM1->CCER = TIM_CC2NE;
TIM1->CH2CVR = 30;
TIM1->CHCTLR1 = 0x60 << 8; // output enabled, PWM mode 1
TIM1->BDTR = TIM_MOE; // enable PWM outputs
TIM1->CTLR1 = TIM_CKD_1 | TIM_ARPE | TIM_CEN;
}
/*********************************************************************
* @fn main
*
@ -48,15 +85,32 @@ void IAP_2_APP(void)
*/
int main(void)
{
// Enable GPIOD,USART1, GPIOC clock
RCC->APB2PCENR |= (RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOC);
USART1_CFG(115200);
uint8_t w;
if(!btn2_pushed()) {
RCC->APB2PCENR = RCC_APB2Periph_GPIOC;
// configure GPIOC
GPIOC->BCR = GPIO_Pin_4; // configure pull-down
w = GPIOC->CFGLR & ~(0x0f << (4 * 4)); // clear PC4 config
GPIOC->CFGLR = w | 0x08 << (4 * 4); // configure PC4 as input with PU/PD
// had some issues with spurious activation happening,
// so spin a little bit. seems to help?
while (TIM1->CNT) __asm("nop");
// is button NOT pushed (active high)?
if (!(GPIOC->INDR & GPIO_Pin_4)) {
IAP_2_APP();
while(1);
}
RCC->APB2PCENR = (RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC |
RCC_APB2Periph_GPIOD | RCC_APB2Periph_TIM1 |
RCC_APB2Periph_AFIO | RCC_APB2Periph_USART1);
bootloader_led_flash();
USART1_CFG(115200);
while(1) {
if(USART_GetFlagStatus(USART1, USART_FLAG_RXNE) == RESET) {
UART_Rx_Deal();