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      <CDefine>-DSTM32H753I_EVAL2</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H743ZI</name>
    <status>Obsolete</status>
    <parent>stm32h743zitx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H743ZI</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H743ZI2</name>
    <status>Active</status>
    <parent>stm32h743zitx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H743ZI2</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H753ZI</name>
    <status>Active</status>
    <parent>stm32h753zitx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H753ZI</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H745ZI-Q</name>
    <status>Active</status>
    <parent>stm32h745zitx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H745ZI_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H755ZI-Q</name>
    <status>Active</status>
    <parent>stm32h755zitx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H755ZI_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H745I-DISCO</name>
    <status>Active</status>
    <parent>stm32h745xihx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H745I_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H747I-DISCO</name>
    <status>Active</status>
    <parent>stm32h747xihx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H747I_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H747I-DISC1</name>
    <status>Obsolete</status>
    <parent>stm32h747xihx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H747I_DISC1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H747I-EVAL</name>
    <status>Obsolete</status>
    <parent>stm32h747xihx</parent>
    <dbgIF>SWD</dbgIF>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H747I_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H757I-EVAL</name>
    <status>Active</status>
    <parent>stm32h757xihx</parent>
    <dbgIF>SWD</dbgIF>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H757I_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H750B-DK</name>
    <status>Active</status>
    <parent>stm32h750xbhx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H750B_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H7B3I-DK</name>
    <status>Active</status>
    <parent>stm32h7b3lihxq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H7B3I_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H7B3I-EVAL</name>
    <status>Active</status>
    <parent>stm32h7b3lihxq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H7B3I_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H7A3ZI-Q</name>
    <status>Active</status>
    <parent>stm32h7a3zitxq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H7A3ZI_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H735G-DK</name>
    <status>Active</status>
    <parent>stm32h735igkx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H735G_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H723ZG</name>
    <status>Active</status>
    <parent>stm32h723zgtx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H723ZG</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L053R8</name>
    <status>Active</status>
    <parent>stm32l053r8tx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L053R8</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L0538-DISCO</name>
    <status>Active</status>
    <parent>stm32l053c8tx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L0538_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L031K6</name>
    <status>Active</status>
    <parent>stm32l031k6tx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L031K6</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L073RZ</name>
    <status>Active</status>
    <parent>stm32l073rztx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L073RZ</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L073Z-EVAL</name>
    <status>Active</status>
    <parent>stm32l073vztx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L073Z_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L011K4</name>
    <status>Active</status>
    <parent>stm32l011k4tx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L011K4</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L010RB</name>
    <status>Active</status>
    <parent>stm32l010rbtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L010RB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-L072Z-LRWAN1</name>
    <status>Active</status>
    <parent>stm32l072czyx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DB_L072Z_LRWAN1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L-DISCOVERY</name>
    <status>Obsolete</status>
    <parent>stm32l152rbtx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L_DISCOVERY</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L100C-DISCO</name>
    <status>Obsolete</status>
    <parent>stm32l100rctx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L100C_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L152C-DISCO</name>
    <status>Active</status>
    <parent>stm32l152rctx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L152C_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L152D-EVAL</name>
    <status>Obsolete</status>
    <parent>stm32l152zdtx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L152D_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L152RE</name>
    <status>Active</status>
    <parent>stm32l152retx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L152RE</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L412KB</name>
    <status>Active</status>
    <parent>stm32l412kbux</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L412KB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L412RB-P</name>
    <status>Active</status>
    <parent>stm32l412rbtxp</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L412RB_P</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L452RE-P</name>
    <status>Active</status>
    <parent>stm32l452retxp</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L452RE_P</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L476RG</name>
    <status>Active</status>
    <parent>stm32l476rgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L476RG</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L476G-DISCO</name>
    <status>Obsolete</status>
    <parent>stm32l476vgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L476G_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-L475E-IOT01A1</name>
    <status>Active</status>
    <parent>stm32l475vgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DB_L475E_IOT01A1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-L475E-IOT01A2</name>
    <status>Active</status>
    <parent>stm32l475vgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DB_L475E_IOT01A2</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L496G-DISCO</name>
    <status>Active</status>
    <parent>stm32l496agix</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L496G_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L476G-EVAL</name>
    <status>Active</status>
    <parent>stm32l476zgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L476G_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L432KC</name>
    <status>Active</status>
    <parent>stm32l432kcux</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L432KC</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L433RC-P</name>
    <status>Active</status>
    <parent>stm32l433rctxp</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L433RC_P</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L452RE</name>
    <status>Active</status>
    <parent>stm32l452retx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L452RE</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L4A6ZG</name>
    <status>Active</status>
    <parent>stm32l4a6zgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L4A6ZG</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L496ZG</name>
    <status>Active</status>
    <parent>stm32l496zgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L496ZG</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L496ZG-P</name>
    <status>Active</status>
    <parent>stm32l496zgtxp</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L496ZG_P</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L4R5ZI</name>
    <status>Active</status>
    <parent>stm32l4r5zitx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L4R5ZI</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L4R5ZI-P</name>
    <status>Active</status>
    <parent>stm32l4r5zitxp</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L4R5ZI_P</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L4R9I-DISCO</name>
    <status>Active</status>
    <parent>stm32l4r9aiix</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L4R9I_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L4R9I-EVAL</name>
    <status>Active</status>
    <parent>stm32l4r9aiix</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L4R9I_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STEVAL-MKSBOX1V1</name>
    <status>Active</status>
    <parent>stm32l4r9zijx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTEVAL_MKSBOX1V1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STEVAL-STWINKT1</name>
    <status>Active</status>
    <parent>stm32l4r9zijx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTEVAL_STWINKT1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STEVAL-STWINKT1B</name>
    <status>Active</status>
    <parent>stm32l4r9zijx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTEVAL_STWINKT1B</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L4P5G-DK</name>
    <status>Active</status>
    <parent>stm32l4p5agixp</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L4P5G_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L4P5ZG</name>
    <status>Active</status>
    <parent>stm32l4p5zgtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L4P5ZG</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-L462E-CELL1</name>
    <status>Active</status>
    <parent>stm32l462reyx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DB_L462E_CELL1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-L4S5I-IOT01A</name>
    <status>Active</status>
    <parent>stm32l4s5vitx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DB_L4S5I_IOT01A</CDefine>
    </CDefines>
  </board>
  <board>
    <name>P-L496G-CELL01</name>
    <status>Obsolete</status>
    <parent>stm32l496agix</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DP_L496G_CELL01</CDefine>
    </CDefines>
  </board>
  <board>
    <name>P-L496G-CELL02</name>
    <status>Active</status>
    <parent>stm32l496agix</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DP_L496G_CELL02</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-L552ZE-Q</name>
    <status>Active</status>
    <parent>stm32l552zetxq</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_L552ZE_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L562E-DK</name>
    <status>Active</status>
    <parent>stm32l562qeixq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L562E_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32L552E-EV</name>
    <status>Active</status>
    <parent>stm32l552zetxq</parent>
    <dbgIF>SWD</dbgIF>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32L552E_EV</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-U575ZI-Q</name>
    <status>Active</status>
    <parent>stm32u575zitxq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_U575ZI_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-U585I-IOT02A</name>
    <status>Active</status>
    <parent>stm32u585aiixq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DB_U585I_IOT02A</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32U575I-EV</name>
    <status>Active</status>
    <parent>stm32u575aiixq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32U575I_EV</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STEVAL-STWINBX1</name>
    <status>Active</status>
    <parent>stm32u585aiixq</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTEVAL_STWINBX1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-U5A5ZJ-Q</name>
    <status>Coming soon</status>
    <parent>stm32u5a5zjtxq</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_U5A5ZJ_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32U5A9J-DK</name>
    <status>Coming soon</status>
    <parent>stm32u5a9njhxq</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32U5A9J_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-U545RE-Q</name>
    <status>Coming soon</status>
    <parent>stm32u545retxq</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_U545RE_Q</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H563ZI</name>
    <status>Coming soon</status>
    <parent>stm32h563zitx</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H563ZI</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32H573I-DK</name>
    <status>Coming soon</status>
    <parent>stm32h573iikxq</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32H573I_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-H503RB</name>
    <status>Coming soon</status>
    <parent>stm32h503rbtx</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_H503RB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32C0116-DK</name>
    <status>Active</status>
    <parent>stm32c011f6ux</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32C0116_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-C031C6</name>
    <status>Active</status>
    <parent>stm32c031c6tx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_C031C6</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32C0316-DK</name>
    <status>Active</status>
    <parent>stm32c031c6tx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32C0316_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G031K8</name>
    <status>Active</status>
    <parent>stm32g031k8tx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G031K8</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G070RB</name>
    <status>Active</status>
    <parent>stm32g070rbtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G070RB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G071RB</name>
    <status>Active</status>
    <parent>stm32g071rbtx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G071RB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G0316-DISCO</name>
    <status>Active</status>
    <parent>stm32g031j6mx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G0316_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G071B-DISCO</name>
    <status>Active</status>
    <parent>stm32g071rbtx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G071B_DISCO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G081B-EVAL</name>
    <status>Active</status>
    <parent>stm32g081rbtx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G081B_EVAL</CDefine>
      <CDefine>-DUSE_STM32G081B_EVAL_REVC </CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G0C1E-EV</name>
    <status>Active</status>
    <parent>stm32g0c1vetx</parent>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G0C1E_EV</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G0B1RE</name>
    <status>Active</status>
    <parent>stm32g0b1retx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G0B1RE</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-G474E-DPOW1</name>
    <status>Active</status>
    <parent>stm32g474retx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DB_G474E_DPOW1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G474E-EVAL</name>
    <status>Active</status>
    <parent>stm32g474qetx</parent>
    <dbgIF>SWD</dbgIF>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G474E_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G474E-EVAL1</name>
    <status>Obsolete</status>
    <parent>stm32g474qetx</parent>
    <dbgIF>SWD</dbgIF>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G474E_EVAL1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32G484E-EVAL</name>
    <status>Active</status>
    <parent>stm32g484qetx</parent>
    <dbgIF>SWD</dbgIF>
    <dbgDEV>ST-LinkV2</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32G484E_EVAL</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G474RE</name>
    <status>Active</status>
    <parent>stm32g474retx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G474RE</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G431KB</name>
    <status>Active</status>
    <parent>stm32g431kbtx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G431KB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G431RB</name>
    <status>Active</status>
    <parent>stm32g431rbtx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G431RB</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-G491RE</name>
    <status>Active</status>
    <parent>stm32g491retx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_G491RE</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-G473E-ZEST1S</name>
    <status>Coming soon</status>
    <parent>stm32g473qetx</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DB_G473E_ZEST1S</CDefine>
    </CDefines>
  </board>
  <board>
    <name>P-NUCLEO-WB55-USBDONGLE</name>
    <status>Active</status>
    <parent>stm32wb55cgux</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DP_NUCLEO_WB55_USBDONGLE</CDefine>
    </CDefines>
  </board>
  <board>
    <name>P-NUCLEO-WB55-NUCLEO</name>
    <status>Active</status>
    <parent>stm32wb55rgvx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DP_NUCLEO_WB55_NUCLEO</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-WB55RG</name>
    <status>Active</status>
    <parent>stm32wb55rgvx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_WB55RG</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STM32WB5MM-DK</name>
    <status>Active</status>
    <parent>stm32wb5mmghx</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DSTM32WB5MM_DK</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STEVAL-ASTRA1B</name>
    <status>Active</status>
    <parent>stm32wb5mmghx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTEVAL_ASTRA1B</CDefine>
    </CDefines>
  </board>
  <board>
    <name>STEVAL-PROTEUS1</name>
    <status>Active</status>
    <parent>stm32wb5mmghx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DSTEVAL_PROTEUS1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-WB15CC</name>
    <status>Active</status>
    <parent>stm32wb15ccux</parent>
    <dbgDEV>ST-LinkV2-1</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_WB15CC</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-WB1M-WPAN1</name>
    <status>Active</status>
    <parent>stm32wb1mmchx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DB_WB1M_WPAN1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-WL55JC1</name>
    <status>Active</status>
    <parent>stm32wl55jcix</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_WL55JC1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-WL55JC2</name>
    <status>Active</status>
    <parent>stm32wl55jcix</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_WL55JC2</CDefine>
    </CDefines>
  </board>
  <board>
    <name>B-WL5M-SUBG1</name>
    <status>Active</status>
    <parent>stm32wl5mochx</parent>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DB_WL5M_SUBG1</CDefine>
    </CDefines>
  </board>
  <board>
    <name>NUCLEO-WBA52CG</name>
    <status>Coming soon</status>
    <parent>stm32wba52cgux</parent>
    <boardtype></boardtype>
    <boardorigin></boardorigin>
    <dbgDEV>ST-LinkV3</dbgDEV>
    <CDefines>
      <CDefine>-DNUCLEO_WBA52CG</CDefine>
    </CDefines>
  </board>
  <mcu>
    <name>HK32F030MF4P6</name>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>HK32F030Mx.svd</name>
          <version>v1r0</version>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
  </mcu>
  <mcu>
    <name>Air32F103xx</name>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>AIR32F103xx.svd</name>
          <version>v1r0</version>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
  </mcu>
  <mcu>
    <name>GD32F1x0</name>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>GD32F1x0.svd</name>
          <version>v1r0</version>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
  </mcu>
  <mcu>
    <name>STM32C011D6Yx</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP12</package>
    <!--XMLfilename = STM32C011D6Yx-->
    <!--STVPdevicename = STM32C011x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011D6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C011F4Px</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32C011F(4-6)Px-->
    <!--STVPdevicename = STM32C011x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C011F6Px</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32C011F(4-6)Px-->
    <!--STVPdevicename = STM32C011x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C011F4Ux</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN20</package>
    <!--XMLfilename = STM32C011F(4-6)Ux-->
    <!--STVPdevicename = STM32C011x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011F4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C011F6Ux</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN20</package>
    <!--XMLfilename = STM32C011F(4-6)Ux-->
    <!--STVPdevicename = STM32C011x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011F6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C011J4Mx</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>SO8N</package>
    <!--XMLfilename = STM32C011J(4-6)Mx-->
    <!--STVPdevicename = STM32C011x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011J4Mx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C011J6Mx</name>
    <status>Active</status>
    <dieId>0443</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C011.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>SO8N</package>
    <!--XMLfilename = STM32C011J(4-6)Mx-->
    <!--STVPdevicename = STM32C011x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C011J6Mx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031C4Tx</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32C031C(4-6)Tx-->
    <!--STVPdevicename = STM32C031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031C6Tx</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32C031C(4-6)Tx-->
    <!--STVPdevicename = STM32C031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031C4Ux</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32C031C(4-6)Ux-->
    <!--STVPdevicename = STM32C031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031C4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031C6Ux</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32C031C(4-6)Ux-->
    <!--STVPdevicename = STM32C031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031F4Px</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32C031F(4-6)Px-->
    <!--STVPdevicename = STM32C031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031F6Px</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32C031F(4-6)Px-->
    <!--STVPdevicename = STM32C031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031G4Ux</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32C031G(4-6)Ux-->
    <!--STVPdevicename = STM32C031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031G6Ux</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32C031G(4-6)Ux-->
    <!--STVPdevicename = STM32C031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031K4Tx</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32C031K(4-6)Tx-->
    <!--STVPdevicename = STM32C031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031K6Tx</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32C031K(4-6)Tx-->
    <!--STVPdevicename = STM32C031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031K4Ux</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32C031K(4-6)Ux-->
    <!--STVPdevicename = STM32C031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32C031K6Ux</name>
    <status>Active</status>
    <dieId>0453</dieId>
    <parent>stm32c0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32C031.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32C031K(4-6)Ux-->
    <!--STVPdevicename = STM32C031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32C031K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030C6Tx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F030C6Tx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030C8Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F030C8Tx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030CCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F030CCTx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030F4Px</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F030F4Px-->
    <!--STVPdevicename = STM32F050x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030K6Tx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F030K6Tx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030R8Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F030R8Tx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F030RCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F030RCTx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F030RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F070C6Tx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F070C6Tx-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F070C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F070CBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F070CBTx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F070CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F070F6Px</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F070F6Px-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F070F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F070RBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F070RBTx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F070RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031C4Tx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F031C(4-6)Tx-->
    <!--STVPdevicename = STM32F050x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031C6Tx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F031C(4-6)Tx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031E6Yx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32F031E6Yx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031E6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031F4Px</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F031F(4-6)Px-->
    <!--STVPdevicename = STM32F050x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031F6Px</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F031F(4-6)Px-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031G4Ux</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32F031G(4-6)Ux-->
    <!--STVPdevicename = STM32F050x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031G6Ux</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32F031G(4-6)Ux-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031K4Ux</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F031K(4-6)Ux-->
    <!--STVPdevicename = STM32F050x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031K6Ux</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F031K(4-6)Ux-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F031K6Tx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F031K6Tx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F031K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051C4Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F051C4Tx-->
    <!--STVPdevicename = STM32F051x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051C4Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F051C4Ux-->
    <!--STVPdevicename = STM32F051x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051C4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051C6Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F051C6Tx-->
    <!--STVPdevicename = STM32F051x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051C6Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F051C6Ux-->
    <!--STVPdevicename = STM32F051x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051C8Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F051C8Tx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051C8Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F051C8Ux-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051K4Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F051K4Tx-->
    <!--STVPdevicename = STM32F051x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051K4Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F051K4Ux-->
    <!--STVPdevicename = STM32F051x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051K6Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F051K6Tx-->
    <!--STVPdevicename = STM32F051x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051K6Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F051K6Ux-->
    <!--STVPdevicename = STM32F051x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051K8Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F051K8Tx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051K8Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F051K8Ux-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051R4Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F051R4Tx-->
    <!--STVPdevicename = STM32F051x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051R4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051R6Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F051R6Tx-->
    <!--STVPdevicename = STM32F051x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051R8Hx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F051R8Hx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051R8Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F051R8Tx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F051T8Yx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32F051T8Yx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F051T8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071C8Tx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F071C(8-B)Tx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071CBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F071C(8-B)Tx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071C8Ux</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F071C(8-B)Ux-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071CBUx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F071C(8-B)Ux-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071CBYx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F071CBYx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071RBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F071RBTx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071V8Hx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F071V(8-B)Hx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071VBHx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F071V(8-B)Hx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071V8Tx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F071V(8-B)Tx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F071VBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F071V(8-B)Tx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F071VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091CBTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F091C(B-C)Tx-->
    <!--STVPdevicename = STM32F091xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091CCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F091C(B-C)Tx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091CBUx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F091C(B-C)Ux-->
    <!--STVPdevicename = STM32F091xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091CCUx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F091C(B-C)Ux-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091RBTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F091R(B-C)Tx-->
    <!--STVPdevicename = STM32F091xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091RCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F091R(B-C)Tx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091RCHx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F091RCHx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091RCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091RCYx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F091RCYx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091VBTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F091V(B-C)Tx-->
    <!--STVPdevicename = STM32F091xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091VCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F091V(B-C)Tx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F091VCHx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x1.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F091VCHx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F091VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042C4Tx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F042C(4-6)Tx-->
    <!--STVPdevicename = STM32F042x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042C6Tx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F042C(4-6)Tx-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042C4Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F042C(4-6)Ux-->
    <!--STVPdevicename = STM32F042x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042C4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042C6Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F042C(4-6)Ux-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042F4Px</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F042F4Px-->
    <!--STVPdevicename = STM32F042x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042F6Px</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F042F6Px-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042G4Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32F042G(4-6)Ux-->
    <!--STVPdevicename = STM32F042x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042G6Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32F042G(4-6)Ux-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042K4Tx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F042K(4-6)Tx-->
    <!--STVPdevicename = STM32F042x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042K6Tx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F042K(4-6)Tx-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042K4Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F042K(4-6)Ux-->
    <!--STVPdevicename = STM32F042x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042K6Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F042K(4-6)Ux-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F042T6Yx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32F042T6Yx-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F042T6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072C8Tx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F072C(8-B)Tx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072CBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F072C(8-B)Tx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072C8Ux</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F072C(8-B)Ux-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072CBUx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F072C(8-B)Ux-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072CBYx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F072CBYx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072R8Tx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F072R(8-B)Tx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072RBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F072R(8-B)Tx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072RBHx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F072RBHx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072RBIx</name>
    <status>Obsolete</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F072RBIx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072V8Hx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F072V(8-B)Hx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072VBHx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F072V(8-B)Hx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072V8Tx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F072V(8-B)Tx-->
    <!--STVPdevicename = STM32F072x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F072VBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x2.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F072V(8-B)Tx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F072VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F038C6Tx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F038C6Tx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F038C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F038E6Yx</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32F038E6Yx-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F038E6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F038F6Px</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32F038F6Px-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F038F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F038G6Ux</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32F038G6Ux-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F038G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F038K6Ux</name>
    <status>Active</status>
    <dieId>0444</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F038K6Ux-->
    <!--STVPdevicename = STM32F050x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F038K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F048C6Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F048C6Ux-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F048C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F048G6Ux</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32F048G6Ux-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F048G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F048T6Yx</name>
    <status>Active</status>
    <dieId>0445</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32F048T6Yx-->
    <!--STVPdevicename = STM32F042x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F048T6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F058C8Ux</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F058C8Ux-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F058C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F058R8Hx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F058R8Hx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F058R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F058R8Tx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F058R8Tx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F058R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F058T8Yx</name>
    <status>Active</status>
    <dieId>0440</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32F058T8Yx-->
    <!--STVPdevicename = STM32F051x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F058T8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078CBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F078CBTx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078CBUx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F078CBUx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078CBYx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F078CBYx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078RBHx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F078RBHx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078RBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F078RBTx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078VBHx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F078VBHx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F078VBTx</name>
    <status>Active</status>
    <dieId>0448</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F078VBTx-->
    <!--STVPdevicename = STM32F072xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F078VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098CCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F098CCTx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098CCUx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F098CCUx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098RCHx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F098RCHx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098RCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098RCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F098RCTx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098RCYx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F098RCYx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098VCHx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F098VCHx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F098VCTx</name>
    <status>Active</status>
    <dieId>0442</dieId>
    <parent>stm32f0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F0x8.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F098VCTx-->
    <!--STVPdevicename = STM32F091xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F098VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100C4Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F100C(4-6)Tx-->
    <!--STVPdevicename = STM32F100x4xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100C6Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F100C(4-6)Tx-->
    <!--STVPdevicename = STM32F100x6xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100C8Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F100C(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100CBTx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F100C(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100R4Hx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F100R(4-6)Hx-->
    <!--STVPdevicename = STM32F100x4xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100R4Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100R6Hx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F100R(4-6)Hx-->
    <!--STVPdevicename = STM32F100x6xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100R4Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(4-6)Tx-->
    <!--STVPdevicename = STM32F100x4xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100R4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100R6Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(4-6)Tx-->
    <!--STVPdevicename = STM32F100x6xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100R8Hx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F100R(8-B)Hx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100RBHx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F100R(8-B)Hx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100R8Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100RBTx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100RCTx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100RDTx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100RETx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F100R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100V8Tx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F100V(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100VBTx</name>
    <status>Active</status>
    <dieId>0420</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F100V(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100VCTx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F100V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100VDTx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F100V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100VETx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F100V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100ZCTx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F100Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100ZDTx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F100Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F100ZETx</name>
    <status>Active</status>
    <dieId>0428</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F100.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F100Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F100ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101C4Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F101C(4-6)Tx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101C6Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F101C(4-6)Tx-->
    <!--STVPdevicename = STM32F101x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101C8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F101C(8-B)Tx-->
    <!--STVPdevicename = STM32F101x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101CBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F101C(8-B)Tx-->
    <!--STVPdevicename = STM32F101xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101C8Ux</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F101C(8-B)Ux-->
    <!--STVPdevicename = STM32F101x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101CBUx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F101C(8-B)Ux-->
    <!--STVPdevicename = STM32F101xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101R4Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(4-6)Tx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101R4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101R6Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(4-6)Tx-->
    <!--STVPdevicename = STM32F101x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101R8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(8-B)Tx-->
    <!--STVPdevicename = STM32F101x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(8-B)Tx-->
    <!--STVPdevicename = STM32F101xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RCTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RDTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RETx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RFTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(F-G)Tx-->
    <!--STVPdevicename = STM32F101xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RGTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F101R(F-G)Tx-->
    <!--STVPdevicename = STM32F101xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101RBHx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F101RBHx-->
    <!--STVPdevicename = STM32F101xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101T4Ux</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F101T(4-6)Ux-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101T4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101T6Ux</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F101T(4-6)Ux-->
    <!--STVPdevicename = STM32F101x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101T6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101T8Ux</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F101T(8-B)Ux-->
    <!--STVPdevicename = STM32F101x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101T8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101TBUx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F101T(8-B)Ux-->
    <!--STVPdevicename = STM32F101xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101TBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101V8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(8-B)Tx-->
    <!--STVPdevicename = STM32F101x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101VBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(8-B)Tx-->
    <!--STVPdevicename = STM32F101xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101VCTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101VDTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101VETx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101VFTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(F-G)Tx-->
    <!--STVPdevicename = STM32F101xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101VFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101VGTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F101V(F-G)Tx-->
    <!--STVPdevicename = STM32F101xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101ZCTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F101Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101ZDTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F101Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101ZETx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F101Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F101xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101ZFTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F101Z(F-G)Tx-->
    <!--STVPdevicename = STM32F101xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101ZFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F101ZGTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F101.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F101Z(F-G)Tx-->
    <!--STVPdevicename = STM32F101xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F101ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102C4Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F102C(4-6)Tx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102C6Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F102C(4-6)Tx-->
    <!--STVPdevicename = STM32F103x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102C8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F102C(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102CBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F102C(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102R4Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F102R(4-6)Tx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102R4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102R6Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F102R(4-6)Tx-->
    <!--STVPdevicename = STM32F103x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102R8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F102R(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F102RBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F102.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F102R(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAMEXEC</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F102RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103C4Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F103C(4-6)Tx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103C6Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F103C(4-6)Tx-->
    <!--STVPdevicename = STM32F103x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103C8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F103C(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103CBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F103C(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103C6Ux</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F103C6Ux-->
    <!--STVPdevicename = STM32F103x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103CBUx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F103CBUx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103R4Hx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F103R(4-6)Hx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103R4Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103R6Hx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F103R(4-6)Hx-->
    <!--STVPdevicename = STM32F103x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103R4Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(4-6)Tx-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103R4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103R6Tx</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(4-6)Tx-->
    <!--STVPdevicename = STM32F103x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103R8Hx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F103R(8-B)Hx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RBHx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32F103R(8-B)Hx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103R8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RCTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RDTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RETx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RCYx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F103R(C-D-E)Yx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RDYx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F103R(C-D-E)Yx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RDYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103REYx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F103R(C-D-E)Yx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RFTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(F-G)Tx-->
    <!--STVPdevicename = STM32F103xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103RGTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F103R(F-G)Tx-->
    <!--STVPdevicename = STM32F103xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103T4Ux</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F103T(4-6)Ux-->
    <!--STVPdevicename = STM32F103x4xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1800</size>
        <!--end = 0x200017FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103T4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103T6Ux</name>
    <status>Active</status>
    <dieId>0412</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F103T(4-6)Ux-->
    <!--STVPdevicename = STM32F103x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103T6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103T8Ux</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F103T(8-B)Ux-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103T8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103TBUx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN36</package>
    <!--XMLfilename = STM32F103T(8-B)Ux-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103TBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103V8Hx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F103V(8-B)Hx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VBHx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F103V(8-B)Hx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103V8Tx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(8-B)Tx-->
    <!--STVPdevicename = STM32F103x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VBTx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(8-B)Tx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VCHx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F103V(C-D-E)Hx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VDHx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F103V(C-D-E)Hx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VEHx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F103V(C-D-E)Hx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VCTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VDTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VETx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VFTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(F-G)Tx-->
    <!--STVPdevicename = STM32F103xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VGTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F103V(F-G)Tx-->
    <!--STVPdevicename = STM32F103xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103VBIx</name>
    <status>Active</status>
    <dieId>0410</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F103VBIx-->
    <!--STVPdevicename = STM32F103xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103VBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZCHx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA144</package>
    <!--XMLfilename = STM32F103Z(C-D-E)Hx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZDHx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA144</package>
    <!--XMLfilename = STM32F103Z(C-D-E)Hx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZEHx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA144</package>
    <!--XMLfilename = STM32F103Z(C-D-E)Hx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZCTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F103Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZDTx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F103Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZETx</name>
    <status>Active</status>
    <dieId>0414</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F103Z(C-D-E)Tx-->
    <!--STVPdevicename = STM32F103xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZFHx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA144</package>
    <!--XMLfilename = STM32F103Z(F-G)Hx-->
    <!--STVPdevicename = STM32F103xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZFHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZGHx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA144</package>
    <!--XMLfilename = STM32F103Z(F-G)Hx-->
    <!--STVPdevicename = STM32F103xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZFTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F103Z(F-G)Tx-->
    <!--STVPdevicename = STM32F103xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F103ZGTx</name>
    <status>Active</status>
    <dieId>0430</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F103.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F103Z(F-G)Tx-->
    <!--STVPdevicename = STM32F103xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F103ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105R8Tx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F105R(8-B-C)Tx-->
    <!--STVPdevicename = STM32F105x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105RBTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F105R(8-B-C)Tx-->
    <!--STVPdevicename = STM32F107xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105RCTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F105R(8-B-C)Tx-->
    <!--STVPdevicename = STM32F107xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105V8Hx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F105V(8-B)Hx-->
    <!--STVPdevicename = STM32F105x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105VBHx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F105V(8-B)Hx-->
    <!--STVPdevicename = STM32F107xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105V8Tx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F105V(8-B-C)Tx-->
    <!--STVPdevicename = STM32F105x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105VBTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F105V(8-B-C)Tx-->
    <!--STVPdevicename = STM32F107xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F105VCTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F105V(8-B-C)Tx-->
    <!--STVPdevicename = STM32F107xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F105VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F107RBTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F107R(B-C)Tx-->
    <!--STVPdevicename = STM32F107xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F107RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F107RCTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F107R(B-C)Tx-->
    <!--STVPdevicename = STM32F107xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F107RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F107VBTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F107V(B-C)Tx-->
    <!--STVPdevicename = STM32F107xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F107VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F107VCTx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F107V(B-C)Tx-->
    <!--STVPdevicename = STM32F107xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F107VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F107VCHx</name>
    <status>Active</status>
    <dieId>0418</dieId>
    <parent>stm32f1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F107.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LFBGA100</package>
    <!--XMLfilename = STM32F107VCHx-->
    <!--STVPdevicename = STM32F107xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F107VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RBTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F205R(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F205xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x2001C000</address>
        <size>0x4000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RCTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F205R(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F205xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x2001C000</address>
        <size>0x4000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F205R(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RFTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F205R(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F205R(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205REYx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP66</package>
    <!--XMLfilename = STM32F205R(E-G)Yx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RGYx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP66</package>
    <!--XMLfilename = STM32F205R(E-G)Yx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205RGEx</name>
    <status>Obsolete</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>EWLCSP66</package>
    <!--XMLfilename = STM32F205RGEx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205RGEx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205VBTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F205V(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F205xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x2001C000</address>
        <size>0x4000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205VCTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F205V(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F205xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x2001C000</address>
        <size>0x4000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205VETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F205V(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205VFTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F205V(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205VFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205VGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F205V(B-C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205ZCTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F205Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F205xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x2001C000</address>
        <size>0x4000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205ZETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F205Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205ZFTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F205Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205ZFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F205ZGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F205Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F205ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F215RETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F215R(E-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F215RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F215RGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F215R(E-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F215RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F215VETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F215V(E-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F215VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F215VGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F215V(E-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F215VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F215ZETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F215Z(E-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F215ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F215ZGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F215.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F215Z(E-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F215ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207ICHx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Hx-->
    <!--STVPdevicename = STM32F207xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207ICHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207IEHx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Hx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207IEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207IFHx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Hx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207IFHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207IGHx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Hx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207IGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207ICTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207ICTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207IETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207IFTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207IFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207IGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F207I(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207VCTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F207V(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207VETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F207V(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207VFTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F207V(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207VFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207VGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F207V(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207ZCTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F207Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207ZETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F207Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207ZFTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F207Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F207xF-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xC0000</size>
        <!--end = 0x80BFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207ZFTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F207ZGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F207Z(C-E-F-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F207ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217IEHx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F217I(E-G)Hx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217IEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217IGHx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F217I(E-G)Hx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217IGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217IETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F217I(E-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217IGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F217I(E-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217VETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F217V(E-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217VGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F217V(E-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217ZETx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F217Z(E-G)Tx-->
    <!--STVPdevicename = STM32F217xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F217ZGTx</name>
    <status>Active</status>
    <dieId>0411</dieId>
    <parent>stm32f2</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F217.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F217Z(E-G)Tx-->
    <!--STVPdevicename = STM32F217xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F217ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301C6Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F301C(6-8)Tx-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301C8Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F301C(6-8)Tx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301C8Yx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F301C8Yx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301C8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301K6Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F301K(6-8)Tx-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301K8Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F301K(6-8)Tx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301K6Ux</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F301K(6-8)Ux-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301K8Ux</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F301K(6-8)Ux-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301R6Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F301R(6-8)Tx-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F301R8Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F301.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F301R(6-8)Tx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F301R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302C6Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F302C(6-8)Tx-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302C8Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F302C(6-8)Tx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302CBTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F302C(B-C)Tx-->
    <!--STVPdevicename = STM32F302xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302CCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F302C(B-C)Tx-->
    <!--STVPdevicename = STM32F302xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302C8Yx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F302C8Yx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302C8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302K6Ux</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F302K(6-8)Ux-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302K8Ux</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F302K(6-8)Ux-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302R6Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F302R(6-8)Tx-->
    <!--STVPdevicename = STM32F302x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302R8Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F302R(6-8)Tx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302RBTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F302R(B-C)Tx-->
    <!--STVPdevicename = STM32F302xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302RCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F302R(B-C)Tx-->
    <!--STVPdevicename = STM32F302xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302RDTx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F302R(D-E)Tx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302RETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F302R(D-E)Tx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VBTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F302V(B-C)Tx-->
    <!--STVPdevicename = STM32F302xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F302V(B-C)Tx-->
    <!--STVPdevicename = STM32F302xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VDHx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F302V(D-E)Hx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VEHx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F302V(D-E)Hx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VDTx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F302V(D-E)Tx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F302V(D-E)Tx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302VCYx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32F302VCYx-->
    <!--STVPdevicename = STM32F302xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302VCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302ZDTx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F302Z(D-E)Tx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F302ZETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F302.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F302Z(D-E)Tx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F302ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303C6Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F303C(6-8)Tx-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303C8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F303C(6-8)Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303CBTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F303C(B-C)Tx-->
    <!--STVPdevicename = STM32F303xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303CCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F303C(B-C)Tx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303C8Yx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F303C8Yx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303C8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303K6Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F303K(6-8)Tx-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303K8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F303K(6-8)Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303R6Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F303R(6-8)Tx-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303R8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F303R(6-8)Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303RBTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F303R(B-C)Tx-->
    <!--STVPdevicename = STM32F303xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303RCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F303R(B-C)Tx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303RDTx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F303R(D-E)Tx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303RETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F303R(D-E)Tx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VBTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F303V(B-C)Tx-->
    <!--STVPdevicename = STM32F303xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F303V(B-C)Tx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VDHx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F303V(D-E)Hx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VEHx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F303V(D-E)Hx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VDTx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F303V(D-E)Tx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F303V(D-E)Tx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VCYx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32F303VCYx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303VEYx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32F303VEYx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303VEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303ZDTx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F303Z(D-E)Tx-->
    <!--STVPdevicename = STM32F303xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303ZETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F303Z(D-E)Tx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334C4Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F334C(4-6-8)Tx-->
    <!--STVPdevicename = STM32F334x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334C6Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F334C(4-6-8)Tx-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334C8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F334C(4-6-8)Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334C8Yx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F334C8Yx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334C8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334K4Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F334K(4-6-8)Tx-->
    <!--STVPdevicename = STM32F334x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334K6Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F334K(4-6-8)Tx-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334K8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32F334K(4-6-8)Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334K4Ux</name>
    <status>Obsolete</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F334K(4-6-8)Ux-->
    <!--STVPdevicename = STM32F334x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334K6Ux</name>
    <status>Obsolete</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F334K(4-6-8)Ux-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334K8Ux</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F334K(4-6-8)Ux-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334R6Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F334R(6-8)Tx-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F334R8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x4.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F334R(6-8)Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F334R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373C8Tx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F373C(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373CBTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F373C(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373CCTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F373C(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373R8Tx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F373R(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373RBTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F373R(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373RCTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F373R(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373V8Hx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F373V(8-B-C)Hx-->
    <!--STVPdevicename = STM32F373x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373VBHx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F373V(8-B-C)Hx-->
    <!--STVPdevicename = STM32F373xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373VCHx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F373V(8-B-C)Hx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373V8Tx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F373V(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373VBTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F373V(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x6000</size>
        <!--end = 0x20005FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F373VCTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F373.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F373V(8-B-C)Tx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F373VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303K6Ux</name>
    <status>Obsolete</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F303K(6-8)Ux-->
    <!--STVPdevicename = STM32F334x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F303K8Ux</name>
    <status>Obsolete</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F303.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F303K(6-8)Ux-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F303K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F318C8Tx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F318C8Tx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F318C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F318C8Yx</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F318C8Yx-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F318C8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F318K8Ux</name>
    <status>Active</status>
    <dieId>0439</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32F318K8Ux-->
    <!--STVPdevicename = STM32F302x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F318K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F328C8Tx</name>
    <status>Active</status>
    <dieId>0438</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F328C8Tx-->
    <!--STVPdevicename = STM32F334x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x1000</size>
        <!--end = 0x10000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F328C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F358CCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F358CCTx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F358CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F358RCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F358RCTx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F358RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F358VCTx</name>
    <status>Active</status>
    <dieId>0422</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F358VCTx-->
    <!--STVPdevicename = STM32F303xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F358VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F378CCTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F378CCTx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F378CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F378RCTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F378RCTx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F378RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F378RCYx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP66</package>
    <!--XMLfilename = STM32F378RCYx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F378RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F378VCHx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F378VCHx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F378VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F378VCTx</name>
    <status>Active</status>
    <dieId>0432</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F378VCTx-->
    <!--STVPdevicename = STM32F373xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F378VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F398VETx</name>
    <status>Active</status>
    <dieId>0446</dieId>
    <parent>stm32f3</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F3x8.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F398VETx-->
    <!--STVPdevicename = STM32F303xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F398VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CBUx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F401C(B-C)Ux-->
    <!--STVPdevicename = STM32F401xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CCUx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F401C(B-C)Ux-->
    <!--STVPdevicename = STM32F401xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CBYx</name>
    <status>Obsolete</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F401C(B-C)Yx-->
    <!--STVPdevicename = STM32F401xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CCYx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F401C(B-C)Yx-->
    <!--STVPdevicename = STM32F401xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CDUx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F401C(D-E)Ux-->
    <!--STVPdevicename = STM32F401xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CDUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CEUx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F401C(D-E)Ux-->
    <!--STVPdevicename = STM32F401xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CDYx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F401C(D-E)Yx-->
    <!--STVPdevicename = STM32F401xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CDYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CEYx</name>
    <status>Obsolete</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F401C(D-E)Yx-->
    <!--STVPdevicename = STM32F401xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401CCFx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F401CCFx-->
    <!--STVPdevicename = STM32F401xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401CCFx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401RBTx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F401R(B-C)Tx-->
    <!--STVPdevicename = STM32F401xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401RCTx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F401R(B-C)Tx-->
    <!--STVPdevicename = STM32F401xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401RDTx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F401R(D-E)Tx-->
    <!--STVPdevicename = STM32F401xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401RETx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F401R(D-E)Tx-->
    <!--STVPdevicename = STM32F401xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VBHx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F401V(B-C)Hx-->
    <!--STVPdevicename = STM32F401xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VCHx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F401V(B-C)Hx-->
    <!--STVPdevicename = STM32F401xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VBTx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F401V(B-C)Tx-->
    <!--STVPdevicename = STM32F401xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VCTx</name>
    <status>Active</status>
    <dieId>0423</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F401V(B-C)Tx-->
    <!--STVPdevicename = STM32F401xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VDHx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F401V(D-E)Hx-->
    <!--STVPdevicename = STM32F401xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VEHx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F401V(D-E)Hx-->
    <!--STVPdevicename = STM32F401xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VDTx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F401V(D-E)Tx-->
    <!--STVPdevicename = STM32F401xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F401VETx</name>
    <status>Active</status>
    <dieId>0433</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F401.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F401V(D-E)Tx-->
    <!--STVPdevicename = STM32F401xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F401VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F405OEYx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F405.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP90</package>
    <!--XMLfilename = STM32F405O(E-G)Yx-->
    <!--STVPdevicename = STM32F417xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F405OEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F405OGYx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F405.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP90</package>
    <!--XMLfilename = STM32F405O(E-G)Yx-->
    <!--STVPdevicename = STM32F417xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F405OGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F405RGTx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F405.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
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      <CDefine>-DSTM32F405RGTx</CDefine>
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      <cpu>
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      <cpu>
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      <cpu>
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      <CDefine>-DSTM32F415OGYx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F415RGTx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F415VGTx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F415ZGTx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F407IEHx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F407IGHx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F407IETx</CDefine>
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    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F407IGTx</CDefine>
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    <dieId>0413</dieId>
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    <CDefines>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F407VGTx</CDefine>
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    <status>Active</status>
    <dieId>0413</dieId>
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    <cpus>
      <cpu>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F407ZETx</CDefine>
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    <status>Active</status>
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    <cpus>
      <cpu>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F407ZGTx</CDefine>
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    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417IEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417IGHx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F417I(E-G)Hx-->
    <!--STVPdevicename = STM32F417xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417IGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417IETx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F417I(E-G)Tx-->
    <!--STVPdevicename = STM32F417xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417IGTx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F417I(E-G)Tx-->
    <!--STVPdevicename = STM32F417xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417VETx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F417V(E-G)Tx-->
    <!--STVPdevicename = STM32F417xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417VGTx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F417V(E-G)Tx-->
    <!--STVPdevicename = STM32F417xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417ZETx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F417Z(E-G)Tx-->
    <!--STVPdevicename = STM32F417xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F417ZGTx</name>
    <status>Active</status>
    <dieId>0413</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F417.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F417Z(E-G)Tx-->
    <!--STVPdevicename = STM32F417xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F417ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410C8Tx</name>
    <status>Obsolete</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F410C(8-B)Tx-->
    <!--STVPdevicename = STM32F410x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410CBTx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32F410C(8-B)Tx-->
    <!--STVPdevicename = STM32F410xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410C8Ux</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F410C(8-B)Ux-->
    <!--STVPdevicename = STM32F410x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410CBUx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F410C(8-B)Ux-->
    <!--STVPdevicename = STM32F410xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410R8Ix</name>
    <status>Obsolete</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F410R(8-B)Ix-->
    <!--STVPdevicename = STM32F410x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410R8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410RBIx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32F410R(8-B)Ix-->
    <!--STVPdevicename = STM32F410xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410R8Tx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F410R(8-B)Tx-->
    <!--STVPdevicename = STM32F410x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410RBTx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F410R(8-B)Tx-->
    <!--STVPdevicename = STM32F410xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410T8Yx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32F410T(8-B)Yx-->
    <!--STVPdevicename = STM32F410x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410T8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F410TBYx</name>
    <status>Active</status>
    <dieId>0458</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F410.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32F410T(8-B)Yx-->
    <!--STVPdevicename = STM32F410xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F410TBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411CCUx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F411C(C-E)Ux-->
    <!--STVPdevicename = STM32F411xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411CEUx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F411C(C-E)Ux-->
    <!--STVPdevicename = STM32F411xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411CCYx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F411C(C-E)Yx-->
    <!--STVPdevicename = STM32F411xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411CCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411CEYx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32F411C(C-E)Yx-->
    <!--STVPdevicename = STM32F411xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411CEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411RCTx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F411R(C-E)Tx-->
    <!--STVPdevicename = STM32F411xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411RETx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F411R(C-E)Tx-->
    <!--STVPdevicename = STM32F411xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411VCHx</name>
    <status>Obsolete</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F411V(C-E)Hx-->
    <!--STVPdevicename = STM32F411xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411VEHx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32F411V(C-E)Hx-->
    <!--STVPdevicename = STM32F411xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411VCTx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F411V(C-E)Tx-->
    <!--STVPdevicename = STM32F411xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F411VETx</name>
    <status>Active</status>
    <dieId>0431</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F411.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F411V(C-E)Tx-->
    <!--STVPdevicename = STM32F411xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F411VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412CEUx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F412.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F412C(E-G)Ux-->
    <!--STVPdevicename = STM32F412xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F412CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412CGUx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F412.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32F412C(E-G)Ux-->
    <!--STVPdevicename = STM32F412xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F412CGUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412RETx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F412.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F412R(E-G)Tx-->
    <!--STVPdevicename = STM32F412xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F412RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412RGTx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F412.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F412R(E-G)Tx-->
    <!--STVPdevicename = STM32F412xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F412RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412REYx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F412.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F412R(E-G)Yx-->
    <!--STVPdevicename = STM32F412xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F412REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412RGYx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F412.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32F412R(E-G)Yx-->
    <!--STVPdevicename = STM32F412xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F412RGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F412REYxP</name>
    <status>Obsolete</status>
    <dieId>0441</dieId>
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    <CDefines>
      <CDefine>-DSTM32F412REYxP</CDefine>
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  <mcu>
    <name>STM32F412RGYxP</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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      <CDefine>-DSTM32F412RGYxP</CDefine>
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    <name>STM32F412VEHx</name>
    <status>Active</status>
    <dieId>0441</dieId>
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    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F412VEHx</CDefine>
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    <status>Active</status>
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    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F412VGHx</CDefine>
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  <mcu>
    <name>STM32F412VETx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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      <CDefine>-DSTM32F412VETx</CDefine>
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    <status>Active</status>
    <dieId>0441</dieId>
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    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F412VGTx</CDefine>
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  <mcu>
    <name>STM32F412ZEJx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F412ZEJx</CDefine>
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  <mcu>
    <name>STM32F412ZGJx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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    <CDefines>
      <CDefine>-DSTM32F412ZGJx</CDefine>
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    <name>STM32F412ZETx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F412ZETx</CDefine>
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  <mcu>
    <name>STM32F412ZGTx</name>
    <status>Active</status>
    <dieId>0441</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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    <CDefines>
      <CDefine>-DSTM32F412ZGTx</CDefine>
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  <mcu>
    <name>STM32F413CGUx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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        <cores>
          <core>
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    <package>UFQFPN48</package>
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    <memories>
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      <memory>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F413CGUx</CDefine>
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  <mcu>
    <name>STM32F413CHUx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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        <cores>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F413CHUx</CDefine>
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  <mcu>
    <name>STM32F413MGYx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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    <package>WLCSP81</package>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F413MGYx</CDefine>
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  <mcu>
    <name>STM32F413MHYx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F413MHYx</CDefine>
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  <mcu>
    <name>STM32F413RGTx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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    <package>LQFP64</package>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F413RGTx</CDefine>
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    <name>STM32F413RHTx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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        <svd>
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    <package>LQFP64</package>
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      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F413RHTx</CDefine>
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  <mcu>
    <name>STM32F413VGHx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r7</version>
          <url></url>
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    <package>UFBGA100</package>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F413VGHx</CDefine>
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    <name>STM32F413VHHx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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      <cpu>
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      <cpu>
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      <cpu>
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    <status>Active</status>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F413ZGTx</CDefine>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F413ZHTx</CDefine>
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    <name>STM32F423CHUx</name>
    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <status>Active</status>
    <dieId>0463</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <status>Active</status>
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    <cpus>
      <cpu>
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    <cpus>
      <cpu>
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    <CDefines>
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    <name>STM32F423VHTx</name>
    <status>Active</status>
    <dieId>0463</dieId>
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    <cpus>
      <cpu>
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    <name>STM32F423ZHJx</name>
    <status>Active</status>
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    <cpus>
      <cpu>
        <id>0</id>
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    <status>Active</status>
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    <cpus>
      <cpu>
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    <CDefines>
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    <name>STM32F427AGHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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        <svd>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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        <!--end = 0x80FFFFF-->
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    <CDefines>
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    <name>STM32F427AIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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        <svd>
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        <!--end = 0x81FFFFF-->
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    <CDefines>
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    <status>Active</status>
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    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <package>UFBGA176</package>
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    <CDefines>
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    <status>Active</status>
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    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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          <version>v1r5</version>
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        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F427I(G-I)Hx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
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        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427IIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F427IGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F427.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F427I(G-I)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F427IITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F427.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F427I(G-I)Tx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F427VGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F427.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F427V(G-I)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F427VITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F427.svd</name>
          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP100</package>
    <!--XMLfilename = STM32F427V(G-I)Tx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
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        <name>CCMRAM</name>
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        <!--end = 0x1000FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F427ZGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F427.svd</name>
          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F427Z(G-I)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F427ZITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F427.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F427Z(G-I)Tx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F427ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437AIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32F437AIHx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437AIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437IGHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F437I(G-I)Hx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437IGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437IIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F437I(G-I)Hx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437IIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437IGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F437I(G-I)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437IITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP176</package>
    <!--XMLfilename = STM32F437I(G-I)Tx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
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        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437VGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F437V(G-I)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437VITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F437V(G-I)Tx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
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        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437ZGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F437Z(G-I)Tx-->
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    <memories>
      <memory>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
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        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F437ZITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F437.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F437Z(G-I)Tx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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      <memory>
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        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F437ZITx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F429AGHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <core>
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        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
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    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429AGHx</CDefine>
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  <mcu>
    <name>STM32F429AIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <core>
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    <package>UFBGA169</package>
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    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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      <memory>
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        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429AIHx</CDefine>
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  <mcu>
    <name>STM32F429BETx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <url></url>
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          <core>
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            <type>arm cortex-m4</type>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
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    <!--STVPdevicename = STM32F429xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429BETx</CDefine>
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  <mcu>
    <name>STM32F429BGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <url></url>
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        <cores>
          <core>
            <id>0</id>
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            <type>arm cortex-m4</type>
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    <package>LQFP208</package>
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    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429BGTx</CDefine>
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  <mcu>
    <name>STM32F429BITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <url></url>
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          <core>
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            <type>arm cortex-m4</type>
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    <package>LQFP208</package>
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    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429BITx</CDefine>
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  <mcu>
    <name>STM32F429IETx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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    <package>LQFP176</package>
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    <memories>
      <memory>
        <type>RAM</type>
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        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429IETx</CDefine>
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  <mcu>
    <name>STM32F429IGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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          <version>v1r6</version>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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    <package>LQFP176</package>
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    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429IGTx</CDefine>
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  <mcu>
    <name>STM32F429IEHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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          <core>
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    <package>UFBGA176</package>
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    <memories>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429IEHx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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    <memories>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429IGHx</CDefine>
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  <mcu>
    <name>STM32F429IIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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        <cores>
          <core>
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            <type>arm cortex-m4</type>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429IIHx</CDefine>
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  <mcu>
    <name>STM32F429IITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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    <package>LQFP176</package>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429IITx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F429NEHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
          <version>v1r6</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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      </cpu>
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    <package>TFBGA216</package>
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    <memories>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429NEHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F429NGHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
          <version>v1r6</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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      </cpu>
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    <package>TFBGA216</package>
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    <memories>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429NGHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F429NIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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      </cpu>
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    <package>TFBGA216</package>
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    <memories>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429NIHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F429VETx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F429V(E-G)Tx-->
    <!--STVPdevicename = STM32F429xE-->
    <memories>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429VETx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <core>
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      </cpu>
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    <package>LQFP100</package>
    <!--XMLfilename = STM32F429V(E-G)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429VGTx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <core>
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    <package>LQFP100</package>
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    <memories>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429VITx</CDefine>
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  <mcu>
    <name>STM32F429ZETx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <url></url>
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          <core>
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      </cpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F429Z(E-G)Tx-->
    <!--STVPdevicename = STM32F429xE-->
    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429ZETx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
          <version>v1r6</version>
          <url></url>
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          <core>
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            <type>arm cortex-m4</type>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F429Z(E-G)Tx-->
    <!--STVPdevicename = STM32F439xG-->
    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429ZGTx</CDefine>
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  <mcu>
    <name>STM32F429ZGYx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
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          <url></url>
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          <core>
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            <type>arm cortex-m4</type>
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    <package>WLCSP143</package>
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    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429ZGYx</CDefine>
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  <mcu>
    <name>STM32F429ZITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
          <version>v1r6</version>
          <url></url>
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          <core>
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            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F429ZITx-->
    <!--STVPdevicename = STM32F439xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429ZITx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F429ZIYx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F429.svd</name>
          <version>v1r6</version>
          <url></url>
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          <core>
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            <type>arm cortex-m4</type>
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    <package>WLCSP143</package>
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    <memories>
      <memory>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F429ZIYx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F439AIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r1</version>
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          <core>
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            <type>arm cortex-m4</type>
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    <package>UFBGA169</package>
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    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439AIHx</CDefine>
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  <mcu>
    <name>STM32F439BGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
          <url></url>
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          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP208</package>
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    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439BGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F439BITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
          <url></url>
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        <cores>
          <core>
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            <type>arm cortex-m4</type>
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    <package>LQFP208</package>
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    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439BITx</CDefine>
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  <mcu>
    <name>STM32F439IGHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r1</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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      </cpu>
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    <package>UFBGA176</package>
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        <!--end = 0x2002FFFF-->
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439IGHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F439IIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r1</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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      </cpu>
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    <package>UFBGA176</package>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439IIHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F439IGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F439I(G-I)Tx-->
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    <memories>
      <memory>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439IGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F439IITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP176</package>
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    <memories>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F439NGHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
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    <package>TFBGA216</package>
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      <memory>
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      <memory>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F439NGHx</CDefine>
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  <mcu>
    <name>STM32F439NIHx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
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          <core>
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            <apnum>0</apnum>
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      </cpu>
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    <package>TFBGA216</package>
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      <memory>
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      <memory>
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        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439NIHx</CDefine>
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  <mcu>
    <name>STM32F439VGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
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          <core>
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    <package>LQFP100</package>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439VGTx</CDefine>
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  <mcu>
    <name>STM32F439VITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
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          <core>
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            <apnum>0</apnum>
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        <!--end = 0x2002FFFF-->
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      <memory>
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      <memory>
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        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439VITx</CDefine>
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  <mcu>
    <name>STM32F439ZGTx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
          <url></url>
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          <core>
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            <apnum>0</apnum>
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      <memory>
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        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439ZGTx</CDefine>
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  <mcu>
    <name>STM32F439ZITx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
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      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439ZITx</CDefine>
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  <mcu>
    <name>STM32F439ZGYx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F439.svd</name>
          <version>v1r1</version>
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          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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    <package>WLCSP143</package>
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    <memories>
      <memory>
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        <!--end = 0x2002FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439ZGYx</CDefine>
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  <mcu>
    <name>STM32F439ZIYx</name>
    <status>Active</status>
    <dieId>0419</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r1</version>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        <!--end = 0x2002FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F439ZIYx</CDefine>
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  <mcu>
    <name>STM32F446MCYx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F446.svd</name>
          <version>v1r7</version>
          <url></url>
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          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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    <package>WLCSP81</package>
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    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446MCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F446MEYx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F446.svd</name>
          <version>v1r7</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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    <package>WLCSP81</package>
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        <!--end = 0x2001FFFF-->
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      <memory>
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        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446MEYx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F446RCTx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F446.svd</name>
          <version>v1r7</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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    <package>LQFP64</package>
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    <memories>
      <memory>
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        <!--end = 0x2001FFFF-->
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      <memory>
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        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446RCTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F446RETx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F446.svd</name>
          <version>v1r7</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x2001FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446RETx</CDefine>
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  <mcu>
    <name>STM32F446VCTx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r7</version>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x2001FFFF-->
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      <memory>
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        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446VCTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F446VETx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r7</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x2001FFFF-->
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      <memory>
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        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446VETx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F446ZCHx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r7</version>
          <url></url>
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        <cores>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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    <package>UFBGA144</package>
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        <!--end = 0x2001FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446ZCHx</CDefine>
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  <mcu>
    <name>STM32F446ZEHx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r7</version>
          <url></url>
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        <cores>
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            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F446ZEHx</CDefine>
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  <mcu>
    <name>STM32F446ZCJx</name>
    <status>Active</status>
    <dieId>0421</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F446.svd</name>
          <version>v1r7</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
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    <package>UFBGA144</package>
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  <mcu>
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      <cpu>
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    <CDefines>
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  <mcu>
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    <cpus>
      <cpu>
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    <cpus>
      <cpu>
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    <dieId>0434</dieId>
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    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F469AEHx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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    <CDefines>
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  <mcu>
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    <status>Active</status>
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    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
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    <status>Obsolete</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
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    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32F469AIYx</CDefine>
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    <status>Active</status>
    <dieId>0434</dieId>
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    <cpus>
      <cpu>
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    <CDefines>
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    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
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    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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    <CDefines>
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    <status>Obsolete</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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        <!--end = 0x807FFFF-->
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    <CDefines>
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    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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        <svd>
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        <!--end = 0x2003FFFF-->
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F469IGTx</CDefine>
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    <name>STM32F469IEHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
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          <version>v1r7</version>
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    <package>UFBGA176</package>
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        <!--end = 0x2003FFFF-->
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        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469IEHx</CDefine>
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  <mcu>
    <name>STM32F469IGHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F469I(E-G-I)Hx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
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        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469IGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469IIHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F469I(E-G-I)Hx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
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      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469IIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469IITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F469IITx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
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        <!--end = 0x1000FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469IITx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F469NEHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F469N(E-G)Hx-->
    <!--STVPdevicename = STM32F469xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469NEHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F469NGHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F469N(E-G)Hx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469NGHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F469NIHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F469NIHx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469VETx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F469V(E-G)Tx-->
    <!--STVPdevicename = STM32F469xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469VGTx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F469V(E-G)Tx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469VITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F469VITx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469ZETx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F469Z(E-G)Tx-->
    <!--STVPdevicename = STM32F469xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469ZGTx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F469Z(E-G)Tx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F469ZITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F469.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F469ZITx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F469ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479AGHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32F479A(G-I)Hx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479AGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479AIHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32F479A(G-I)Hx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479AIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479AGYx</name>
    <status>Obsolete</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP168</package>
    <!--XMLfilename = STM32F479A(G-I)Yx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479AGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479AIYx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP168</package>
    <!--XMLfilename = STM32F479A(G-I)Yx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479AIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479BGTx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F479B(G-I)Tx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479BITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F479B(G-I)Tx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479IGHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F479I(G-I)Hx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479IGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479IIHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F479I(G-I)Hx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479IIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479IGTx</name>
    <status>Obsolete</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F479I(G-I)Tx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479IITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F479I(G-I)Tx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479NGHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F479N(G-I)Hx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479NGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479NIHx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F479N(G-I)Hx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479VGTx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F479V(G-I)Tx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479VITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F479V(G-I)Tx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479ZGTx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F479Z(G-I)Tx-->
    <!--STVPdevicename = STM32F479xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F479ZITx</name>
    <status>Active</status>
    <dieId>0434</dieId>
    <parent>stm32f4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F479.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F479Z(G-I)Tx-->
    <!--STVPdevicename = STM32F479xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMRAM</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F479ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F730I8Kx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F730.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F730I8Kx-->
    <!--STVPdevicename = STM32F730x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F730I8Kx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F730R8Tx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F730.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F730R8Tx-->
    <!--STVPdevicename = STM32F730x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F730R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F730V8Tx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F730.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F730V8Tx-->
    <!--STVPdevicename = STM32F730x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F730V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F730Z8Tx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F730.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F730Z8Tx-->
    <!--STVPdevicename = STM32F730x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F730Z8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F750N8Hx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F750.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F750N8Hx-->
    <!--STVPdevicename = STM32F750x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F750N8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F750V8Tx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F750.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F750V8Tx-->
    <!--STVPdevicename = STM32F750x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F750V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F750Z8Tx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F750.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F750Z8Tx-->
    <!--STVPdevicename = STM32F750x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F750Z8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722ICKx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F722I(C-E)Kx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722ICKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722IEKx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F722I(C-E)Kx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722IEKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722ICTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F722I(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722ICTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722IETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F722I(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722RCTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F722R(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722RETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F722R(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722VCTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F722V(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722VETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F722V(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722ZCTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F722Z(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F722ZETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F722.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F722Z(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F722ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F732IEKx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F732.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F732IEKx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F732IEKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F732IETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F732.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F732IETx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F732IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F732RETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F732.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32F732RETx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F732RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F732VETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F732.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F732VETx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F732VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F732ZETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F732.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F732ZETx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F732ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723ICKx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F723I(C-E)Kx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723ICKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723IEKx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F723I(C-E)Kx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723IEKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723ICTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F723I(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723ICTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723IETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F723I(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723VCTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F723V(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723VETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F723V(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723VCYx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32F723V(C-E)Yx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723VCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723VEYx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32F723V(C-E)Yx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723VEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723ZCIx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32F723Z(C-E)Ix-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723ZCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723ZEIx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32F723Z(C-E)Ix-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723ZEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723ZCTx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F723Z(C-E)Tx-->
    <!--STVPdevicename = STM32F72xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F723ZETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F723.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F723Z(C-E)Tx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F723ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F733IEKx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F733.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F733IEKx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F733IEKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F733IETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F733.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F733IETx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F733IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F733VETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F733.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F733VETx-->
    <!--STVPdevicename = STM32F73xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F733VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F733VEYx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F733.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
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      </cpu>
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    <package>WLCSP100</package>
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      <memory>
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        <!--end = 0x2003FFFF-->
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      <memory>
        <type>ROM</type>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F733VEYx</CDefine>
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  <mcu>
    <name>STM32F733ZEIx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F733.svd</name>
          <version>v1r3</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
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        <!--end = 0x2003FFFF-->
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      <memory>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F733ZEIx</CDefine>
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  <mcu>
    <name>STM32F733ZETx</name>
    <status>Active</status>
    <dieId>0452</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F733.svd</name>
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          <url></url>
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          <core>
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            <apnum>0</apnum>
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      <memory>
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    <CDefines>
      <CDefine>-DSTM32F733ZETx</CDefine>
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  <mcu>
    <name>STM32F745IEKx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
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      <memory>
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        <name>RAM</name>
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        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745IEKx</CDefine>
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  <mcu>
    <name>STM32F745IGKx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
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        </cores>
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      <memory>
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      </memory>
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    <CDefines>
      <CDefine>-DSTM32F745IGKx</CDefine>
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  <mcu>
    <name>STM32F745IETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <core>
            <id>0</id>
            <apnum>0</apnum>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F745IETx</CDefine>
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  <mcu>
    <name>STM32F745IGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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          <core>
            <id>0</id>
            <apnum>0</apnum>
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      <memory>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745IGTx</CDefine>
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  <mcu>
    <name>STM32F745VEHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F745.svd</name>
          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
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    <package>TFBGA100</package>
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    <memories>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745VEHx</CDefine>
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  <mcu>
    <name>STM32F745VGHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F745.svd</name>
          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
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    <memories>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745VGHx</CDefine>
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  <mcu>
    <name>STM32F745VETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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    <package>LQFP100</package>
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    <memories>
      <memory>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745VETx</CDefine>
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  <mcu>
    <name>STM32F745VGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
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    <package>LQFP100</package>
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    <memories>
      <memory>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745VGTx</CDefine>
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  <mcu>
    <name>STM32F745ZETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
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    <package>LQFP144</package>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745ZETx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F745ZGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
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    <package>LQFP144</package>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F745ZGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F765BGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
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    <package>LQFP208</package>
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    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
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      <memory>
        <type>ROM</type>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765BGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F765BITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP208</package>
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    <memories>
      <memory>
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        <!--end = 0x2007FFFF-->
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      <memory>
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        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765BITx</CDefine>
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  <mcu>
    <name>STM32F765IGKx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
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    <memories>
      <memory>
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        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
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      <memory>
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        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765IGKx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F765IIKx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r6</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
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    <package>UFBGA176</package>
    <!--XMLfilename = STM32F765I(G-I)Kx-->
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    <memories>
      <memory>
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        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
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      <memory>
        <type>ROM</type>
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        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765IIKx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F765IGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F765I(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765IITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F765I(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765NGHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F765N(G-I)Hx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765NGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765NIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F765N(G-I)Hx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765VGHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32F765V(G-I)Hx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765VIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32F765V(G-I)Hx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765VGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F765V(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765VITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F765V(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765ZGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F765Z(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F765ZITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F765.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F765Z(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F765ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746BETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F746B(E-G)Tx-->
    <!--STVPdevicename = STM32F756xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746BETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746BGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F746B(E-G)Tx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746IEKx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F746I(E-G)Kx-->
    <!--STVPdevicename = STM32F756xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746IEKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746IGKx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F746I(E-G)Kx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746IETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F746IETx-->
    <!--STVPdevicename = STM32F756xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746IGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F746IGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746NEHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F746NEHx-->
    <!--STVPdevicename = STM32F756xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746NEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F746NGHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F746NGHx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32F746NGHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F746VEHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>TFBGA100</package>
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    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746VEHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F746VGHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>TFBGA100</package>
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    <memories>
      <memory>
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        <name>RAM</name>
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        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746VGHx</CDefine>
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  <mcu>
    <name>STM32F746VETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
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    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746VETx</CDefine>
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  <mcu>
    <name>STM32F746VGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP100</package>
    <!--XMLfilename = STM32F746VGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746VGTx</CDefine>
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  <mcu>
    <name>STM32F746ZEYx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>WLCSP143</package>
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    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746ZEYx</CDefine>
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  <mcu>
    <name>STM32F746ZGYx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>WLCSP143</package>
    <!--XMLfilename = STM32F746Z(E-G)Yx-->
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    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746ZGYx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F746ZETx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F746ZETx-->
    <!--STVPdevicename = STM32F756xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746ZETx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F746ZGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F746.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F746ZGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
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        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F746ZGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F756BGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F756BGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F756IGKx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F756IGKx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F756IGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F756IGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F756NGHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F756NGHx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756NGHx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F756VGHx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32F756VGHx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F756VGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F756VGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756VGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F756ZGTx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
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    <package>LQFP144</package>
    <!--XMLfilename = STM32F756ZGTx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F756ZGYx</name>
    <status>Active</status>
    <dieId>0449</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F756.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>WLCSP143</package>
    <!--XMLfilename = STM32F756ZGYx-->
    <!--STVPdevicename = STM32F756xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F756ZGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767BGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F767B(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767BGTx</CDefine>
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  </mcu>
  <mcu>
    <name>STM32F767BITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F767B(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767IGKx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F767I(G-I)Kx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767IIKx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F767I(G-I)Kx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767IGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F767I(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767IITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F767I(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767NGHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F767N(G-I)Hx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767NGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767NIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F767N(G-I)Hx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767VGHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32F767VGHx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767VGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F767VGTx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767VIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32F767VIHx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767VITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F767VITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767ZGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F767ZGTx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F767ZITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F767.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F767ZITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F767ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777BITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F777BITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777IIKx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32F777IIKx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777IITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F777IITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777NIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F777NIHx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777VIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32F777VIHx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777VITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32F777VITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F777ZITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F777.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32F777ZITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F777ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F768AIYx</name>
    <status>Obsolete</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F768.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP180</package>
    <!--XMLfilename = STM32F768AIYx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F768AIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769AGYx</name>
    <status>Obsolete</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP180</package>
    <!--XMLfilename = STM32F769A(G-I)Yx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769AGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769AIYx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP180</package>
    <!--XMLfilename = STM32F769A(G-I)Yx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769AIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769BGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F769B(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769BITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F769B(G-I)Tx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769IGTx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F769IGTx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769IITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F769IITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769NGHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F769NGHx-->
    <!--STVPdevicename = STM32F76xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769NGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F769NIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F769.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F769NIHx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F769NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F778AIYx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F778.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP180</package>
    <!--XMLfilename = STM32F778AIYx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F778AIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F779AIYx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F779.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP180</package>
    <!--XMLfilename = STM32F779AIYx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F779AIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F779BITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F779.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32F779BITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F779BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F779IITx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F779.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32F779IITx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F779IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32F779NIHx</name>
    <status>Active</status>
    <dieId>0451</dieId>
    <parent>stm32f7</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32F779.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32F779NIHx-->
    <!--STVPdevicename = STM32F76xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x80000</size>
        <!--end = 0x2007FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32F779NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G030C6Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G030.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G030C(6-8)Tx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G030C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G030C8Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G030.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G030C(6-8)Tx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G030C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G030F6Px</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G030.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G030F6Px-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G030F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G030J6Mx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G030.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>SO8N</package>
    <!--XMLfilename = STM32G030J6Mx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G030J6Mx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G030K6Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G030.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G030K(6-8)Tx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G030K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G030K8Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G030.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G030K(6-8)Tx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G030K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G050C6Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G050.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G050C6Tx-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G050C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G050C8Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G050.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G050C8Tx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G050C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G050F6Px</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G050.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G050F6Px-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G050F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G050K6Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G050.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G050K6Tx-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G050K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G050K8Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G050.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G050K8Tx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G050K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G070CBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G070.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G070CBTx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G070CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G070KBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G070.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G070KBTx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G070KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G070RBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G070.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G070RBTx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G070RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B0CETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B0.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B0CETx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B0CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B0KETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B0.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B0KETx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B0KETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B0RETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B0.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B0RETx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B0RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B0VETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B0.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G0B0VETx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B0VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031C4Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G031C(4-6-8)Tx-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031C6Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G031C(4-6-8)Tx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031C8Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G031C(4-6-8)Tx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031C4Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G031C(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031C4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031C6Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G031C(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031C8Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G031C(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031F4Px</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G031F(4-6-8)Px-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031F6Px</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G031F(4-6-8)Px-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031F8Px</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G031F(4-6-8)Px-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031F8Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031G4Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G031G(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031G6Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G031G(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031G8Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G031G(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031G8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031J4Mx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>SO8N</package>
    <!--XMLfilename = STM32G031J(4-6)Mx-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031J4Mx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031J6Mx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>SO8N</package>
    <!--XMLfilename = STM32G031J(4-6)Mx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031J6Mx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031K4Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G031K(4-6-8)Tx-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031K6Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G031K(4-6-8)Tx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031K8Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G031K(4-6-8)Tx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031K4Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G031K(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031K6Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G031K(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031K8Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G031K(4-6-8)Ux-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G031Y8Yx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G031.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP18</package>
    <!--XMLfilename = STM32G031Y8Yx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G031Y8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041C6Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G041C(6-8)Tx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041C8Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G041C(6-8)Tx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041C6Ux</name>
    <status>Obsolete</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G041C(6-8)Ux-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041C8Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G041C(6-8)Ux-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041F6Px</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G041F(6-8)Px-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041F8Px</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G041F(6-8)Px-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041F8Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041G6Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G041G(6-8)Ux-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041G8Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G041G(6-8)Ux-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041G8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041J6Mx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>SO8N</package>
    <!--XMLfilename = STM32G041J6Mx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041J6Mx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041K6Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G041K(6-8)Tx-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041K8Tx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G041K(6-8)Tx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041K6Ux</name>
    <status>Obsolete</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G041K(6-8)Ux-->
    <!--STVPdevicename = STM32G031x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041K8Ux</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G041K(6-8)Ux-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G041Y8Yx</name>
    <status>Active</status>
    <dieId>0466</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G041.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP18</package>
    <!--XMLfilename = STM32G041Y8Yx-->
    <!--STVPdevicename = STM32G031x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G041Y8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051C6Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G051C(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051C8Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G051C(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051C6Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G051C(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051C8Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G051C(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051F6Px</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G051F(6-8)Px-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051F8Px</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G051F(6-8)Px-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051F8Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051F8Yx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP20</package>
    <!--XMLfilename = STM32G051F8Yx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051F8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051G6Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G051G(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051G8Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G051G(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051G8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051K6Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G051K(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051K8Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G051K(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051K6Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G051K(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G051K8Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G051.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G051K(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G051K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061C6Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G061C(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061C8Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G061C(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061C6Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G061C(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061C8Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G061C(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061F6Px</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G061F(6-8)Px-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061F8Px</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32G061F(6-8)Px-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061F8Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061F8Yx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP20</package>
    <!--XMLfilename = STM32G061F8Yx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061F8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061G6Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G061G(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061G8Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G061G(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061G8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061K6Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G061K(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061K8Tx</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G061K(6-8)Tx-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061K6Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G061K(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G061K8Ux</name>
    <status>Active</status>
    <dieId>0456</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G061.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G061K(6-8)Ux-->
    <!--STVPdevicename = STM32G05xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4800</size>
        <!--end = 0x200047FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G061K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071C6Tx</name>
    <status>Obsolete</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G071C(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071C8Tx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G071C(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071CBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G071C(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071C6Ux</name>
    <status>Obsolete</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G071C(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071C8Ux</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G071C(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071CBUx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G071C(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071EBYx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32G071EBYx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071EBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071G6Ux</name>
    <status>Obsolete</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G071G(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071G8Ux</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G071G(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071G8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071GBUx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G071G(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071GBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071G8UxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G071G(8-B)UxN-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071G8UxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071GBUxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G071G(8-B)UxN-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071GBUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071K6Tx</name>
    <status>Obsolete</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G071K(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071K8Tx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G071K(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071KBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G071K(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071K6Ux</name>
    <status>Obsolete</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G071K(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071K8Ux</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G071K(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071KBUx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G071K(6-8-B)Ux-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071K8TxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G071K(8-B)TxN-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071K8TxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071KBTxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G071K(8-B)TxN-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071KBTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071K8UxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G071K(8-B)UxN-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071K8UxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071KBUxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G071K(8-B)UxN-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071KBUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071R6Tx</name>
    <status>Obsolete</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G071R(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071R8Tx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G071R(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071RBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G071R(6-8-B)Tx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G071RBIx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G071.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G071RBIx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G071RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081CBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G081CBTx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081CBUx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G081CBUx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081EBYx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32G081EBYx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081EBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081GBUx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G081GBUx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081GBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081GBUxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32G081GBUxN-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081GBUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081KBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G081KBTx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081KBTxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G081KBTxN-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081KBTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081KBUx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G081KBUx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081KBUxN</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G081KBUxN-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081KBUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081RBIx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G081RBIx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G081RBTx</name>
    <status>Active</status>
    <dieId>0460</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G081.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G081RBTx-->
    <!--STVPdevicename = STM32G071xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x9000</size>
        <!--end = 0x20008FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G081RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CBTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CBTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CBTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CCTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CCTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CETxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CETxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CBUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CCUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CEUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CBUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CBUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CCUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CCUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1CEUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0B1C(B-C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1CEUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KBTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KBTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KBTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KCTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KCTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KETxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KETxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KBUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KCUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KEUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KBUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KBUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KCUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KCUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1KEUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0B1K(B-C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1KEUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1MBTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G0B1M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1MBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1MCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G0B1M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1MCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1METx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G0B1M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1NEYx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP52</package>
    <!--XMLfilename = STM32G0B1NEYx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1NEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RBIxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)IxN-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RBIxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RCIxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)IxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RCIxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1REIxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)IxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1REIxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RBTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RBTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RBTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RCTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RCTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1RETxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0B1R(B-C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1RETxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1VBIx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G0B1V(B-C-E)Ix-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1VBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1VCIx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G0B1V(B-C-E)Ix-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1VEIx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G0B1V(B-C-E)Ix-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1VBTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G0B1V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1VCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G0B1V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0B1VETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0B1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G0B1V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0B1VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0C1C(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0C1C(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CCTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0C1C(C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CCTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CETxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G0C1C(C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CETxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CCUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0C1C(C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CEUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0C1C(C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CCUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0C1C(C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CCUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1CEUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G0C1C(C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1CEUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0C1K(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0C1K(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KCTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0C1K(C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KCTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KETxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G0C1K(C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KETxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KCUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0C1K(C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KEUx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0C1K(C-E)Ux-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KCUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0C1K(C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KCUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1KEUxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G0C1K(C-E)UxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1KEUxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1MCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G0C1M(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1MCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1METx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G0C1M(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1NEYx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP52</package>
    <!--XMLfilename = STM32G0C1NEYx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1NEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1RCIxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G0C1R(C-E)IxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1RCIxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1REIxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G0C1R(C-E)IxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1REIxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1RCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0C1R(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1RETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0C1R(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1RCTxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0C1R(C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1RCTxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1RETxN</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G0C1R(C-E)TxN-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1RETxN</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1VCIx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G0C1V(C-E)Ix-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1VEIx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G0C1V(C-E)Ix-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1VCTx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G0C1V(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G0C1VETx</name>
    <status>Active</status>
    <dieId>0467</dieId>
    <parent>stm32g0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G0C1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G0C1V(C-E)Tx-->
    <!--STVPdevicename = STM32G0B1xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x24000</size>
        <!--end = 0x20023FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G0C1VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431C6Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G431C(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431C8Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G431C(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431CBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G431C(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431C6Ux</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G431C(6-8-B)Ux-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431C8Ux</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G431C(6-8-B)Ux-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431CBUx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G431C(6-8-B)Ux-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431CBYx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32G431CBYx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431K6Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G431K(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431K8Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G431K(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431KBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G431K(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431K6Ux</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G431K(6-8-B)Ux-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431K8Ux</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G431K(6-8-B)Ux-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431KBUx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G431K(6-8-B)Ux-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431M6Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G431M(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431M6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431M8Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G431M(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431M8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431MBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G431M(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431MBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431R6Ix</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G431R(6-8-B)Ix-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431R6Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431R8Ix</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G431R(6-8-B)Ix-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431R8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431RBIx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G431R(6-8-B)Ix-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431R6Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G431R(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431R8Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G431R(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431RBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G431R(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431V6Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G431V(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431V6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431V8Tx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G431V(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G431VBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G431xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G431V(6-8-B)Tx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G431VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441CBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G441CBTx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441CBUx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G441CBUx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441CBYx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32G441CBYx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441KBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32G441KBTx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441KBUx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G441KBUx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441MBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G441MBTx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441MBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441RBIx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G441RBIx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441RBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G441RBTx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G441VBTx</name>
    <status>Active</status>
    <dieId>0468</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G441xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G441VBTx-->
    <!--STVPdevicename = STM32G43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x2800</size>
        <!--end = 0x100027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G441VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471CCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G471C(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471CETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G471C(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471CCUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G471C(C-E)Ux-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471CEUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G471C(C-E)Ux-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471MCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G471M(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471MCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471METx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G471M(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471MEYx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32G471MEYx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471MEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471QCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G471Q(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471QCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471QETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G471Q(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471QETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471RCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G471R(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471RETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G471R(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471VCHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G471V(C-E)Hx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471VEHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G471V(C-E)Hx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471VCIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G471V(C-E)Ix-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471VEIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32G471V(C-E)Ix-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471VCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G471V(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G471VETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G471xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G471V(C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G471VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491CCTx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G491C(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491CETx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G491C(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491CCUx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G491C(C-E)Ux-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491CEUx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G491C(C-E)Ux-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491KCUx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G491K(C-E)Ux-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491KCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491KEUx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G491K(C-E)Ux-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491KEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491MCSx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G491M(C-E)Sx-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491MCSx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491MESx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G491M(C-E)Sx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491MESx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491MCTx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G491M(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491MCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491METx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G491M(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491RCIx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G491R(C-E)Ix-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491REIx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G491R(C-E)Ix-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491RCTx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G491R(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491RETx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G491R(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491REYx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32G491REYx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491VCTx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G491V(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G491VETx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G491xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G491V(C-E)Tx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G491VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1CETx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G4A1CETx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1CEUx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G4A1CEUx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1KEUx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32G4A1KEUx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1KEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1MESx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G4A1MESx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1MESx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1METx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G4A1METx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1REIx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32G4A1REIx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1RETx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G4A1RETx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1REYx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32G4A1REYx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G4A1VETx</name>
    <status>Active</status>
    <dieId>0479</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G4A1xx.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G4A1VETx-->
    <!--STVPdevicename = STM32G49xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1C000</size>
        <!--end = 0x2001BFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G4A1VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473CBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G473C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473CCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G473C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473CETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G473C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473CBUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G473C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473CCUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G473C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473CEUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G473C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473MBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G473M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473MBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473MCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G473M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473MCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473METx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G473M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473MEYx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32G473MEYx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473MEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473PBIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G473P(B-C-E)Ix-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473PBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473PCIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G473P(B-C-E)Ix-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473PCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473PEIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G473P(B-C-E)Ix-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473PEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473QBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G473Q(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473QBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473QCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G473Q(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473QCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473QETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G473Q(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473QETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473RBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G473R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473RCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G473R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473RETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G473R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473VBHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G473V(B-C-E)Hx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473VCHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G473V(B-C-E)Hx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473VEHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G473V(B-C-E)Hx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473VBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G473V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473VCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G473V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G473VETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G473xx.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G473V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G473VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483CETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G483CETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483CEUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G483CEUx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483METx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G483METx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483MEYx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32G483MEYx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483MEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483PEIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G483PEIx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483PEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483QETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G483QETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483QETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483RETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G483RETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483VEHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G483VEHx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G483VETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G483xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G483VETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G483VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474CBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G474C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474CCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G474C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474CETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G474C(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474CBUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G474C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474CCUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G474C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474CEUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G474C(B-C-E)Ux-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474MBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G474M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474MBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474MCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G474M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474MCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474METx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G474M(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474MEYx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32G474MEYx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474MEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474PBIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G474P(B-C-E)Ix-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474PBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474PCIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G474P(B-C-E)Ix-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474PCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474PEIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G474P(B-C-E)Ix-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474PEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474QBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G474Q(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474QBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474QCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G474Q(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474QCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474QETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G474Q(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474QETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474RBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G474R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474RCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G474R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474RETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G474R(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474VBHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G474V(B-C-E)Hx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474VCHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G474V(B-C-E)Hx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474VEHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G474V(B-C-E)Hx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474VBTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G474V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474VCTx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G474V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G474VETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G474xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G474V(B-C-E)Tx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G474VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484CETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32G484CETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484CEUx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32G484CEUx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484METx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP80</package>
    <!--XMLfilename = STM32G484METx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484METx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484MEYx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32G484MEYx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484MEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484PEIx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA121</package>
    <!--XMLfilename = STM32G484PEIx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484PEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484QETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP128</package>
    <!--XMLfilename = STM32G484QETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484QETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484RETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32G484RETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484VEHx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32G484VEHx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32G484VETx</name>
    <status>Active</status>
    <dieId>0469</dieId>
    <parent>stm32g4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32G484xx.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32G484VETx-->
    <!--STVPdevicename = STM32G47xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>CCMSRAM</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32G484VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H503CBTx</name>
    <status>Active</status>
    <dieId>0474</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H503.svd</name>
          <version>v0r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
            <trustzone>false</trustzone>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32H503CBTx-->
    <!--STVPdevicename = STM32H503xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H503CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H503CBUx</name>
    <status>Active</status>
    <dieId>0474</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H503.svd</name>
          <version>v0r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
            <trustzone>false</trustzone>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32H503CBUx-->
    <!--STVPdevicename = STM32H503xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H503CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H503EBYx</name>
    <status>Active</status>
    <dieId>0474</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H503.svd</name>
          <version>v0r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
            <trustzone>false</trustzone>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32H503EBYx-->
    <!--STVPdevicename = STM32H503xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H503EBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H503KBUx</name>
    <status>Active</status>
    <dieId>0474</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H503.svd</name>
          <version>v0r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
            <trustzone>false</trustzone>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32H503KBUx-->
    <!--STVPdevicename = STM32H503xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H503KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H503RBTx</name>
    <status>Active</status>
    <dieId>0474</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H503.svd</name>
          <version>v0r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
            <trustzone>false</trustzone>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H503RBTx-->
    <!--STVPdevicename = STM32H503xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H503RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562AIIx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H562AIIx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562IIKx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H562IIKx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562IITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H562IITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562RITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H562RITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562RIVx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H562RIVx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562RIVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562VITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H562VITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562ZITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H562ZITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563AIIx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H563AIIx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563AIIxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H563AIIxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563AIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563IGKx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H563IGKx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563IIKx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H563IIKx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563IIKxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H563IIKxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563IIKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563IITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H563IITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563IITxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H563IITxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563IITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563MIYxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP80</package>
    <!--XMLfilename = STM32H563MIYxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563MIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563RGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H563RGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563RITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H563RITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563RIVx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H563RIVx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563RIVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563VGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H563VGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563VITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H563VITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563VITxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H563VITxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563ZITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H563ZITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563ZITxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H563ZITxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573AIIx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H573AIIx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573AIIxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H573AIIxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573AIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573IIKx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H573IIKx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573IIKxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H573IIKxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573IIKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573IITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H573IITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573IITxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H573IITxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573IITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573MIYxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP80</package>
    <!--XMLfilename = STM32H573MIYxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573MIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573RITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H573RITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573RIVx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H573RIVx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573RIVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573VITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H573VITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573VITxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H573VITxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573ZITx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H573ZITx-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H573ZITxQ</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H573.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H573ZITxQ-->
    <!--STVPdevicename = STM32H56xxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H573ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562AGIx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H562AGIx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562IGKx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H562IGKx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562IGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H562IGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562RGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H562RGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562RGVx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H562RGVx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562RGVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562VGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H562VGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H562ZGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H562.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H562ZGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H562ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563AGIx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H563AGIx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563IGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H563IGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563RGVx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H563RGVx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563RGVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H563ZGTx</name>
    <status>Active</status>
    <dieId>0484</dieId>
    <parent>stm32h5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H563.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H563ZGTx-->
    <!--STVPdevicename = STM32H56xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H563ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723VEHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H723VEHx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723VETx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H723VETx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723VGHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H723VGHx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723VGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H723VGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723ZEIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32H723ZEIx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723ZEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723ZETx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H723ZETx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723ZGIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32H723ZGIx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723ZGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H723ZGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H723.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H723ZGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H723ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H733VGHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H733.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H733VGHx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H733VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H733VGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H733.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H733VGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H733VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H733ZGIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H733.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32H733ZGIx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H733ZGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H733ZGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H733.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H733ZGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H733ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725AEIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H725AEIx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725AEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725AGIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H725AGIx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725IEKx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H725IEKx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725IEKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725IETx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H725IETx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725IETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725IGKx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H725IGKx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725IGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H725IGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725REVx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H725REVx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725REVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725RGVx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H725RGVx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725RGVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725VEHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H725VEHx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725VEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725VETx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H725VETx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725VGHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H725VGHx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725VGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H725VGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725VGYx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP115</package>
    <!--XMLfilename = STM32H725VGYx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725VGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725ZETx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H725ZETx-->
    <!--STVPdevicename = STM32H72xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H725ZGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H725.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H725ZGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H725ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735AGIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H735AGIx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735IGKx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H735IGKx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735IGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H735IGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735RGVx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32H735RGVx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735RGVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735VGHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H735VGHx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735VGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H735VGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735VGYx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP115</package>
    <!--XMLfilename = STM32H735VGYx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735VGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H735ZGTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H735.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H735ZGTx-->
    <!--STVPdevicename = STM32H72xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H735ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730ABIxQ</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H730ABIxQ-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730ABIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730IBKxQ</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H730IBKxQ-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730IBKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730IBTxQ</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H730IBTxQ-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730IBTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730VBHx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H730VBHx-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730VBTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H730VBTx-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730ZBIx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32H730ZBIx-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730ZBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H730ZBTx</name>
    <status>Active</status>
    <dieId>0483</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H730.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H730ZBTx-->
    <!--STVPdevicename = STM32H730xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x50000</size>
        <!--end = 0x2404FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H730ZBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742AGIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H742A(G-I)Ix-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742AIIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H742A(G-I)Ix-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742BGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H742B(G-I)Tx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H742B(G-I)Tx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742IGKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H742I(G-I)Kx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742IIKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H742I(G-I)Kx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742IGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H742I(G-I)Tx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H742I(G-I)Tx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742VGHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H742V(G-I)Hx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742VIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H742V(G-I)Hx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742VGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H742V(G-I)Tx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742VITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H742V(G-I)Tx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742XGHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H742X(G-I)Hx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742XGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H742X(G-I)Hx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742ZGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H742Z(G-I)Tx-->
    <!--STVPdevicename = STM32H742xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H742ZITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H742.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H742Z(G-I)Tx-->
    <!--STVPdevicename = STM32H742xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x60000</size>
        <!--end = 0x2405FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H742ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743AGIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H743A(G-I)Ix-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743AIIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H743A(G-I)Ix-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743BGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H743BGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H743BITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743IGKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H743IGKx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743IGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H743IGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743IIKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H743IIKx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H743IITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743VGHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H743V(G-I)Hx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743VIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H743V(G-I)Hx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743VGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H743VGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743VITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H743VITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743XGHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H743XGHx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743XGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H743XIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743ZGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H743ZGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H743ZITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H743.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H743ZITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H743ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753AIIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H753AIIx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H753BITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753IIKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H753IIKx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H753IITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753VIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H753VIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753VITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H753VITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H753XIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H753ZITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H753.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H753ZITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H753ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745BGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H745BGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H745BITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745IGKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H745IGKx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745IGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H745IGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745IIKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H745IIKx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H745IITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745XGHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H745XGHx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745XGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H745XIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745ZGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H745ZGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H745ZITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H745_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H745_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H745ZITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H745ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H755BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H755_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H755_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H755BITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H755BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H755IIKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H755_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H755_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H755IIKx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H755IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H755IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H755_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H755_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H755IITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H755IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H755XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H755_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H755_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H755XIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H755XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H755ZITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H755_CM7.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H755_CM4.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H755ZITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H755ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747AGIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H747A(G-I)Ix-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747AIIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H747A(G-I)Ix-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747BGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H747BGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747BGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H747BITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747IGTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H747IGTx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H747IITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747XGHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H747XGHx-->
    <!--STVPdevicename = STM32H743xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747XGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H747XIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H747ZIYx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H747_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H747_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP156</package>
    <!--XMLfilename = STM32H747ZIYx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H747ZIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H757AIIx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H757_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H757_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H757AIIx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H757AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H757BITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H757_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H757_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP208</package>
    <!--XMLfilename = STM32H757BITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H757BITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H757IITx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H757_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H757_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H757IITx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H757IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H757XIHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H757_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H757_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H757XIHx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H757XIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H757ZIYx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7dual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H757_CM7.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32H757_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>3</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP156</package>
    <!--XMLfilename = STM32H757ZIYx-->
    <!--STVPdevicename = STM32H743xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H757ZIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H750IBKx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H750.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H750IBKx-->
    <!--STVPdevicename = STM32H750xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H750IBKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H750IBTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H750.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H750IBTx-->
    <!--STVPdevicename = STM32H750xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H750IBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H750VBTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H750.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H750VBTx-->
    <!--STVPdevicename = STM32H750xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H750VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H750XBHx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H750.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA240</package>
    <!--XMLfilename = STM32H750XBHx-->
    <!--STVPdevicename = STM32H750xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H750XBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H750ZBTx</name>
    <status>Active</status>
    <dieId>0450</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H750.svd</name>
          <version>v2r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H750ZBTx-->
    <!--STVPdevicename = STM32H750xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x80000</size>
        <!--end = 0x2407FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H750ZBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3AGIxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H7A3A(G-I)IxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3AGIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3AIIxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H7A3A(G-I)IxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3AIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IGKx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7A3I(G-I)Kx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IGKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IIKx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7A3I(G-I)Kx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IGKxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7A3I(G-I)KxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IGKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IIKxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7A3I(G-I)KxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IIKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IGTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7A3I(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7A3I(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IGTxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7A3I(G-I)TxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3IITxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7A3I(G-I)TxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3IITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3LGHxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA225</package>
    <!--XMLfilename = STM32H7A3L(G-I)HxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3LGHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3LIHxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA225</package>
    <!--XMLfilename = STM32H7A3L(G-I)HxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3LIHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3NGHx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32H7A3N(G-I)Hx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3NGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3NIHx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32H7A3N(G-I)Hx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3QIYxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP132</package>
    <!--XMLfilename = STM32H7A3QIYxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3QIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3RGTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H7A3R(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3RITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H7A3R(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VGHx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H7A3V(G-I)Hx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VIHx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H7A3V(G-I)Hx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VGHxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H7A3V(G-I)HxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VGHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VIHxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H7A3V(G-I)HxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VIHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VGTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7A3V(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7A3V(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VGTxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7A3V(G-I)TxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3VITxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7A3V(G-I)TxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3ZGTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7A3Z(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3ZITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7A3Z(G-I)Tx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3ZGTxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7A3Z(G-I)TxQ-->
    <!--STVPdevicename = STM32H7A3xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3ZGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7A3ZITxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7A3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7A3Z(G-I)TxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7A3ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3AIIxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H7B3AIIxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3AIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3IIKx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7B3IIKx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3IIKx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3IIKxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7B3IIKxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3IIKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3IITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7B3IITx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3IITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3IITxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7B3IITxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3IITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3LIHxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA225</package>
    <!--XMLfilename = STM32H7B3LIHxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3LIHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3NIHx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32H7B3NIHx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3NIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3QIYxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP132</package>
    <!--XMLfilename = STM32H7B3QIYxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3QIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3RITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H7B3RITx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3VIHx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H7B3VIHx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3VIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3VIHxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA100</package>
    <!--XMLfilename = STM32H7B3VIHxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3VIHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3VITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7B3VITx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3VITxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7B3VITxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3ZITx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7B3ZITx-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B3ZITxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B3.svd</name>
          <version>v2r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7B3ZITxQ-->
    <!--STVPdevicename = STM32H7A3xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B3ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B0ABIxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B0.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32H7B0ABIxQ-->
    <!--STVPdevicename = STM32H7B0xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B0ABIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B0IBKxQ</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B0.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA176</package>
    <!--XMLfilename = STM32H7B0IBKxQ-->
    <!--STVPdevicename = STM32H7B0xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B0IBKxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B0IBTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B0.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP176</package>
    <!--XMLfilename = STM32H7B0IBTx-->
    <!--STVPdevicename = STM32H7B0xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B0IBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B0RBTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B0.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32H7B0RBTx-->
    <!--STVPdevicename = STM32H7B0xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B0RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B0VBTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B0.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32H7B0VBTx-->
    <!--STVPdevicename = STM32H7B0xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B0VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32H7B0ZBTx</name>
    <status>Active</status>
    <dieId>0480</dieId>
    <parent>stm32h7single</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32H7B0.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m7</type>
            <fpu>fpv5-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32H7B0ZBTx-->
    <!--STVPdevicename = STM32H7B0xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x24000000</address>
        <size>0x100000</size>
        <!--end = 0x240FFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32H7B0ZBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L010C6Tx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L010C6Tx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L010C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L010F4Px</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L010F4Px-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L010F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L010K4Tx</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L010K4Tx-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L010K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L010K8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L010K8Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L010K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L010R8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L010R8Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L010R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L010RBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x0.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L010RBTx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L010RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011D3Px</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP14</package>
    <!--XMLfilename = STM32L011D(3-4)Px-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011D3Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011D4Px</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP14</package>
    <!--XMLfilename = STM32L011D(3-4)Px-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011D4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011E3Yx</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32L011E(3-4)Yx-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011E3Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011E4Yx</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32L011E(3-4)Yx-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011E4Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011F3Px</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L011F(3-4)Px-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011F3Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011F4Px</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L011F(3-4)Px-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011F3Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN20</package>
    <!--XMLfilename = STM32L011F(3-4)Ux-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011F3Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011F4Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN20</package>
    <!--XMLfilename = STM32L011F(3-4)Ux-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011F4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011G3Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L011G(3-4)Ux-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011G3Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011G4Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L011G(3-4)Ux-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011K3Tx</name>
    <status>Obsolete</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L011K(3-4)Tx-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011K3Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011K4Tx</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L011K(3-4)Tx-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011K3Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L011K(3-4)Ux-->
    <!--STVPdevicename = STM32L01xx3-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x2000</size>
        <!--end = 0x8001FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011K3Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L011K4Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L011K(3-4)Ux-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L011K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L021D4Px</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP14</package>
    <!--XMLfilename = STM32L021D4Px-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L021D4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L021F4Px</name>
    <status>Obsolete</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L021F4Px-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L021F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L021F4Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN20</package>
    <!--XMLfilename = STM32L021F4Ux-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L021F4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L021G4Ux</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L021G4Ux-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L021G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L021K4Tx</name>
    <status>Active</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L021K4Tx-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L021K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L021K4Ux</name>
    <status>Obsolete</status>
    <dieId>0457</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L021K4Ux-->
    <!--STVPdevicename = STM32L01xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x800</size>
        <!--end = 0x200007FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L021K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031C4Tx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L031C(4-6)Tx-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031C6Tx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L031C(4-6)Tx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031C4Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L031C(4-6)Ux-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031C4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031C6Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L031C(4-6)Ux-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031E4Yx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32L031E(4-6)Yx-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031E4Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031E6Yx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32L031E(4-6)Yx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031E6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031F4Px</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L031F(4-6)Px-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031F4Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031F6Px</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L031F(4-6)Px-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031G4Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L031G(4-6)Ux-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031G4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031G6Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L031G(4-6)Ux-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031G6UxS</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L031G6UxS-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031G6UxS</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031K4Tx</name>
    <status>Obsolete</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L031K(4-6)Tx-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031K4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031K6Tx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L031K(4-6)Tx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031K4Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L031K(4-6)Ux-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031K4Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L031K6Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L031K(4-6)Ux-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L031K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041C4Tx</name>
    <status>Obsolete</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L041C(4-6)Tx-->
    <!--STVPdevicename = STM32L03xx4-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x4000</size>
        <!--end = 0x8003FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041C4Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041C6Tx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L041C(4-6)Tx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041C6Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L041C6Ux-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041E6Yx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP25</package>
    <!--XMLfilename = STM32L041E6Yx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041E6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041F6Px</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TSSOP20</package>
    <!--XMLfilename = STM32L041F6Px-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041F6Px</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041G6Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L041G6Ux-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041G6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041G6UxS</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN28</package>
    <!--XMLfilename = STM32L041G6UxS-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041G6UxS</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041K6Tx</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L041K6Tx-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L041K6Ux</name>
    <status>Active</status>
    <dieId>0425</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L041K6Ux-->
    <!--STVPdevicename = STM32L03xx6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L041K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051C6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L051C(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051C8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L051C(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051C6Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L051C(6-8)Ux-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051C8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L051C(6-8)Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051K6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L051K(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051K8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L051K(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051K6Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L051K(6-8)Ux-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051K8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L051K(6-8)Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051R6Hx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L051R(6-8)Hx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051R8Hx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L051R(6-8)Hx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051R6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L051R(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051R8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L051R(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051T6Yx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L051T(6-8)Yx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051T6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L051T8Yx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L051T(6-8)Yx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L051T8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071CBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L071C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071CZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L071C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071CZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071CBUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L071C(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071CZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L071C(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071CZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071CBYx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L071C(B-Z)Yx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071CZYx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L071C(B-Z)Yx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071CZYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071C8Tx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L071C8Tx-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071C8Ux</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L071C8Ux-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071KBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L071K(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071KZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L071K(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071KZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071KBUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L071K(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071KZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L071K(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071KZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071K8Ux</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L071K8Ux-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071RBHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L071R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071RZHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L071R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071RZHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071RBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L071R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071RZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L071R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071RZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071VBIx</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L071V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071VBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071VZIx</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L071V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071VZIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071VBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L071V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071VZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L071V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071VZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071V8Ix</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L071V8Ix-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071V8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L071V8Tx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L071V8Tx-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L071V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L081CBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L081C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L081CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L081CZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L081C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L081CZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L081CZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L081CZUx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L081CZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L081KZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L081KZTx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L081KZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L081KZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x1.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L081KZUx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L081KZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052C6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L052C(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052C8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L052C(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052C6Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L052C(6-8)Ux-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052C8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L052C(6-8)Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052K6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L052K(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052K6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052K8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L052K(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052K6Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L052K(6-8)Ux-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052K6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052K8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L052K(6-8)Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052R6Hx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L052R(6-8)Hx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052R8Hx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L052R(6-8)Hx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052R6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L052R(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052R8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L052R(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052T6Yx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L052T(6-8)Yx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052T6Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052T8Yx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L052T(6-8)Yx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052T8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L052T8Fx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L052.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L052T8Fx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L052T8Fx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L062C8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L062.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L062C8Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L062C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L062K8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L062.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L062K8Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L062K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L062K8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L062.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L062K8Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L062K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L072C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L072C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CBUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L072C(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L072C(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CBYx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L072C(B-Z)Yx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CZYx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L072C(B-Z)Yx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CZYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072CZEx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>EWLCSP49</package>
    <!--XMLfilename = STM32L072CZEx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072CZEx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072KBTx</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L072K(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072KZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L072K(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072KZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072KBUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L072K(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072KZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L072K(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072KZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072RBHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L072R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072RZHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L072R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072RZHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072RBIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L072R(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072RZIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L072R(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072RZIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072RBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L072R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072RZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L072R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072RZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072VBIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L072V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072VBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072VZIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L072V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072VZIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072VBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L072V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072VZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L072V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072VZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072V8Ix</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L072V8Ix-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072V8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L072V8Tx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L072V8Tx-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L072V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L082CZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L082CZUx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L082CZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L082CZYx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L082CZYx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L082CZYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L082KBTx</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L082K(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L082KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L082KZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L082K(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L082KZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L082KBUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L082K(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L082KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L082KZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x2.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L082K(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L082KZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053C6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L053C(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053C8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L053C(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053C6Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L053C(6-8)Ux-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053C8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L053C(6-8)Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053R6Hx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L053R(6-8)Hx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053R8Hx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L053R(6-8)Hx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053R6Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L053R(6-8)Tx-->
    <!--STVPdevicename = STM32L053x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L053R8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L053.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L053R(6-8)Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L053R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L063C8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L063.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L063C8Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L063C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L063C8Ux</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L063.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L063C8Ux-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L063C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L063R8Tx</name>
    <status>Active</status>
    <dieId>0417</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L063.svd</name>
          <version>v1r0</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L063R8Tx-->
    <!--STVPdevicename = STM32L053x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L063R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073CBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L073C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073CZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L073C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073CZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073CBUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L073C(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073CZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L073C(B-Z)Ux-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073CZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073CZYx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L073CZYx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073CZYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073RBHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L073R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073RZHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L073R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073RZHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073RBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L073R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073RZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L073R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073RZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073RZIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L073RZIx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073RZIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073VBIx</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L073V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073VBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073VZIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L073V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073VZIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073VBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L073V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073VZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L073V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073VZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073V8Ix</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L073V8Ix-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073V8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L073V8Tx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L073V8Tx-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L073V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083CBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L083C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083CZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L083C(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083CZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083CZUx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L083CZUx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083CZUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083RBHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L083R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083RZHx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L083R(B-Z)Hx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083RZHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083RBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L083R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083RZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L083R(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083RZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083VBIx</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L083V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083VBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083VZIx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L083V(B-Z)Ix-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083VZIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083VBTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L083V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083VZTx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L083V(B-Z)Tx-->
    <!--STVPdevicename = STM32L073xZ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x30000</size>
        <!--end = 0x802FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083VZTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083V8Ix</name>
    <status>Obsolete</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L083V8Ix-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083V8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L083V8Tx</name>
    <status>Active</status>
    <dieId>0447</dieId>
    <parent>stm32l0</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L0x3.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L083V8Tx-->
    <!--STVPdevicename = STM32L073x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L083V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100C6Ux</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L100C6Ux-->
    <!--STVPdevicename = STM32L100C6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x1000</size>
        <!--end = 0x20000FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100C6UxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L100C6UxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100C6UxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100R8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L100R(8-B)Tx-->
    <!--STVPdevicename = STM32L100R8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2000</size>
        <!--end = 0x20001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100RBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L100R(8-B)Tx-->
    <!--STVPdevicename = STM32L100RB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100R8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L100R(8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100R8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100RBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L100R(8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100RBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L100RCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L100.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L100RCTx-->
    <!--STVPdevicename = STM32L100RC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L100RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C6Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151C(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151C(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151CBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151C(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C6TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151C(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C6TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151C(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151CBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151C(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151CBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C6Ux</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151C(6-8-B)Ux-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C8Ux</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151C(6-8-B)Ux-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151CBUx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151C(6-8-B)Ux-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C6UxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151C(6-8-B)UxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C6UxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151C8UxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151C(6-8-B)UxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151C8UxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151CBUxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151C(6-8-B)UxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151CBUxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151CCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L151CCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151CCUx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L151CCUx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151QCHx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L151QCHx-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151QCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151QDHx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L151QDHx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151QDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151QEHx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L151QEHx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151QEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R6Hx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L151R(6-8-B)Hx-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R8Hx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L151R(6-8-B)Hx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RBHx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L151R(6-8-B)Hx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R6HxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L151R(6-8-B)HxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R6HxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R8HxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L151R(6-8-B)HxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R8HxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RBHxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L151R(6-8-B)HxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RBHxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R6Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151R(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151R(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151R(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R6TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151R(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R6TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151R8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151R(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151R8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151R(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151RCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RCTxA</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151RCTxA-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RCTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RCYx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L151RCYx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151RDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RDYx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L151RDYx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RDYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151RETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L151RETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151UCYx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP63</package>
    <!--XMLfilename = STM32L151UCYx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151UCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151V8Hx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L151V(8-B)Hx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VBHx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L151V(8-B)Hx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151V8HxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L151V(8-B)HxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151V8HxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VBHxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L151V(8-B)HxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VBHxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151V8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151V(8-B)Tx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151V(8-B)Tx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151V8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151V(8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151V8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151V(8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VCHx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L151VCHx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151VCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VCTxA</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151VCTxA-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VCTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151VDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VDTxX</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151VDTxX-->
    <!--STVPdevicename = STM32L162VDYxX-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x70000</size>
        <!--end = 0x806FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VDTxX</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VDYxX</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP104</package>
    <!--XMLfilename = STM32L151VDYxX-->
    <!--STVPdevicename = STM32L162VDYxX-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x70000</size>
        <!--end = 0x806FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VDYxX</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L151VETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151VEYx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP104</package>
    <!--XMLfilename = STM32L151VEYx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151VEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151ZCTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L151ZCTx-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151ZDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L151ZDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L151ZETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L151.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L151ZETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L151ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C6Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152C(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152C(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152CBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152C(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C6TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152C(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C6TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152C(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152CBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152C(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152CBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C6Ux</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152C(6-8-B)Ux-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C6Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C8Ux</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152C(6-8-B)Ux-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152CBUx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152C(6-8-B)Ux-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C6UxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152C(6-8-B)UxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C6UxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152C8UxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152C(6-8-B)UxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152C8UxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152CBUxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152C(6-8-B)UxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152CBUxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152CCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L152CCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152CCUx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L152CCUx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152QCHx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L152QCHx-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152QCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152QDHx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L152QDHx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152QDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152QEHx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L152QEHx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152QEHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R6Hx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L152R(6-8-B)Hx-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R6Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R8Hx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L152R(6-8-B)Hx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RBHx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L152R(6-8-B)Hx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R6HxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L152R(6-8-B)HxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R6HxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R8HxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L152R(6-8-B)HxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R8HxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RBHxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA64</package>
    <!--XMLfilename = STM32L152R(6-8-B)HxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RBHxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R6Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152R(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x6-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R6Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152R(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152R(6-8-B)Tx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R6TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152R(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x6xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x8000</size>
        <!--end = 0x8007FFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R6TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152R8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152R(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152R8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152R(6-8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152RCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RCTxA</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152RCTxA-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RCTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152RDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RDYx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L152RDYx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RDYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152RETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L152RETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152UCYx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP63</package>
    <!--XMLfilename = STM32L152UCYx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152UCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152V8Hx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L152V(8-B)Hx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152V8Hx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VBHx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L152V(8-B)Hx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VBHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152V8HxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L152V(8-B)HxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152V8HxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VBHxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L152V(8-B)HxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VBHxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152V8Tx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152V(8-B)Tx-->
    <!--STVPdevicename = STM32L152x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x2800</size>
        <!--end = 0x200027FF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152V8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VBTx</name>
    <status>Active</status>
    <dieId>0416</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152V(8-B)Tx-->
    <!--STVPdevicename = STM32L152xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x4000</size>
        <!--end = 0x20003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152V8TxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152V(8-B)TxA-->
    <!--STVPdevicename = STM32L152x8xxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152V8TxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VBTxA</name>
    <status>Active</status>
    <dieId>0429</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152V(8-B)TxA-->
    <!--STVPdevicename = STM32L152xBxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VBTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VCHx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L152VCHx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152VCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VCTxA</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152VCTxA-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VCTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152VDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VDTxX</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152VDTxX-->
    <!--STVPdevicename = STM32L162VDYxX-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x70000</size>
        <!--end = 0x806FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VDTxX</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L152VETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152VEYx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP104</package>
    <!--XMLfilename = STM32L152VEYx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152VEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152ZCTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L152ZCTx-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152ZDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L152ZDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L152ZETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L152.svd</name>
          <version>v1r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L152ZETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L152ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162QCHx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L162QCHx-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162QCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162QDHx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L162QDHx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162QDHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162RCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L162RCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162RCTxA</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L162RCTxA-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162RCTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162RDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L162RDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162RDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162RDYx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L162RDYx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162RDYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162RETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L162RETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VCHx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L162VCHx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VCTx</name>
    <status>Active</status>
    <dieId>0427</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L162VCTx-->
    <!--STVPdevicename = STM32L162VC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VCTxA</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L162VCTxA-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VCTxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L162VDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VDYxX</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP104</package>
    <!--XMLfilename = STM32L162VDYxX-->
    <!--STVPdevicename = STM32L162VDYxX-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x70000</size>
        <!--end = 0x806FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VDYxX</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L162VETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162VEYx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP104</package>
    <!--XMLfilename = STM32L162VEYx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162VEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162ZCTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L162ZCTx-->
    <!--STVPdevicename = STM32L162ZC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x8000</size>
        <!--end = 0x20007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162ZCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162ZDTx</name>
    <status>Active</status>
    <dieId>0436</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L162ZDTx-->
    <!--STVPdevicename = STM32L152xD-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x60000</size>
        <!--end = 0x805FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162ZDTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L162ZETx</name>
    <status>Active</status>
    <dieId>0437</dieId>
    <parent>stm32l1</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L162.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m3</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L162ZETx-->
    <!--STVPdevicename = STM32L152xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x14000</size>
        <!--end = 0x20013FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L162ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431CBTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L431C(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431CCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L431C(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431CBUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L431C(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431CCUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L431C(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431CBYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L431C(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431CCYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L431C(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431CCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431KBUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L431K(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431KCUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L431K(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431KCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431RBIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L431R(B-C)Ix-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431RCIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L431R(B-C)Ix-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431RBTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L431R(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431RCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L431R(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431RBYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L431R(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431RBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431RCYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L431R(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431VCIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L431VCIx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L431VCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L431VCTx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L431VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451CCUx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L451C(C-E)Ux-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451CEUx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L451C(C-E)Ux-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451CETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L451CETx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451RCIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L451R(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451REIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L451R(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451RCTx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L451R(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451RETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L451R(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451RCYx</name>
    <status>Obsolete</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L451R(C-E)Yx-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451REYx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L451R(C-E)Yx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451VCIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L451V(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451VEIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L451V(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451VCTx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L451V(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L451VETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L451V(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L451VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471QEIx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L471Q(E-G)Ix-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471QEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471QGIx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L471Q(E-G)Ix-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471QGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471RETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L471R(E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471RGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L471R(E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471VETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L471V(E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471VGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L471V(E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471ZEJx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32L471Z(E-G)Jx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
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        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471ZEJx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471ZGJx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32L471Z(E-G)Jx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471ZGJx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471ZETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L471Z(E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L471ZGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x1.svd</name>
          <version>v2r4</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L471Z(E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L471ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412C8Tx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L412C8Tx-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412C8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412C8Ux</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L412C8Ux-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412CBTx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L412CBTx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412CBTxP</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L412CBTxP-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412CBTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412CBUx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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      </cpu>
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    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L412CBUx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
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        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412CBUxP</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L412CBUxP-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412CBUxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412K8Tx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L412K8Tx-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412K8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412K8Ux</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L412K8Ux-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412K8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412KBTx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L412KBTx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412KBUx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L412KBUx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
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        <size>0xA000</size>
        <!--end = 0x20009FFF-->
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      <memory>
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        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412R8Ix</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L412R8Ix-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
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      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412R8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412R8Tx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L412R8Tx-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412R8Tx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412RBIx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L412RBIx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412RBIxP</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L412RBIxP-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412RBIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412RBTx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L412RBTx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412RBTxP</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L412RBTxP-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412RBTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412T8Yx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L412T8Yx-->
    <!--STVPdevicename = STM32L412x8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412T8Yx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412TBYx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L412TBYx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412TBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L412TBYxP</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L412TBYxP-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L412TBYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422CBTx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L422CBTx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422CBUx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L422CBUx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422KBTx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP32</package>
    <!--XMLfilename = STM32L422KBTx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422KBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422KBUx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L422KBUx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422RBIx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L422RBIx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422RBTx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L422RBTx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L422TBYx</name>
    <status>Active</status>
    <dieId>0464</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L412.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP36</package>
    <!--XMLfilename = STM32L422TBYx-->
    <!--STVPdevicename = STM32L412xB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA000</size>
        <!--end = 0x20009FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x2000</size>
        <!--end = 0x10001FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L422TBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L432KBUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L432K(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L432KBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L432KCUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L432K(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L432KCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L442KCUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN32</package>
    <!--XMLfilename = STM32L442KCUx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L442KCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452CCUx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
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    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452CEUx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L452C(C-E)Ux-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452CETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L452CETx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452CETxP</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L452CETxP-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452CETxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452RCIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L452R(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452REIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L452R(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452RCTx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L452R(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452RETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L452R(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452RCYx</name>
    <status>Obsolete</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L452R(C-E)Yx-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452REYx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L452R(C-E)Yx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452RETxP</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L452RETxP-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452RETxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452REYxP</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L452REYxP-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452REYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452VCIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L452V(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452VEIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L452V(C-E)Ix-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452VCTx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L452V(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L452VETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L452V(C-E)Tx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L452VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462CETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L462CETx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462CEUx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L462CEUx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462REIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L462REIx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462RETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L462RETx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462REYx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L462REYx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462REYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462VEIx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L462VEIx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L462VETx</name>
    <status>Active</status>
    <dieId>0462</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x2.svd</name>
          <version>v2r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L462VETx-->
    <!--STVPdevicename = STM32L45xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x28000</size>
        <!--end = 0x20027FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L462VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433CBTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L433C(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433CCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L433C(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433CBUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L433C(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433CCUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L433C(B-C)Ux-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433CBYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L433C(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433CBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433CCYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L433C(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433CCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RBIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L433R(B-C)Ix-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RCIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L433R(B-C)Ix-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RBTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L433R(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L433R(B-C)Tx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RBYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L433R(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RBYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RCYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L433R(B-C)Yx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433RCTxP</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L433RCTxP-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433RCTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433VCIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L433VCIx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L433VCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L433VCTx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L433VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443CCFx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L443CCFx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443CCFx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443CCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L443CCTx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443CCUx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L443CCUx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443CCYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32L443CCYx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443CCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443RCIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32L443RCIx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443RCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L443RCTx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443RCYx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP64</package>
    <!--XMLfilename = STM32L443RCYx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443RCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443VCIx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32L443VCIx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L443VCTx</name>
    <status>Active</status>
    <dieId>0435</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x3.svd</name>
          <version>v1r8</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L443VCTx-->
    <!--STVPdevicename = STM32L43xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x4000</size>
        <!--end = 0x10003FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L443VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L475RCTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L475R(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L475RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L475RETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L475R(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L475RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L475RGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L475R(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L475RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L475VCTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L475V(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L475VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L475VETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L475V(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L475VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L475VGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L475V(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L475VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L485JCYx</name>
    <status>Obsolete</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32L485J(C-E)Yx-->
    <!--STVPdevicename = STM32L476xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L485JCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L485JEYx</name>
    <status>Obsolete</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4x5.svd</name>
          <version>v1r7</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32L485J(C-E)Yx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L485JEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476JEYx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32L476J(E-G)Yx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476JEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476JGYx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32L476J(E-G)Yx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476JGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476JGYxP</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32L476JGYxP-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476JGYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476MEYx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32L476M(E-G)Yx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476MEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476MGYx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32L476M(E-G)Yx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476MGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476QEIx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L476Q(E-G)Ix-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476QEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476QGIx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L476Q(E-G)Ix-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476QGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476QGIxP</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L476QGIxP-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476QGIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476RCTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L476R(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476RETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L476R(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476RGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L476R(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476VCTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L476V(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476VETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L476V(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476VGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L476V(C-E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476VGYxP</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP99</package>
    <!--XMLfilename = STM32L476VGYxP-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476VGYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476ZETx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L476Z(E-G)Tx-->
    <!--STVPdevicename = STM32L476xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476ZGTx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L476Z(E-G)Tx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476ZGJx</name>
    <status>Active</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L476.svd</name>
          <version>v1r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32L476ZGJx-->
    <!--STVPdevicename = STM32L476xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x8000</size>
        <!--end = 0x10007FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L476ZGJx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L476ZGTxP</name>
    <status>Obsolete</status>
    <dieId>0415</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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    <CDefines>
      <CDefine>-DSTM32L476ZGTxP</CDefine>
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  <mcu>
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      <cpu>
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    <CDefines>
      <CDefine>-DSTM32L486JGYx</CDefine>
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  <mcu>
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    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32L486QGIx</CDefine>
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  <mcu>
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    <cpus>
      <cpu>
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      <memory>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L486RGTx</CDefine>
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  <mcu>
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    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32L486VGTx</CDefine>
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  <mcu>
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    <dieId>0415</dieId>
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    <cpus>
      <cpu>
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    <CDefines>
      <CDefine>-DSTM32L486ZGTx</CDefine>
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  <mcu>
    <name>STM32L496AEIx</name>
    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L496AEIx</CDefine>
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    <dieId>0461</dieId>
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    <cpus>
      <cpu>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L496AGIx</CDefine>
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    <dieId>0461</dieId>
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    <cpus>
      <cpu>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L496AGIxP</CDefine>
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    <status>Active</status>
    <dieId>0461</dieId>
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    <cpus>
      <cpu>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L496QEIx</CDefine>
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    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
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      <cpu>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L496QGIx</CDefine>
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    <status>Active</status>
    <dieId>0461</dieId>
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    <cpus>
      <cpu>
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L496QGIxP</CDefine>
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    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x1000FFFF-->
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        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L496QGIxS</CDefine>
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    <name>STM32L496RETx</name>
    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
        <id>0</id>
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    <package>LQFP64</package>
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L496RETx</CDefine>
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    <name>STM32L496RGTx</name>
    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
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        <!--end = 0x80FFFFF-->
      </memory>
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    <CDefines>
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    <name>STM32L496RGTxP</name>
    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
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    <CDefines>
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    <CDefines>
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    <CDefines>
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    <status>Active</status>
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    <cpus>
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      </cpu>
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    <package>LQFP64</package>
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      <memory>
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    <CDefines>
      <CDefine>-DSTM32L4A6RGTxP</CDefine>
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  <mcu>
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      <cpu>
        <id>0</id>
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          <core>
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        <!--end = 0x2004FFFF-->
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      <memory>
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4A6VGTx</CDefine>
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  <mcu>
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    <cpus>
      <cpu>
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          <core>
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      <memory>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L4A6VGTxP</CDefine>
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  <mcu>
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    <cpus>
      <cpu>
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          <core>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4A6VGYx</CDefine>
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  <mcu>
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    <dieId>0461</dieId>
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    <cpus>
      <cpu>
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          <core>
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        <!--end = 0x2004FFFF-->
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      <memory>
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4A6VGYxP</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0461</dieId>
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    <cpus>
      <cpu>
        <id>0</id>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4A6ZGTx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0461</dieId>
    <parent>stm32l4</parent>
    <cpus>
      <cpu>
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          <core>
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4A6ZGTxP</CDefine>
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  <mcu>
    <name>STM32L4P5AGIx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <core>
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5AGIx</CDefine>
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  <mcu>
    <name>STM32L4P5AEIx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
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        <!--end = 0x1000FFFF-->
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5AEIx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
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        <!--end = 0x2004FFFF-->
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      <memory>
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      <memory>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L4P5AGIxP</CDefine>
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  <mcu>
    <name>STM32L4P5CGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L4P5CGTx</CDefine>
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  <mcu>
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    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x1000FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5CETx</CDefine>
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  <mcu>
    <name>STM32L4P5CGUx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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        <cores>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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    <package>UFQFPN48</package>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5CGUx</CDefine>
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  <mcu>
    <name>STM32L4P5CEUx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
          <url></url>
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        <cores>
          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5CEUx</CDefine>
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  <mcu>
    <name>STM32L4P5CGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
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        </svd>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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      </cpu>
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    <package>LQFP48</package>
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      <memory>
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      <memory>
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      <memory>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5CGTxP</CDefine>
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  <mcu>
    <name>STM32L4P5CGUxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
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    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
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    <package>UFQFPN48</package>
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      <memory>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5CGUxP</CDefine>
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  <mcu>
    <name>STM32L4P5QGIx</name>
    <status>Active</status>
    <dieId>0471</dieId>
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      <cpu>
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          <core>
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      <memory>
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    <CDefines>
      <CDefine>-DSTM32L4P5QGIx</CDefine>
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  <mcu>
    <name>STM32L4P5QEIx</name>
    <status>Active</status>
    <dieId>0471</dieId>
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    <cpus>
      <cpu>
        <id>0</id>
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          <core>
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            <apnum>0</apnum>
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      <memory>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5QEIx</CDefine>
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  <mcu>
    <name>STM32L4P5QGIxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
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    <cpus>
      <cpu>
        <id>0</id>
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          <core>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5QGIxP</CDefine>
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  <mcu>
    <name>STM32L4P5QGIxS</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
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          <core>
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            <apnum>0</apnum>
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      <memory>
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5QGIxS</CDefine>
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  <mcu>
    <name>STM32L4P5RGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
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          <core>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L4P5RGTx</CDefine>
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  <mcu>
    <name>STM32L4P5RETx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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        <!--end = 0x807FFFF-->
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    <CDefines>
      <CDefine>-DSTM32L4P5RETx</CDefine>
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  <mcu>
    <name>STM32L4P5RGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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            <apnum>0</apnum>
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        <!--end = 0x80FFFFF-->
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    <CDefines>
      <CDefine>-DSTM32L4P5RGTxP</CDefine>
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  <mcu>
    <name>STM32L4P5VGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5VGTx</CDefine>
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  <mcu>
    <name>STM32L4P5VETx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
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        <svd>
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            <apnum>0</apnum>
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5VETx</CDefine>
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  <mcu>
    <name>STM32L4P5VGYx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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            <apnum>0</apnum>
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    <package>WLCSP100</package>
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        <!--end = 0x2004FFFF-->
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        <!--end = 0x1000FFFF-->
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        <!--end = 0x2004FFFF-->
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      <memory>
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        <!--end = 0x80FFFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5VGYx</CDefine>
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  <mcu>
    <name>STM32L4P5VEYx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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        <!--end = 0x807FFFF-->
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    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5VEYx</CDefine>
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  <mcu>
    <name>STM32L4P5VGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
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          <version>v1r5</version>
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        <cores>
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            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
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    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5VGTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4P5VGYxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4P5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
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    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5VGYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4P5ZGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4P5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
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    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4P5ZETx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4P5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4P5Z(G-E)Tx-->
    <!--STVPdevicename = STM32L4P5xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4P5ZGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4P5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4P5ZGTxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4P5ZGTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5AGIx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4Q5AGIx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5AGIxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4Q5AGIxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5AGIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5CGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L4Q5CGTx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5CGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5CGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
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        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L4Q5CGTxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
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        <name>RAM</name>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
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      <memory>
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        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
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        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5CGTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5CGUx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L4Q5CGUx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5CGUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5CGUxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L4Q5CGUxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
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        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5CGUxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5QGIx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L4Q5QGIx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5QGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5QGIxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L4Q5QGIxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5QGIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5RGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L4Q5RGTx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5RGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L4Q5RGTxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5RGTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5VGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4Q5VGTx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5VGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4Q5VGTxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5VGTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5VGYx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32L4Q5VGYx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5VGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5VGYxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32L4Q5VGYxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5VGYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5ZGTx</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4Q5ZGTx-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4Q5ZGTxP</name>
    <status>Active</status>
    <dieId>0471</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4Q5.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4Q5ZGTxP-->
    <!--STVPdevicename = STM32L4P5xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x50000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20030000</address>
        <size>0x20000</size>
        <!--end = 0x2004FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4Q5ZGTxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5AGIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4R5A(G-I)Ix-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5AIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4R5A(G-I)Ix-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5AIIxP</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4R5AIIxP-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5AIIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5QGIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L4R5Q(G-I)Ix-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5QGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5QIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L4R5Q(G-I)Ix-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5QIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5QGIxS</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L4R5QGIxS-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5QGIxS</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5QIIxP</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
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    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5QIIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5VGTx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4R5V(G-I)Tx-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5VITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
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    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5ZGTx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
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    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5ZITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4R5Z(G-I)Tx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5ZGYx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4R5Z(G-I)Yx-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5ZGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5ZIYx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4R5Z(G-I)Yx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5ZIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R5ZITxP</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R5.svd</name>
          <version>v2r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4R5ZITxP-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R5ZITxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S5AIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S5.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4S5AIIx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S5AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S5QIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S5.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L4S5QIIx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S5QIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S5VITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S5.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4S5VITx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
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        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S5VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S5ZITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S5.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4S5ZITx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
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        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S5ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S5ZIYx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S5.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4S5ZIYx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S5ZIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R7AIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R7.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4R7AIIx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R7AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R7VITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R7.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
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    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R7VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R7ZITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R7.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
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    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R7ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S7AIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S7.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4S7AIIx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S7AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S7VITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S7.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4S7VITx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S7VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S7ZITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S7.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4S7ZITx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S7ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9AGIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4R9A(G-I)Ix-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9AIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4R9A(G-I)Ix-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
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        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9VGTx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4R9V(G-I)Tx-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9VITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4R9V(G-I)Tx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZGJx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32L4R9Z(G-I)Jx-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZGJx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZIJx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32L4R9Z(G-I)Jx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZIJx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZGTx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4R9Z(G-I)Tx-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
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    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZGYx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4R9Z(G-I)Yx-->
    <!--STVPdevicename = STM32L4SxxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZIYx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4R9Z(G-I)Yx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4R9ZIYxP</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4R9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4R9ZIYxP-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4R9ZIYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S9AIIx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32L4S9AIIx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S9AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S9VITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L4S9VITx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S9VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S9ZIJx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA144</package>
    <!--XMLfilename = STM32L4S9ZIJx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S9ZIJx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S9ZITx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L4S9ZITx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S9ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L4S9ZIYx</name>
    <status>Active</status>
    <dieId>0470</dieId>
    <parent>stm32l4plus</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L4S9.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP144</package>
    <!--XMLfilename = STM32L4S9ZIYx-->
    <!--STVPdevicename = STM32L4SxxI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xA0000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM2</name>
        <address>0x10000000</address>
        <size>0x10000</size>
        <!--end = 0x1000FFFF-->
      </memory>
      <memory>
        <type>RAM</type>
        <name>SRAM3</name>
        <address>0x20040000</address>
        <size>0x60000</size>
        <!--end = 0x2009FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L4S9ZIYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552CCTx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L552C(C-E)Tx-->
    <!--STVPdevicename = STM32L552xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552CETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L552C(C-E)Tx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552CCUx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L552C(C-E)Ux-->
    <!--STVPdevicename = STM32L552xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552CEUx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L552C(C-E)Ux-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552CETxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L552CETxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552CETxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552CEUxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L552CEUxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552CEUxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552MEYxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32L552MEYxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552MEYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552MEYxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32L552MEYxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552MEYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552QCIxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L552Q(C-E)IxQ-->
    <!--STVPdevicename = STM32L552xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552QCIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552QEIxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L552Q(C-E)IxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552QEIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552QEIx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L552QEIx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552QEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552QEIxP</name>
    <status>Obsolete</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L552QEIxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552QEIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552RCTx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L552R(C-E)Tx-->
    <!--STVPdevicename = STM32L552xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552RETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L552R(C-E)Tx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552RETxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L552RETxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552RETxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552RETxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L552RETxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552RETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552VCTxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L552V(C-E)TxQ-->
    <!--STVPdevicename = STM32L552xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552VCTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552VETxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L552V(C-E)TxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552VETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552VETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L552VETx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552ZCTxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L552Z(C-E)TxQ-->
    <!--STVPdevicename = STM32L552xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552ZCTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552ZETxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L552Z(C-E)TxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552ZETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L552ZETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L552.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L552ZETx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L552ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562CETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L562CETx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562CETxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32L562CETxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562CETxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562CEUx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L562CEUx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562CEUxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32L562CEUxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562CEUxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562MEYxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32L562MEYxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562MEYxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562MEYxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP81</package>
    <!--XMLfilename = STM32L562MEYxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562MEYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562QEIx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L562QEIx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562QEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562QEIxP</name>
    <status>Obsolete</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L562QEIxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562QEIxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562QEIxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32L562QEIxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562QEIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562RETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L562RETx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562RETxP</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L562RETxP-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562RETxP</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562RETxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32L562RETxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562RETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562VETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L562VETx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562VETxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32L562VETxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562VETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562ZETx</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L562ZETx-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562ZETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32L562ZETxQ</name>
    <status>Active</status>
    <dieId>0472</dieId>
    <parent>stm32l5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32L562.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32L562ZETxQ-->
    <!--STVPdevicename = STM32L552xE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32L562ZETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575AGIx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32U575AGIx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575AGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575AGIxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32U575AGIxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575AGIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575AIIx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32U575AIIx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575AIIxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32U575AIIxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575AIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CGTx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U575CGTx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CGTxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U575CGTxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CGUx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U575CGUx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CGUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CGUxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U575CGUxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CGUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U575CITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U575CITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CIUx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U575CIUx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CIUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575CIUxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U575CIUxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575CIUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575OGYxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP90</package>
    <!--XMLfilename = STM32U575OGYxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575OGYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575OIYxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP90</package>
    <!--XMLfilename = STM32U575OIYxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575OIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575QGIx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U575QGIx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575QGIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575QGIxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U575QGIxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575QGIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575QIIx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U575QIIx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575QIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575QIIxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U575QIIxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575QIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575RGTx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U575RGTx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575RGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575RGTxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U575RGTxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575RGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575RITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U575RITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575RITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U575RITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575RITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575VGTx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U575VGTx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575VGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575VGTxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U575VGTxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575VGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575VITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U575VITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575VITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U575VITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575ZGTx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U575ZGTx-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575ZGTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575ZGTxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U575ZGTxQ-->
    <!--STVPdevicename = STM32U575xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575ZGTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575ZITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U575ZITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U575ZITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U575.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U575ZITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U575ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585AIIx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32U585AIIx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585AIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585AIIxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA169</package>
    <!--XMLfilename = STM32U585AIIxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585AIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585CITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U585CITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585CITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585CITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U585CITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585CITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585CIUx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U585CIUx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585CIUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585CIUxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U585CIUxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585CIUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585OIYxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP90</package>
    <!--XMLfilename = STM32U585OIYxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585OIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585QIIx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U585QIIx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585QIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585QIIxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U585QIIxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585QIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585RITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U585RITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585RITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U585RITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585RITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585VITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U585VITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585VITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U585VITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585ZITx</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U585ZITx-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U585ZITxQ</name>
    <status>Active</status>
    <dieId>0482</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U585.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U585ZITxQ-->
    <!--STVPdevicename = STM32U575xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0xC0000</size>
        <!--end = 0x200BFFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U585ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595ZJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U595ZJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595ZJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595ZJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U595ZJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595ZJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5ZJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U5A5ZJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5ZJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5ZJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U5A5ZJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5ZJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599BJYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP208</package>
    <!--XMLfilename = STM32U599BJYxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599BJYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599NIHxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32U599NIHxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599NIHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599NJHxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32U599NJHxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599NJHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599ZJTxQ</name>
    <status>Obsolete</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U599ZJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599ZJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A9BJYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A9.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP208</package>
    <!--XMLfilename = STM32U5A9BJYxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A9BJYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A9NJHxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A9.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA216</package>
    <!--XMLfilename = STM32U5A9NJHxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A9NJHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CBTx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U535CBTx-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CBTxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U535CBTxQ-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CBTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CBUx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U535CBUx-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CBUxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U535CBUxQ-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CBUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CCTx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U535CCTx-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CCTxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U535CCTxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CCTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CCUx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U535CCUx-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CCUxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U535CCUxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CCUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CETx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U535CETx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CETxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U535CETxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CEUx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U535CEUx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535CEUxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U535CEUxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535CEUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535JEYxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32U535JEYxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535JEYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535NCYxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP56</package>
    <!--XMLfilename = STM32U535NCYxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535NCYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535NEYxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP56</package>
    <!--XMLfilename = STM32U535NEYxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535NEYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RBIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U535RBIx-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RBIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U535RBIxQ-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RBIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RBTx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U535RBTx-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RBTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RBTxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U535RBTxQ-->
    <!--STVPdevicename = STM32U53xxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RBTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RCIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U535RCIx-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RCIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U535RCIxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RCIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RCTx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U535RCTx-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RCTxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U535RCTxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RCTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535REIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U535REIx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535REIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U535REIxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535REIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RETx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U535RETx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535RETxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U535RETxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535RETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VCIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32U535VCIx-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VCIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32U535VCIxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VCIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VCTx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U535VCTx-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VCTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VCTxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U535VCTxQ-->
    <!--STVPdevicename = STM32U53xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VCTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VEIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32U535VEIx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VEIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32U535VEIxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VEIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VETx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U535VETx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U535VETxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U535.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U535VETxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U535VETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545CETx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U545CETx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545CETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545CETxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP48</package>
    <!--XMLfilename = STM32U545CETxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545CETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545CEUx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U545CEUx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545CEUxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32U545CEUxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545CEUxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545JEYxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP72</package>
    <!--XMLfilename = STM32U545JEYxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545JEYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545NEYxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP56</package>
    <!--XMLfilename = STM32U545NEYxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545NEYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545REIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U545REIx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545REIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545REIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA64</package>
    <!--XMLfilename = STM32U545REIxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545REIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545RETx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U545RETx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545RETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545RETxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U545RETxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545RETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545VEIx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32U545VEIx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545VEIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545VEIxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA100</package>
    <!--XMLfilename = STM32U545VEIxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545VEIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545VETx</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U545VETx-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545VETx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U545VETxQ</name>
    <status>Active</status>
    <dieId>0455</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U545.svd</name>
          <version>v0r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U545VETxQ-->
    <!--STVPdevicename = STM32U53xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x40000</size>
        <!--end = 0x2003FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U545VETxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595AIHx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA169</package>
    <!--XMLfilename = STM32U595AIHx-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595AIHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595AIHxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA169</package>
    <!--XMLfilename = STM32U595AIHxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595AIHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595AJHx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA169</package>
    <!--XMLfilename = STM32U595AJHx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595AJHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595AJHxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA169</package>
    <!--XMLfilename = STM32U595AJHxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595AJHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595QIIx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U595QIIx-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595QIIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595QIIxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U595QIIxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595QIIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595QJIx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U595QJIx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595QJIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595QJIxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U595QJIxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595QJIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595RITx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U595RITx-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595RITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595RITxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U595RITxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595RITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595RJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U595RJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595RJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595RJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U595RJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595RJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595VITx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U595VITx-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595VITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595VITxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U595VITxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595VJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U595VJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595VJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595VJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U595VJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595VJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595ZITx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U595ZITx-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595ZITx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595ZITxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U595ZITxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595ZIYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP150</package>
    <!--XMLfilename = STM32U595ZIYxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595ZIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U595ZJYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U595.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP150</package>
    <!--XMLfilename = STM32U595ZJYxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U595ZJYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5AJHx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA169</package>
    <!--XMLfilename = STM32U5A5AJHx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5AJHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5AJHxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>TFBGA169</package>
    <!--XMLfilename = STM32U5A5AJHxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5AJHxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5QJIx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U5A5QJIx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5QJIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5QJIxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA132</package>
    <!--XMLfilename = STM32U5A5QJIxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5QJIxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5RJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U5A5RJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5RJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5RJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP64</package>
    <!--XMLfilename = STM32U5A5RJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5RJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5VJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U5A5VJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5VJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5VJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U5A5VJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5VJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A5ZJYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A5.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP150</package>
    <!--XMLfilename = STM32U5A5ZJYxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A5ZJYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599VITxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U599VITxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599VITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599VJTx</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U599VJTx-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599VJTx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599VJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U599VJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599VJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599ZITxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U599ZITxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599ZITxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599ZIYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP150</package>
    <!--XMLfilename = STM32U599ZIYxQ-->
    <!--STVPdevicename = STM32U595xI-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x200000</size>
        <!--end = 0x81FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599ZIYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U599ZJYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U599.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP150</package>
    <!--XMLfilename = STM32U599ZJYxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U599ZJYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A9VJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A9.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP100</package>
    <!--XMLfilename = STM32U5A9VJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A9VJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A9ZJTxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A9.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LQFP144</package>
    <!--XMLfilename = STM32U5A9ZJTxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A9ZJTxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32U5A9ZJYxQ</name>
    <status>Active</status>
    <dieId>0481</dieId>
    <parent>stm32u5</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32U5A9.svd</name>
          <version>v0r2</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP150</package>
    <!--XMLfilename = STM32U5A9ZJYxQ-->
    <!--STVPdevicename = STM32U595xJ-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x270000</size>
        <!--end = 0x2026FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x400000</size>
        <!--end = 0x83FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32U5A9ZJYxQ</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB10CCUx</name>
    <status>Active</status>
    <dieId>0494</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB10_CM4.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB10CCUx-->
    <!--STVPdevicename = STM32WB15xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x50000</size>
        <!--end = 0x804FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB10CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB30CEUxA</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB30_CM4.svd</name>
          <version>v1r6</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB30CEUxA-->
    <!--STVPdevicename = STM32WB3xxExxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB30CEUxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB50CGUx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB50_CM4.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB50CGUx-->
    <!--STVPdevicename = STM32WB50xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB50CGUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB15CCUx</name>
    <status>Active</status>
    <dieId>0494</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB15_CM4.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB15CCUx-->
    <!--STVPdevicename = STM32WB15xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x50000</size>
        <!--end = 0x804FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB15CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB15CCUxE</name>
    <status>Active</status>
    <dieId>0494</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB15_CM4.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB15CCUxE-->
    <!--STVPdevicename = STM32WB15xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x50000</size>
        <!--end = 0x804FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB15CCUxE</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB15CCYx</name>
    <status>Active</status>
    <dieId>0494</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB15_CM4.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP49</package>
    <!--XMLfilename = STM32WB15CCYx-->
    <!--STVPdevicename = STM32WB15xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x50000</size>
        <!--end = 0x804FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB15CCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB35CCUxA</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB35_CM4.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB35C(C-E)UxA-->
    <!--STVPdevicename = STM32WB3xxCxxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB35CCUxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB35CEUxA</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB35_CM4.svd</name>
          <version>v1r5</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB35C(C-E)UxA-->
    <!--STVPdevicename = STM32WB3xxExxA-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB35CEUxA</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55CCUx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB55CCUx-->
    <!--STVPdevicename = STM32WB5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55CEUx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB55CEUx-->
    <!--STVPdevicename = STM32WB5xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55CGUx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WB55CGUx-->
    <!--STVPdevicename = STM32WB55xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55CGUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55RCVx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32WB55RCVx-->
    <!--STVPdevicename = STM32WB5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55RCVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55REVx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32WB55REVx-->
    <!--STVPdevicename = STM32WB5xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55REVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55RGVx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>VFQFPN68</package>
    <!--XMLfilename = STM32WB55RGVx-->
    <!--STVPdevicename = STM32WB55xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55RGVx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VCQx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA129</package>
    <!--XMLfilename = STM32WB55VCQx-->
    <!--STVPdevicename = STM32WB5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VCQx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VCYx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32WB55VCYx-->
    <!--STVPdevicename = STM32WB5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VCYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VEQx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA129</package>
    <!--XMLfilename = STM32WB55VEQx-->
    <!--STVPdevicename = STM32WB5xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VEQx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VEYx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32WB55VEYx-->
    <!--STVPdevicename = STM32WB5xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VEYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VGQx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA129</package>
    <!--XMLfilename = STM32WB55VGQx-->
    <!--STVPdevicename = STM32WB55xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VGQx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VGYx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32WB55VGYx-->
    <!--STVPdevicename = STM32WB55xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VGYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB55VYYx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>WLCSP100</package>
    <!--XMLfilename = STM32WB55VYYx-->
    <!--STVPdevicename = STM32WB55VYY-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0xA0000</size>
        <!--end = 0x809FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB55VYYx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB1MMCHx</name>
    <status>Active</status>
    <dieId>0494</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB15_CM4.svd</name>
          <version>v1r3</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LGA77</package>
    <!--XMLfilename = STM32WB1MMCHx-->
    <!--STVPdevicename = STM32WB15xC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x3000</size>
        <!--end = 0x20002FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x50000</size>
        <!--end = 0x804FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB1MMCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WB5MMGHx</name>
    <status>Active</status>
    <dieId>0495</dieId>
    <parent>stm32wb</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WB55_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>fpv4-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LGA86</package>
    <!--XMLfilename = STM32WB5MMGHx-->
    <!--STVPdevicename = STM32WB55xG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x30000</size>
        <!--end = 0x2002FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WB5MMGHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WBA52CEUx</name>
    <status>Active</status>
    <dieId>0492</dieId>
    <parent>stm32wba</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WBA52.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WBA52CEUx-->
    <!--STVPdevicename = STM32WBA5xxE-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x18000</size>
        <!--end = 0x20017FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x80000</size>
        <!--end = 0x807FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WBA52CEUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WBA52CGUx</name>
    <status>Active</status>
    <dieId>0492</dieId>
    <parent>stm32wba</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WBA52.svd</name>
          <version>v0r1</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m33</type>
            <fpu>fpv5-sp-d16</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WBA52CGUx-->
    <!--STVPdevicename = STM32WBA5xxG-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <alias id="secure">0x30000000</alias>
        <size>0x20000</size>
        <!--end = 0x2001FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <alias id="secure">0xC000000</alias>
        <size>0x100000</size>
        <!--end = 0x80FFFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WBA52CGUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WL54CCUx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wldual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WL5x_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32WL5x_CM0P.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WL54CCUx-->
    <!--STVPdevicename = STM32WL5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WL54CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WL54JCIx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wldual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WL5x_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32WL5x_CM0P.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WL54JCIx-->
    <!--STVPdevicename = STM32WL5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WL54JCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WL55CCUx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wldual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WL5x_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32WL5x_CM0P.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WL55CCUx-->
    <!--STVPdevicename = STM32WL5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WL55CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WL55JCIx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wldual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WL5x_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32WL5x_CM0P.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WL55JCIx-->
    <!--STVPdevicename = STM32WL5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WL55JCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WL5MOCHx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wldual</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WL5x_CM4.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
      <cpu>
        <id>1</id>
        <svd>
          <name>STM32WL5x_CM0P.svd</name>
          <version>v1r9</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>1</apnum>
            <type>arm cortex-m0+</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>LGA92</package>
    <!--XMLfilename = STM32WL5MOCHx-->
    <!--STVPdevicename = STM32WL5xxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WL5MOCHx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE4C8Ux</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WLE4C8Ux-->
    <!--STVPdevicename = STM32WLExx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE4C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE4CBUx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WLE4CBUx-->
    <!--STVPdevicename = STM32WLExxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE4CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE4CCUx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WLE4CCUx-->
    <!--STVPdevicename = STM32WLExxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE4CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE4J8Ix</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WLE4J8Ix-->
    <!--STVPdevicename = STM32WLExx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE4J8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE4JBIx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WLE4JBIx-->
    <!--STVPdevicename = STM32WLExxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE4JBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE4JCIx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WLE4JCIx-->
    <!--STVPdevicename = STM32WLExxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE4JCIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE5C8Ux</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WLE5C8Ux-->
    <!--STVPdevicename = STM32WLExx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE5C8Ux</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE5CBUx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WLE5CBUx-->
    <!--STVPdevicename = STM32WLExxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE5CBUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE5CCUx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFQFPN48</package>
    <!--XMLfilename = STM32WLE5CCUx-->
    <!--STVPdevicename = STM32WLExxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE5CCUx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE5J8Ix</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WLE5J8Ix-->
    <!--STVPdevicename = STM32WLExx8-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x5000</size>
        <!--end = 0x20004FFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x10000</size>
        <!--end = 0x800FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE5J8Ix</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE5JBIx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WLE5JBIx-->
    <!--STVPdevicename = STM32WLExxB-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0xC000</size>
        <!--end = 0x2000BFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x20000</size>
        <!--end = 0x801FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE5JBIx</CDefine>
    </CDefines>
  </mcu>
  <mcu>
    <name>STM32WLE5JCIx</name>
    <status>Active</status>
    <dieId>0497</dieId>
    <parent>stm32wlsingle</parent>
    <cpus>
      <cpu>
        <id>0</id>
        <svd>
          <name>STM32WLE5_CM4.svd</name>
          <version>v1r4</version>
          <url></url>
        </svd>
        <cores>
          <core>
            <id>0</id>
            <apnum>0</apnum>
            <type>arm cortex-m4</type>
            <fpu>None</fpu>
          </core>
        </cores>
      </cpu>
    </cpus>
    <package>UFBGA73</package>
    <!--XMLfilename = STM32WLE5JCIx-->
    <!--STVPdevicename = STM32WLExxC-->
    <memories>
      <memory>
        <type>RAM</type>
        <name>RAM</name>
        <address>0x20000000</address>
        <size>0x10000</size>
        <!--end = 0x2000FFFF-->
      </memory>
      <memory>
        <type>ROM</type>
        <name>FLASH</name>
        <address>0x8000000</address>
        <size>0x40000</size>
        <!--end = 0x803FFFF-->
      </memory>
    </memories>
    <CDefines>
      <CDefine>-DSTM32WLE5JCIx</CDefine>
    </CDefines>
  </mcu>
  <serie>
    <name>stm32</name>
    <status>Active</status>
    <CDefines>
      <CDefine>-DSTM32</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32f0</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32F0</CDefine>
    </CDefines>
    <dbgIF>SWD</dbgIF>
  </serie>
  <serie>
    <name>stm32f1</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32F1</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32f2</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32F2</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32f3</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32F3</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32f4</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32F4</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32f7</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32F7</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32h7</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32H7</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32h7single</name>
    <status>Active</status>
    <parent>stm32h7</parent>
    <CDefines>
      <CDefine>-DSTM32H7SINGLE</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32h7dual</name>
    <status>Active</status>
    <parent>stm32h7</parent>
    <CDefines>
      <CDefine>-DSTM32H7DUAL</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32g0</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32G0</CDefine>
    </CDefines>
    <dbgIF>SWD</dbgIF>
  </serie>
  <serie>
    <name>stm32g4</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32G4</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32l0</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32L0</CDefine>
    </CDefines>
    <dbgIF>SWD</dbgIF>
  </serie>
  <serie>
    <name>stm32l1</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32L1</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32l4</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32L4</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32l4plus</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32L4PLUS</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32wb</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32WB</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32wl</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32WL</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32wlsingle</name>
    <status>Active</status>
    <parent>stm32wl</parent>
    <CDefines>
      <CDefine>-DSTM32WLSINGLE</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32wldual</name>
    <status>Active</status>
    <parent>stm32wl</parent>
    <CDefines>
      <CDefine>-DSTM32WLDUAL</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32l5</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32L5</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32u5</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32U5</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32c0</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32C0</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32h5</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32H5</CDefine>
    </CDefines>
  </serie>
  <serie>
    <name>stm32wba</name>
    <status>Active</status>
    <parent>stm32</parent>
    <CDefines>
      <CDefine>-DSTM32WBA</CDefine>
    </CDefines>
  </serie>
</targetDefinitions>
