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Initial bootloader implementation

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Took a publicly available XMODEM bootloader and made it work on HK32F.

Known issues:
- Erase is super slow on this MCU. The upload routine erases all flash before loading, which means the first packet seems to hang. This also erases possibly persistent data stored in unused pages on flash.
This commit is contained in:
true
2023-06-25 01:41:36 -07:00
parent 861caf8bce
commit a47cfa7fa5
83 changed files with 39624 additions and 0 deletions
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1084
bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_adc.c Normal file
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105
bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_awu.c Normal file
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/**
******************************************************************************
* @file hk32f030m_awu.c
* @author Rakan.z
* @version V1.0
* @brief This file contains all the functions for the AWU peripheral.
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_awu.h"
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup AWU_Public_Functions
* @{
*/
/**
* @brief Deinitializes the AWU peripheral registers to their default reset
* values.
* @param None
* @retval None
*/
void AWU_DeInit(void)
{
AWU->CR = AWU_CR_RESET_VALUE;
AWU->SR = AWU_SR_RESET_VALUE;
}
/**
* @brief config the AWU clock
* @param eAWU_CLK :
* AWU_CLK_LSI128
AWU_CLK_HSE
* @retval None
* @par Required preconditions:
* The LS RC calibration must be performed before calling this function.
*/
void AWU_CLKConfig(AWU_CLK_TYPE eAWU_CLK)
{
uint32_t temp = 0;
/* Check parameter */
assert_param(IS_AWU_CLK(eAWU_CLK));
temp = AWU->CR;
/*clear Bit AWU_CKSEL*/
temp &= 0xFFFFFFFE;
/* config AWU timer clk*/
temp |= eAWU_CLK;
/*set the register*/
AWU->CR |= temp;
}
/**
* @brief loade the AWU timer counter,This load value will be automatically loaded into the 22-bit timer inside the awu
* when the mcu enters stop mode and start timing.
* @param TimerCounter : the AWU timer counter
* @note When awu_rlr [22:1] is '0' or is '1' , the loading behavior will not occur and awu will not start working .
* when awu_wbusy =1 ,the write operation on the awu-rlr register will be invalid.
* @return ErrorStatus: the AWU result
* SUCCESS:AWU timer start success
* ERROR<4F><52>AWU timer start error
*/
ErrorStatus AWU_TimerCounterAndStart(uint32_t TimerCounter)
{
uint32_t temp = 0;
uint32_t TimeoutCnt = 0;
while (TimeoutCnt ++ <= 0x0fff)
{
// AWU_APB bus is idle
if ((AWU->CR & 0x80000000) == 0x00000000)
{
temp = AWU->CR;
temp &= 0xFF800001;
temp |= ( TimerCounter << 1);
AWU->CR |= temp;
return SUCCESS;
}
else
{
/* when awu_wbusy =1 ,the write operation on the awu-rlr register will be invalid.*/
}
}
return ERROR;
}
/**
* @brief Returns status of the AWU peripheral flag.
* @param None
* @retval FlagStatus : Status of the AWU flag.
* This parameter can be any of the @ref FlagStatus enumeration.
*/
FlagStatus AWU_GetFlagStatus(void)
{
return((FlagStatus)(((uint8_t)(AWU->SR & AWU_SR_BUSY) == (uint8_t)0x00) ? RESET : SET));
}
/**
* @}
*/

226
bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_beep.c Normal file
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/**
******************************************************************************
* @file hk32f030m_beep.c
* @version V1.0.1
* author Rakan.Z/wing.Wang
* @date 2019-12-15
******************************************************************************
*/
#include "hk32f030m_beep.h"
#include "hk32f030m.h"
/**
* @brief Initialize the beeper peripheral register to the default
* value reset value
* @param None
* @retval None
*/
void BEEP_DeInit(void)
{
/*BEEP clock:LSI,BEEP_Prescaler:64,BEEP_TRGO_Prescaler:64*/
BEEP->CFGR = BEEP_CFGR_Value;
/*BEEP:ENABLE,TRGO:ENABLE*/
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR |= BEEP_CR_Value;
}
/**
* @brief Initialize the BEEP peripheral register
* @param BEEP_InitStruct:pointer to a BEEP_InitTypeDef structure which will be initialized.
* @retval None
*/
void BEEP_Init(BEEP_InitTypeDef *BEEP_InitStruct)
{
assert_param(IS_BEEP_CLOCK(BEEP_InitStruct->BEEP_Clock));
assert_param(IS_BEEP_TRGO_PRESCALER(BEEP_InitStruct->BEEP_TRGOPrescaler));
assert_param(IS_BEEP_PRESCALER(BEEP_InitStruct->BEEP_Prescaler));
assert_param(IS_FUNCTIONAL_STATE(BEEP_InitStruct->BEEP_TRGOCmd));
uint32_t temp=0;
/*Set the BEEP clock*/
if(BEEP_InitStruct->BEEP_Clock == BEEP_CLOCK_HSE)
{
BEEP->CFGR |= BEEP_CLOCK_HSE;
}
else
{
BEEP->CFGR &= ~(BEEP_CLOCK_HSE);
}
/*Clear [2:1]bits*/
temp = BEEP->CFGR;
temp &= BEEP_CR_BEEP_Mask;
/*Set the frequency division coefficient*/
temp |= BEEP_InitStruct->BEEP_Prescaler;
/*To transfer a value into a register*/
BEEP->CFGR = temp;
/*Clear [4:3]bits*/
temp &= BEEP_CR_TRGO_Mask;
/*Set the frequency division coefficient*/
temp |= BEEP_InitStruct->BEEP_TRGOPrescaler;
/*To transfer a value into a register*/
BEEP->CFGR = temp;
/*Enable or disable TRGO*/
if(BEEP_InitStruct->BEEP_TRGOCmd)
{
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR |= BEEP_CR_TRGO;
}
else
{
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR &= (uint32_t)~((uint32_t)BEEP_CR_TRGO);
}
}
/**
* @brief Enables or disables the specified BEEP peripheral.
* @param NewState:new state of the BEEP peripheral.
* @retval None
*/
void BEEP_Cmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState != DISABLE)
{
/*Enable BEEP*/
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR |= BEEP_CR_EN;
}
else
{
/*Disable BEEP*/
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR &= (uint32_t)~((uint32_t)BEEP_CR_EN);
}
}
/**
* @brief Select the BEEP clock.
* @param BEEP_CLOCK: Clock source selection.
* This parameter can be one of the following values:
* @arg BEEP_CLOCK_HSE
* @arg BEEP_CLOCK_LSI
* @retval None
*/
void BEEP_ClockSelect(uint8_t BEEP_CLOCK)
{
assert_param(IS_BEEP_CLOCK(BEEP_CLOCK));
if(BEEP_CLOCK_HSE == BEEP_CLOCK)
{
/*Set HSE as the clock source*/
BEEP->CFGR |= BEEP_CLOCK_HSE;
}
else
{
/*Set LSI as the clock source*/
BEEP->CFGR &= ~(BEEP_CLOCK_HSE);
}
}
/**
* @brief Set the BEEP frequency division coefficient.
* @param BEEP_Prescaler: frequency division coefficient selection.
* This parameter can be one of the following values:
* @arg BEEP_Prescaler_16
* @arg BEEP_Prescaler_32
* @arg BEEP_Prescaler_64
* @arg BEEP_Prescaler_128
* @retval None
*/
void BEEP_SetPrescaler(uint8_t BEEP_Prescaler)
{
uint32_t temp = 0;
assert_param(IS_BEEP_PRESCALER(BEEP_Prescaler));
/*Clear [2:1]bits*/
temp = BEEP->CFGR;
temp &= BEEP_CR_BEEP_Mask;
/*Set the frequency division coefficient*/
temp |= BEEP_Prescaler;
/*To transfer a value into a register*/
BEEP->CFGR = temp;
}
/**
* @brief Set the TGRO frequency division coefficient.
* @param BEEP_TGRO_Prescaler: frequency division coefficient selection.
* This parameter can be one of the following values:
* @arg BEEP_TRGO_Prescaler_32
* @arg BEEP_TRGO_Prescaler_64
* @arg BEEP_TRGO_Prescaler_128
* @retval None
*/
void BEEP_SetTRGOPrescaler(uint8_t BEEP_TRGO_Prescaler)
{
uint32_t temp=0;
assert_param(IS_BEEP_TRGO_PRESCALER(BEEP_TRGO_Prescaler));
/*Clear [4:3]bits*/
temp = BEEP->CFGR;
temp &= BEEP_CR_TRGO_Mask;
/*Set the frequency division coefficient*/
temp |= BEEP_TRGO_Prescaler;
/*To transfer a value into a register*/
BEEP->CFGR = temp;
}
/**
* @brief Read BEEP register status.
* @param None
* @retval register status
*/
FlagStatus BEEP_ReadBeepStatus(void)
{
if((BEEP->CR & (BEEP_BUSY_FLAG)) == BEEP_BUSY_FLAG)
{
return SET;
}
else
{
return RESET;
}
}
/**
* @brief Enables or disables the TRGO function.
* @param NewState:new state of the BEEP peripheral.
* @retval None
*/
void BEEP_TRGOCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState)
{
/*Enable TRGO*/
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR |= (uint32_t)BEEP_CR_TRGO;
}
else
{
/*Disable TRGO*/
while(BEEP->CR & BEEP_BUSY_FLAG);
BEEP->CR &= (uint32_t)~((uint32_t)BEEP_CR_TRGO);
}
}

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bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_crc.c Normal file
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/**
******************************************************************************
* @file hk32f030m_crc.c
* @author Rakan.Z/Thomas.W
* @version V1.0
* @brief API file of CRC module
* @changelist
******************************************************************************
*/
/**
===============================================================================
##### How to use this driver #####
===============================================================================
[..]
(+) Enable CRC AHB clock using RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE)
function
(+) If required, select the reverse operation on input data
using CRC_ReverseInputDataSelect()
(+) If required, enable the reverse operation on output data
using CRC_ReverseOutputDataCmd(Enable)
(+) use CRC_CalcCRC() function to compute the CRC of a 32-bit data
or use CRC_CalcBlockCRC() function to compute the CRC if a 32-bit
data buffer
(@) To compute the CRC of a new data use CRC_ResetDR() to reset
the CRC computation unit before starting the computation
otherwise you can get wrong CRC values.
@endverbatim
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_crc.h"
/**
* @brief Deinitializes CRC peripheral registers to their default reset values.
* @param None
* @retval None
*/
void CRC_DeInit(void)
{
/* Set DR register to reset value */
CRC->DR = 0xFFFFFFFF;
/* Reset IDR register */
CRC->IDR = 0x00;
/* Set INIT register to reset value */
CRC->INIT = 0xFFFFFFFF;
/* Reset the CRC calculation unit */
CRC->CR = CRC_CR_RESET;
}
/**
* @brief Resets the CRC calculation unit and sets INIT register content in DR register.
* @param None
* @retval None
*/
void CRC_ResetDR(void)
{
/* Reset CRC generator */
CRC->CR |= CRC_CR_RESET;
}
/**
* @brief Selects the reverse operation to be performed on input data.
* @param CRC_ReverseInputData: Specifies the reverse operation on input data.
* This parameter can be:
* @arg CRC_ReverseInputData_No: No reverse operation is performed
* @arg CRC_ReverseInputData_8bits: reverse operation performed on 8 bits
* @arg CRC_ReverseInputData_16bits: reverse operation performed on 16 bits
* @arg CRC_ReverseInputData_32bits: reverse operation performed on 32 bits
* @retval None
*/
void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData)
{
uint32_t tmpcr = 0;
/* Check the parameter */
assert_param(IS_CRC_REVERSE_INPUT_DATA(CRC_ReverseInputData));
/* Get CR register value */
tmpcr = CRC->CR;
/* Reset REV_IN bits */
tmpcr &= (uint32_t)~((uint32_t)CRC_CR_REV_IN);
/* Set the reverse operation */
tmpcr |= (uint32_t)CRC_ReverseInputData;
/* Write to CR register */
CRC->CR = (uint32_t)tmpcr;
}
/**
* @brief Enables or disable the reverse operation on output data.
* The reverse operation on output data is performed on 32-bit.
* @param NewState: new state of the reverse operation on output data.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void CRC_ReverseOutputDataCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable reverse operation on output data */
CRC->CR |= CRC_CR_REV_OUT;
}
else
{
/* Disable reverse operation on output data */
CRC->CR &= (uint32_t)~((uint32_t)CRC_CR_REV_OUT);
}
}
/**
* @brief Initializes the INIT register.
* @note After resetting CRC calculation unit, CRC_InitValue is stored in DR register
* @param CRC_InitValue: Programmable initial CRC value
* @retval None
*/
void CRC_SetInitRegister(uint32_t CRC_InitValue)
{
CRC->INIT = CRC_InitValue;
}
/**
* @brief Computes the 32-bit CRC of a given data word(32-bit).
* @param CRC_Data: data word(32-bit) to compute its CRC
* @retval 32-bit CRC
*/
uint32_t CRC_CalcCRC(uint32_t CRC_Data)
{
CRC->DR = CRC_Data;
return (CRC->DR);
}
/**
* @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
* @param pBuffer: pointer to the buffer containing the data to be computed
* @param BufferLength: length of the buffer to be computed
* @retval 32-bit CRC
*/
uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
{
uint32_t index = 0;
for(index = 0; index < BufferLength; index++)
{
CRC->DR = pBuffer[index];
}
return (CRC->DR);
}
/**
* @brief Returns the current CRC value.
* @param None
* @retval 32-bit CRC
*/
uint32_t CRC_GetCRC(void)
{
return (CRC->DR);
}
/**
* @brief Stores an 8-bit data in the Independent Data(ID) register.
* @param CRC_IDValue: 8-bit value to be stored in the ID register
* @retval None
*/
void CRC_SetIDRegister(uint8_t CRC_IDValue)
{
CRC->IDR = CRC_IDValue;
}
/**
* @brief Returns the 8-bit data stored in the Independent Data(ID) register
* @param None
* @retval 8-bit value of the ID register
*/
uint8_t CRC_GetIDRegister(void)
{
return (CRC->IDR);
}

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bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_dbgmcu.c Normal file
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/**
******************************************************************************
* @file hk32f030m_dbgmcu.c
* @author Felix.z
* @version V1.0
* @brief API file of DBGMCU module
* @changelist
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_dbgmcu.h"
#define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
/**
* @brief Returns the device revision identifier.
* @param None
* @retval Device revision identifier
*/
uint32_t DBGMCU_GetREVID(void)
{
return(DBGMCU->IDCODE >> 16);
}
/**
* @brief Returns the device identifier.
* @param None
* @retval Device identifier
*/
uint32_t DBGMCU_GetDEVID(void)
{
return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
}
/**
* @brief Configures low power mode behavior when the MCU is in Debug mode.
* @param DBGMCU_Periph: specifies the low power mode.
* This parameter can be any combination of the following values:
* @arg DBGMCU_STOP: Keep debugger connection during STOP mode
* @param NewState: new state of the specified low power mode in Debug mode.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
DBGMCU->CR |= DBGMCU_Periph;
}
else
{
DBGMCU->CR &= ~DBGMCU_Periph;
}
}
/**
* @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
* @param DBGMCU_Periph: specifies the APB1 peripheral.
* This parameter can be any combination of the following values:
* @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
* @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
* @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
* @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
* @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
* @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped
* when Core is halted
* @param NewState: new state of the specified APB1 peripheral in Debug mode.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
DBGMCU->APB1FZ |= DBGMCU_Periph;
}
else
{
DBGMCU->APB1FZ &= ~DBGMCU_Periph;
}
}

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bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_exti.c Normal file
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/**
******************************************************************************
* @file hk32f030m_exti.c
* @author Rakan.z
* @version V1.0
* @brief API file of BKP module,This file provides all the EXTI firmware functions
* @changelist
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_exti.h"
/** EXTI_Private_Defines */
#define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */
/**
* @brief Deinitializes the EXTI peripheral registers to their default reset values.
* @param None
* @retval None
*/
void EXTI_DeInit(void)
{
EXTI->IMR = 0x00000000;
EXTI->EMR = 0x00000000;
EXTI->RTSR = 0x00000000;
EXTI->FTSR = 0x00000000;
EXTI->PR = 0xFFFFFFFF;
}
/**
* @brief Initializes the EXTI peripheral according to the specified
* parameters in the EXTI_InitStruct.
* @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
* that contains the configuration information for the EXTI peripheral.
* @retval None
*/
void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
{
uint32_t tmp = 0;
/* Check the parameters */
assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
tmp = (uint32_t)EXTI_BASE;
if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
{
/* Clear EXTI line configuration */
EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
tmp += EXTI_InitStruct->EXTI_Mode;
*(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
/* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
/* Select the trigger for the selected external interrupts */
if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
{
/* Rising Falling edge */
EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
}
else
{
tmp = (uint32_t)EXTI_BASE;
tmp += EXTI_InitStruct->EXTI_Trigger;
*(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
}
}
else
{
tmp += EXTI_InitStruct->EXTI_Mode;
/* Disable the selected external lines */
*(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
}
}
/**
* @brief Fills each EXTI_InitStruct member with its reset value.
* @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
* be initialized.
* @retval None
*/
void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
{
EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStruct->EXTI_LineCmd = DISABLE;
}
/**
* @brief Generates a Software interrupt.
* @param EXTI_Line: specifies the EXTI lines to be enabled or disabled.
* This parameter can be any combination of EXTI_Linex where x can be (0..11).
* @retval None
*/
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->SWIER |= EXTI_Line;
}
/**
* @brief Checks whether the specified EXTI line flag is set or not.
* @param EXTI_Line: specifies the EXTI line flag to check.
* This parameter can be:
* @arg EXTI_Linex: External interrupt line x where x(0..11)
* @retval The new state of EXTI_Line (SET or RESET).
*/
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/**
* @brief Checks whether the specified EXTI line is asserted or not.
* @param EXTI_Line: specifies the EXTI line to check.
* This parameter can be:
* @arg EXTI_Linex: External interrupt line x where x(0..11)
* @retval The new state of EXTI_Line (SET or RESET).
*/
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
{
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
/* Check the parameters */
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
enablestatus = EXTI->IMR & EXTI_Line;
if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/**
* @brief Clears the EXTI's line Flag.
* @param EXTI_Line: specifies the EXTI lines to clear.
* This parameter can be any combination of EXTI_Linex where x can be (0..11).
* @retval None
*/
void EXTI_ClearFlag(uint32_t EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->PR = EXTI_Line;
}
/*
* @brief Clears the EXTI's line pending bits.
* @param EXTI_Line: specifies the EXTI lines to clear.
* This parameter can be any combination of EXTI_Linex where x can be (0..11).
* @retval None
*/
void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->PR = EXTI_Line;
}

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bootloader_hk32f030m_uart_xmodem/driver/HK32F030M_Driver/src/hk32f030m_flash.c Normal file
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/**
******************************************************************************
* @file hk32f030m_gpio.c
* @author Rakan.z
* @version V1.0
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_gpio.h"
#include "hk32f030m_rcc.h"
/** @defgroup GPIO
* @brief GPIO driver modules
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup GPIO_Private_Functions
* @{
*/
/** @defgroup GPIO_Group1 Initialization and Configuration
* @brief Initialization and Configuration
*
@verbatim
===============================================================================
##### Initialization and Configuration #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Deinitializes the GPIOx peripheral registers to their default reset
* values.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @retval None
*/
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
if(GPIOx == GPIOA)
{
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOA, ENABLE);
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOA, DISABLE);
}
else if(GPIOx == GPIOB)
{
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOB, ENABLE);
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOB, DISABLE);
}
else if(GPIOx == GPIOC)
{
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOC, ENABLE);
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOC, DISABLE);
}
else
{
if(GPIOx == GPIOD)
{
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOD, ENABLE);
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOD, DISABLE);
}
}
}
/**
* @brief Initializes the GPIOx peripheral according to the specified
* parameters in the GPIO_InitStruct.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
{
uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
/*-------------------------- Configure the port pins -----------------------*/
/*-- GPIO Mode Configuration --*/
for (pinpos = 0x00; pinpos < 0x10; pinpos++)
{
pos = ((uint32_t)0x01) << pinpos;
/* Get the port pins position */
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
if (currentpin == pos)
{
if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
{
/* Check Speed mode parameters */
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
/* Speed mode configuration */
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEEDR0 << (pinpos * 2));
GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
/* Check Output mode parameters */
assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
/* Output mode configuration */
GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos));
GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
}
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
/* Pull-up Pull down resistor configuration */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
}
}
/* config schmit*/
if (GPIO_InitStruct->GPIO_Schmit == GPIO_Schmit_Disable)
{
GPIOx->IOSR |= (GPIO_InitStruct->GPIO_Pin);
}
else
{
GPIOx->IOSR &= ~(GPIO_InitStruct->GPIO_Pin);
}
}
/**
* @brief Fills each GPIO_InitStruct member with its default value.
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure which will
* be initialized.
* @retval None
*/
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
{
/* Reset GPIO init structure parameters values */
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_Level_2;
GPIO_InitStruct->GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL;
}
/**
* @brief Locks GPIO Pins configuration registers.
* @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
* GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
* @note The configuration of the locked GPIO pins can no longer be modified
* until the next device reset.
* @param GPIOx: where x can be (A or B) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* @retval None
*/
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
__IO uint32_t tmp = 0x00010000;
/* Check the parameters */
assert_param(IS_GPIO_LIST_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
tmp |= GPIO_Pin;
/* Set LCKK bit */
GPIOx->LCKR = tmp;
/* Reset LCKK bit */
GPIOx->LCKR = GPIO_Pin;
/* Set LCKK bit */
GPIOx->LCKR = tmp;
/* Read LCKK bit */
tmp = GPIOx->LCKR;
/* Read LCKK bit */
tmp = GPIOx->LCKR;
}
/**
* @}
*/
/** @defgroup GPIO_Group2 GPIO Read and Write
* @brief GPIO Read and Write
*
@verbatim
===============================================================================
##### GPIO Read and Write #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Reads the specified input port pin bit.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to read.
* @note This parameter can be GPIO_Pin_x where x can be:
* (0..15) for GPIOA, GPIOB, GPIOC, for GPIOD
* @retval The input port pin value.
*/
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
uint8_t bitstatus = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
else
{
bitstatus = (uint8_t)Bit_RESET;
}
return bitstatus;
}
/**
* @brief Reads the specified input port pin.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @retval The input port pin value.
*/
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
return ((uint16_t)GPIOx->IDR);
}
/**
* @brief Reads the specified output data port bit.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_Pin: Specifies the port bit to read.
* @note This parameter can be GPIO_Pin_x where x can be:
* (0..15) for GPIOA, GPIOB, GPIOC, for GPIOD
* @retval The output port pin value.
*/
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
uint8_t bitstatus = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
else
{
bitstatus = (uint8_t)Bit_RESET;
}
return bitstatus;
}
/**
* @brief Reads the specified GPIO output data port.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @retval GPIO output data port value.
*/
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
return ((uint16_t)GPIOx->ODR);
}
/**
* @brief Sets the selected data port bits.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bits to be written.
* @note This parameter can be GPIO_Pin_x where x can be:
* (0..15) for GPIOA, GPIOB, GPIOC, for GPIOD
* @retval None
*/
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
GPIOx->BSRR = GPIO_Pin;
}
/**
* @brief Clears the selected data port bits.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bits to be written.
* @note This parameter can be GPIO_Pin_x where x can be:
* (0..15) for GPIOA, GPIOB, GPIOC, for GPIOD
* @retval None
*/
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
GPIOx->BRR = GPIO_Pin;
}
/**
* @brief Writes the selected data port bit.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to be written.
* @param BitVal: specifies the value to be written to the selected bit.
* This parameter can be one of the BitAction enumeration values:
* @arg Bit_RESET: to clear the port pin
* @arg Bit_SET: to set the port pin
* @note This parameter can be GPIO_Pin_x where x can be:
* (0..15) for GPIOA, GPIOB, GPIOC, for GPIOD
* @retval None
*/
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_BIT_ACTION(BitVal));
if (BitVal != Bit_RESET)
{
GPIOx->BSRR = GPIO_Pin;
}
else
{
GPIOx->BRR = GPIO_Pin ;
}
}
/**
* @brief Writes data to the specified GPIO data port.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param PortVal: specifies the value to be written to the port output data register.
* @retval None
*/
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
GPIOx->ODR = PortVal;
}
/**
* @brief Toggle the GPIO port.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_Pin: sGPIO_pins_define
* GPIO_Pin_0
* GPIO_Pin_1
* GPIO_Pin_2
* GPIO_Pin_3
* GPIO_Pin_4
* GPIO_Pin_5
* GPIO_Pin_6
* GPIO_Pin_7
* GPIO_Pin_8
* GPIO_Pin_9
* GPIO_Pin_10
* GPIO_Pin_11
* GPIO_Pin_12
* GPIO_Pin_13
* GPIO_Pin_14
* GPIO_Pin_15
* @retval None
*/
void GPIO_Toggle(GPIO_TypeDef* GPIOx , uint16_t GPIO_Pin)
{
GPIOx->ODR ^= GPIO_Pin;
}
/** @defgroup GPIO_Group3 GPIO Alternate functions configuration functions
* @brief GPIO Alternate functions configuration functions
*
@verbatim
===============================================================================
##### GPIO Alternate functions configuration functions #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief selects the pin to used as Alternate function.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_PinSource: specifies the pin for the Alternate function.
* This parameter can be GPIO_PinSourcex where x can be (0..15) for GPIOA, GPIOB,GPIOB, GPIOD
* @param GPIO_AF: selects the pin to used as Alternate function.
* This parameter can be one of the following value:
* @arg GPIO_AF_0: (I2C1_WD)I2C1_SMBA, I2C1_SCL, SWCLK_I2C1_SDA, I2C1_SDA, SWDIO
* @arg GPIO_AF_1: (USART1)USART1_TX, USART1_RX, USART1_CK
* @arg GPIO_AF_2: (SPI)SPI1_SCK, SPI1_NSS, SPI1_MISO, SPI1_NSS, SPI1_MOSI
* @arg GPIO_AF_3: (TIM1)TIM1_BKIN, TIM1_CH1N, TIM1_CH2N, TIM1_CH3N,TIM1_CH3_CH1N,TIM1_CH4_CH2N, TIM1_ETR,TIM1_CH1,TIM1_CH2,TIM1_CH4,
* TIM1_ETR
* @arg GPIO_AF_4: (TIM2)TIM2_CH3, TIM2_ETR, TIM2_CH4, TIM2_CH2, TIM2_CH1
* @arg GPIO_AF_5: (RCC)RCC_MCO
* @arg GPIO_AF_6: (BEEPER)BEEP
* @arg GPIO_AF_7: (ADC1)ADC1_ETR
* @note The pin should already been configured in Alternate Function mode(AF)
* using GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
* @note Refer to the Alternate function mapping table in the device datasheet
* for the detailed mapping of the system and peripherals'alternate
* function I/O pins.
* @retval None
*/
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
{
uint32_t temp = 0x00;
uint32_t temp_2 = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
assert_param(IS_GPIO_AF(GPIO_AF));
temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4));
GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4));
temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp;
GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
}
/**
* @brief selects the IOMUX pin to used as Alternate function.
* @param GPIOx: where x can be (A, B, C, D) to select the GPIO peripheral.
* @param GPIO_PinSource: specifies the pin for the Alternate function.
* This parameter can be GPIO_PinSourcex where x can be (0..15) for GPIOA, GPIOB,GPIOB, GPIOD
* @param IOMUX_AF: selects the pin to used as Alternate function.
* This parameter can be one of the following value:
* GPIOMUX_AF_3_TIM1CH3
GPIOMUX_AF_3_TIM1CH1N
GPIOMUX_AF_3_TIM1CH4
GPIOMUX_AF_3_TIM1CH2N
GPIOMUX_AF0_SWCLK
GPIOMUX_AF0_I2C_SDA
* @retval None
*/
void GPIO_IOMUX_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t IOMUX_AF)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
assert_param(GPIO_IOMUX_AF(IOMUX_AF));
/* IOMUX function*/
// if PB5 as SWCLK
if((GPIOx == GPIOB)&&(GPIO_PinSource == GPIO_PinSource5))
{
if(IOMUX_AF == GPIOMUX_AF0_SWCLK)
{
GPIOMUX->PIN_FUNC_SEL |= IOMUX_PB5_SWCLK;
}
else if(IOMUX_AF == GPIOMUX_AF0_I2C_SDA)
{
GPIOMUX->PIN_FUNC_SEL &= IOMUX_PB5_SWCLK;
}
}
// select PC3 as TIM1 CH3 or CHIN
else if((GPIOx == GPIOC)&&(GPIO_PinSource == GPIO_PinSource3))
{
if(IOMUX_AF == GPIOMUX_AF3_TIM1CH3)
{
GPIOMUX->PIN_FUNC_SEL |= IOMUX_PC3_TIM1CH3;
}
else if(IOMUX_AF == GPIOMUX_AF3_TIM1CH1N)
{
GPIOMUX->PIN_FUNC_SEL &= IOMUX_PC3_TIM1CH1N;
}
}
// select PC4 as TIM1 CH4 or CH2N
else if((GPIOx == GPIOC)&&(GPIO_PinSource == GPIO_PinSource4))
{
if(IOMUX_AF == GPIOMUX_AF3_TIM1CH4)
{
GPIOMUX->PIN_FUNC_SEL |= IOMUX_PC4_TIM1CH4;
}
else if(IOMUX_AF == GPIOMUX_AF3_TIM1CH2N)
{
GPIOMUX->PIN_FUNC_SEL &= IOMUX_PC4_TIM1CH2N;
}
}
}
/**
* @brief change the pin to others IOMUX pin.
* @param eIOMUX_Pinx: where x can be (1 5 6 7 8) to select the GPIO pin.
* @param IOMUX_FuncPin: specifies the pin for the Alternate function.
* This parameter can be :
IOMUX_PD6_SEL_PD6
IOMUX_PD6_SEL_PA1
IOMUX_PD6_SEL_PD4
IOMUX_PD6_SEL_PA2
IOMUX_PB5_SEL_PB5
IOMUX_PB5_SEL_PA3
IOMUX_PB5_SEL_PD2
IOMUX_NRST_SEL_NRST
IOMUX_NRST_SEL_PA0
IOMUX_NRST_SEL_PB4
IOMUX_PC4_SEL_PC4
IOMUX_PC4_SEL_PC5
IOMUX_PC4_SEL_PC3
IOMUX_PC4_SEL_PC7
IOMUX_PD5_SEL_PD5
IOMUX_PD5_SEL_PD3
IOMUX_PD5_SEL_PD1
IOMUX_PD5_SEL_PC6
* @note The IOMUX_FuncPin parameter should from the list of IOMUX_FuncPin
* 1.nrst_pa0_sel can only be powered on reset
* 2. only when nrst_pin_key [15:0] = 0x5ae1 can be written by nrst_pa0_sel
* 3. When the cpu changes the value of pkg_pin_sel.nrstpa0_pin_sel or nrst_pa0_sel, the nrst_pin_key [15:0] is reset by the system hardware.
* @re None
*/
void GPIO_IOMUX_ChangePin(IOMUX_PIN eIOMUX_Pinx, uint32_t IOMUX_FuncPin)
{
/* Check the parameters */
assert_param(IS_IOMUX_PIN(eIOMUX_Pinx));
assert_param(IS_IOMUX_PINFNC(IOMUX_FuncPin));
switch (eIOMUX_Pinx)
{
case IOMUX_PIN1:
#if defined HK32F030MJ4M6 //SOP 8 pin
GPIOMUX->PKG_PIN_SEL &= IOMUX_PD6_SEL_MASK;//clear select bits(7 8)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
#elif defined HK32F030MD4P6 //SOP 16 pin
if((IOMUX_FuncPin == IOMUX_PD6_SEL_PD6)||(IOMUX_FuncPin == IOMUX_PD6_SEL_PD4))
{
GPIOMUX->PKG_PIN_SEL &= IOMUX_PD6_SEL_MASK;//clear select bits(7 8)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
}
#endif
break;
case IOMUX_PIN2://TSSOP16
#if defined (HK32F030MD4P6)
if((IOMUX_FuncPin == IOMUX_NRST_SEL_PA0)||(IOMUX_FuncPin == IOMUX_NRST_SEL_NRST) )
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->PKG_PIN_SEL &= IOMUX_NRST_SEL_MASK;//clear select bits(4 3)
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->PKG_PIN_SEL |= IOMUX_NRST_SEL_PA0;
if(IOMUX_FuncPin == IOMUX_NRST_SEL_PA0)
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->NRST_PA0_SEL |= (uint32_t)(0x00000001);
}
else
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->NRST_PA0_SEL &= (uint32_t)(0x00000000);
}
}
#endif
break;
case IOMUX_PIN5:
#if defined HK32F030MJ4M6
GPIOMUX->PKG_PIN_SEL &= IOMUX_PB5_SEL_MASK;//clear select bits(2 1)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
#endif
break;
case IOMUX_PIN6:
#if defined HK32F030MJ4M6
GPIOMUX->PKG_PIN_SEL &= IOMUX_PC4_SEL_MASK;//clear select bits(4 3 )
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
#endif
break;
case IOMUX_PIN7:
#if defined HK32F030MJ4M6
if((IOMUX_FuncPin == IOMUX_NRST_SEL_PA0)||(IOMUX_FuncPin == IOMUX_NRST_SEL_NRST))
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->PKG_PIN_SEL &= IOMUX_NRST_SEL_MASK;//clear select bits(4 3)
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->PKG_PIN_SEL |= IOMUX_NRST_SEL_PA0;
if(IOMUX_FuncPin == IOMUX_NRST_SEL_PA0)
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->NRST_PA0_SEL |= (uint32_t)(0x00000001);
}
else
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->NRST_PA0_SEL &= (uint32_t)(0x00000000);
}
}
else if(IOMUX_FuncPin == IOMUX_NRST_SEL_PB4)
{
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->PKG_PIN_SEL &= IOMUX_NRST_SEL_MASK;//clear select bits(4 3)
GPIOMUX->NRST_PIN_KEY = NRST_PINKEY;
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
}
#endif
break;
case IOMUX_PIN8:
#if defined HK32F030MJ4M6
GPIOMUX->PKG_PIN_SEL &= IOMUX_PD5_SEL_MASK;//clear select bits (6 5)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
#endif
break;
case IOMUX_PIN9:
#if defined HK32F030MD4P6
if((IOMUX_FuncPin == IOMUX_PB5_SEL_PB5)||(IOMUX_FuncPin == IOMUX_PB5_SEL_PD2))
{
GPIOMUX->PKG_PIN_SEL &= IOMUX_PB5_SEL_MASK;//clear select bits (6 5)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
}
#endif
break;
case IOMUX_PIN11:
#if defined HK32F030MF4P6 || defined HK32F030MF4U6
GPIOMUX->PKG_PIN_SEL &= IOMUX_PB5_SEL_MASK;//clear select bits (6 5)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
#endif
break;
case IOMUX_PIN12:
#if defined HK32F030MD4P6
if((IOMUX_FuncPin == IOMUX_PC4_SEL_PC4)||(IOMUX_FuncPin == IOMUX_PC4_SEL_PC7))
{
GPIOMUX->PKG_PIN_SEL &= IOMUX_PC4_SEL_MASK;//clear select bits (6 5)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
}
#endif
break;
case IOMUX_PIN15:
#if defined HK32F030MD4P6
if((IOMUX_FuncPin == IOMUX_PD5_SEL_PD5)||(IOMUX_FuncPin == IOMUX_PD5_SEL_PD1))
{
GPIOMUX->PKG_PIN_SEL &= IOMUX_PD5_SEL_MASK;//clear select bits (6 5)
GPIOMUX->PKG_PIN_SEL |= IOMUX_FuncPin;
}
#endif
break;
default:
break;
}
}
/**
* @brief IOMUX select tim2 channel 1 input source.
* @param TIM2CN1Source:
* This parameter can be :
* TIM2_CN1_EXTERNAL
TIM2_CN1_HSIDIV
TIM2_CN1_LSI_128
TIM2_CN1_EXTERNAL_MAX
* */
void GPIO_IOMUX_SetTIM2CN1_Source(TIM2_SOURCE TIM2CN1Source)
{
/* Check the parameters */
assert_param(IS_TIM2_SOURCE(TIM2CN1Source));
GPIOMUX->TIM2_CH0_IN_SEL = (uint32_t)TIM2CN1Source;
}
/**
* @}
*/

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/**
******************************************************************************
* @file hk32f030m_iwdg.c
* @version V1.0.1
* author Rakan.Z/wing.Wang
* @date 2019-12-17
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_iwdg.h"
/** @defgroup IWDG
* @brief IWDG driver modules
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ---------------------- IWDG registers bit mask ----------------------------*/
/* KR register bit mask */
#define KR_KEY_RELOAD ((uint16_t)0xAAAA)
#define KR_KEY_ENABLE ((uint16_t)0xCCCC)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup IWDG_Private_Functions
* @{
*/
/** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
* @brief Prescaler and Counter configuration functions
*
@verbatim
==============================================================================
##### Prescaler and Counter configuration functions #####
==============================================================================
@endverbatim
* @{
*/
/**
* @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
* @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
* This parameter can be one of the following values:
* @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
* @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
* @retval None
*/
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
{
/* Check the parameters */
assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
IWDG->KR = IWDG_WriteAccess;
}
/**
* @brief Sets IWDG Prescaler value.
* @param IWDG_Prescaler: specifies the IWDG Prescaler value.
* This parameter can be one of the following values:
* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
* @retval None
*/
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
{
/* Check the parameters */
assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
IWDG->PR = IWDG_Prescaler;
}
/**
* @brief Sets IWDG Reload value.
* @param Reload: specifies the IWDG Reload value.
* This parameter must be a number between 0 and 0x0FFF.
* @retval None
*/
void IWDG_SetReload(uint16_t Reload)
{
/* Check the parameters */
assert_param(IS_IWDG_RELOAD(Reload));
IWDG->RLR = Reload;
}
/**
* @brief Reloads IWDG counter with value defined in the reload register
* (write access to IWDG_PR and IWDG_RLR registers disabled).
* @param None
* @retval None
*/
void IWDG_ReloadCounter(void)
{
IWDG->KR = KR_KEY_RELOAD;
}
/**
* @brief Sets the IWDG window value.
* @param WindowValue: specifies the window value to be compared to the downcounter.
* @retval None
*/
void IWDG_SetWindowValue(uint16_t WindowValue)
{
/* Check the parameters */
assert_param(IS_IWDG_WINDOW_VALUE(WindowValue));
IWDG->WINR = WindowValue;
}
/**
* @}
*/
/** @defgroup IWDG_Group2 IWDG activation function
* @brief IWDG activation function
*
@verbatim
==============================================================================
##### IWDG activation function #####
==============================================================================
@endverbatim
* @{
*/
/**
* @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
* @param None
* @retval None
*/
void IWDG_Enable(void)
{
IWDG->KR = KR_KEY_ENABLE;
}
/**
* @}
*/
/** @defgroup IWDG_Group3 Flag management function
* @brief Flag management function
*
@verbatim
===============================================================================
##### Flag management function #####
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Checks whether the specified IWDG flag is set or not.
* @param IWDG_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
* @arg IWDG_FLAG_RVU: Reload Value Update on going
* @arg IWDG_FLAG_WVU: Counter Window Value Update on going
* @retval The new state of IWDG_FLAG (SET or RESET).
*/
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_IWDG_FLAG(IWDG_FLAG));
if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return bitstatus;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/

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/**
******************************************************************************
* @file hk32f030m_misc.c
* @author Rakan.z
* @version V1.0
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_misc.h"
/** @defgroup MISC
* @brief MISC driver modules
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup MISC_Private_Functions
* @{
*/
/**
*
@verbatim
*******************************************************************************
##### Interrupts configuration functions #####
*******************************************************************************
[..] This section provide functions allowing to configure the NVIC interrupts
(IRQ). The Cortex-M0 exceptions are managed by CMSIS functions.
(#) Enable and Configure the priority of the selected IRQ Channels.
The priority can be 0..3.
-@- Lower priority values gives higher priority.
-@- Priority Order:
(#@) Lowest priority.
(#@) Lowest hardware priority (IRQn position).
@endverbatim
*/
/**
* @brief Initializes the NVIC peripheral according to the specified
* parameters in the NVIC_InitStruct.
* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
* the configuration information for the specified NVIC peripheral.
* @retval None
*/
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
{
uint32_t tmppriority = 0x00;
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
assert_param(IS_NVIC_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPriority));
if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
{
/* Compute the Corresponding IRQ Priority --------------------------------*/
tmppriority = NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02];
tmppriority &= (uint32_t)(~(((uint32_t)0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8)));
tmppriority |= (uint32_t)((((uint32_t)NVIC_InitStruct->NVIC_IRQChannelPriority << 6) & 0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8));
NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02] = tmppriority;
/* Enable the Selected IRQ Channels --------------------------------------*/
NVIC->ISER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
}
else
{
/* Disable the Selected IRQ Channels -------------------------------------*/
NVIC->ICER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
}
}
/**
* @brief Selects the condition for the system to enter low power mode.
* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
* This parameter can be one of the following values:
* @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
* @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
* @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
* @param NewState: new state of LP condition.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_NVIC_LP(LowPowerMode));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
SCB->SCR |= LowPowerMode;
}
else
{
SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
}
}
/**
* @brief Configures the SysTick clock source.
* @param SysTick_CLKSource: specifies the SysTick clock source.
* This parameter can be one of the following values:
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
* @retval None
*/
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
{
/* Check the parameters */
assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
{
SysTick->CTRL |= SysTick_CLKSource_HCLK;
}
else
{
SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
}
}
/**
* @}
*/
/**
* @}
*/

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/*
******************************************************************************
* @file hk32f030m_pwr.c
* @author Rakan.z
* @version V1.0
* @brief API file of PWR module
* @changelist
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include <hk32f030m.h>
#include <hk32f030m_pwr.h>
#include <hk32f030m_rcc.h>
/** @defgroup PWR_Private_Defines
* @{
*/
/**
* @brief Deinitializes the PWR peripheral registers to their default reset values.
* @param None
* @retval None
*/
void PWR_DeInit(void)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
}
/**
* @brief Enters Sleep mode.
* @param PWR_Entry: specifies if Sleep mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_Entry_WFI: enter Sleep mode with WFI instruction
* @arg PWR_Entry_WFE: enter Sleep mode with WFE instruction
* @retval None
*/
void PWR_EnterSleepMode(uint8_t PWR_Entry)
{
uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_PWR_ENTRY(PWR_Entry));
/* Select the regulator state in Sleep mode ---------------------------------*/
tmpreg = PWR->CR;
/* Clear LPDS bits */
tmpreg &= CR_DS_MASK;
/* Store the new value */
PWR->CR = tmpreg;
/* Select STOP mode entry --------------------------------------------------*/
if(PWR_Entry == PWR_Entry_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
/* Request Wait For Event */
__SEV();
__WFE();
__WFE();
}
}
/**
* @brief it will config LSI 128K as sysclk
* @retval None
* @note this fuction only used in fuction PWR_EnterDeepSleepMode(uint8_t PWR_Entry)
*/
static void Sysclk_SwitchToLSI(void)
{
RCC_LSICmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET);
/* Flash wait state */
FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
FLASH->ACR |= (uint32_t)FLASH_Latency_0;
/* Select LSI as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_LSI;
/* Wait till LSI is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_LSI);
/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
/* PCLK = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
// config the Flash Erase and program time
RCC->CFGR4 |= RCC_RCC_CFGR4_FLITFCLK_PRE;
RCC->CFGR4 &= ~(((uint32_t)0x0F) << RCC_RCC_CFGR4_FLITFCLK_PRE_Pos);
/* Close HSI */
RCC_HSICmd(DISABLE);
}
/**
* @brief Enters DeepSleep mode. it will config LSI 128K as sysclk
* @param PWR_Entry: specifies if Sleep mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_Entry_WFI: enter Sleep mode with WFI instruction
* @arg PWR_Entry_WFE: enter Sleep mode with WFE instruction
* @retval None
*/
void PWR_EnterDeepSleepMode(uint8_t PWR_Entry)
{
/* Check the parameters */
assert_param(IS_PWR_ENTRY(PWR_Entry));
/* set sysclk to LSI */
Sysclk_SwitchToLSI();
/* enter sleep mode */
PWR_EnterSleepMode(PWR_Entry);
}
/**
* @brief Enter Stop mode.
* @param PWR_Regulator: specifies the regulator state in STOP mode.
* This parameter can be one of the following values:
* @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
* @param PWR_Entry: specifies if STOP mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_Entry_WFI: enter STOP mode with WFI instruction
* @arg PWR_Entry_WFE: enter STOP mode with WFE instruction
* @retval None
*/
void PWR_EnterStopMode(uint32_t PWR_Regulator, uint8_t PWR_Entry)
{
uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_PWR_REGULATOR(PWR_Regulator));
assert_param(IS_PWR_ENTRY(PWR_Entry));
/* Select the regulator state in Stop mode ---------------------------------*/
tmpreg = PWR->CR;
/* Clear LPDS bits */
tmpreg &= CR_DS_MASK;
/* Set LPDS bit according to PWR_Regulator value */
tmpreg |= PWR_Regulator;
/* Store the new value */
PWR->CR = tmpreg;
/* Set SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR |= SCB_SCR_SLEEPDEEP;
/* Select Stop mode entry --------------------------------------------------*/
if(PWR_Entry == PWR_Entry_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
// wait the AWU is IDE and AWU_BUSY is 0
while(AWU->SR & 0x00000001){};
// detect and clear the AWU_EXTILINE11
if(EXTI_GetFlagStatus(EXTI_Line11) == SET)
{
EXTI_ClearFlag(EXTI_Line11);
}
/* Request Wait For Event */
__SEV();
__WFE();
__WFE();
}
/* Reset SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
}
/**
* @brief Set PMU LDO Refernce voltage to adc.
* @param Vref_Set: internal Refernce out voltage ,
* This parameter can be: ADC_Vref_0d8 or ADC_Vref_LDO
ADC_Vref_0d8: 0.8V Vref to adc.
ADC_Vref_LDO: LDO out Voltage to adc .(1.2V)
* @retval None
*/
void PWR_SetLDO_RefVolToADC(uint16_t Vref_Set)
{
uint16_t temp = 0;
/* Check the parameters */
assert_param(IS_PWR_VTEST_SET(Vref_Set));
/* select the LDO Voltage reference register */
temp = PWR->VREF_SEL;
/* Clear LPDS bits */
temp &= VTEST_SET_MASK;
/* set the VREF*/
temp |= Vref_Set;
/* set the Register*/
PWR->VREF_SEL |= (uint32_t)temp;
}

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/**
******************************************************************************
* @file hk32f030m_syscfg.c
* @author Rakan.zhang
* @version V1.0
* @brief API file of PWR module
* @changelist
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_syscfg.h"
#include "hk32f030m_rcc.h"
/** @defgroup SYSCFG
* @brief SYSCFG driver modules
* @{
*/
/**
* @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
* registers to their default reset values.
* @param None
* @retval None
*/
void SYSCFG_DeInit(void)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
}
/**
* @brief Cortex-m0 lockup output to tim1 break input connected or disconnected.
* @param Lockup_lockOnOff: To TIM1 break input onoff.
* This parameter can be one of the following values:
* @arg SYSCFG_Lockup_TIM1Break_ON: Cortex-m0 lockup output to tim1 break input connected
* @arg SYSCFG_Lockup_TIM1Break_OFF:Cortex-m0 lockup output to tim1 break input disconnected
* @retval None
*/
void SYSCFG_Lockup_Tim1BreakConfig(uint8_t Lockup_lockOnOff)
{
uint32_t temp = 0;
/* Check the parameters */
assert_param(IS_SYSCFG_LOCKUP_TIM1BREAK_ONOFF(Lockup_lockOnOff));
/*select SYSYCFG CFGR1 register*/
temp = SYSCFG->CFGR1;
/* clear mem_mode */
temp &= MEM_LOCKUP_OUT_MASK;
/* set memoryRemap value*/
temp |= Lockup_lockOnOff;
SYSCFG->CFGR1 |= temp;
}
/**
* @brief Changes the mapping of the specified pin.
* @param SYSCFG_MemoryRemap: selects the memory remapping.
* This parameter can be one of the following values:
* @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
* @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (2kB) mapped at 0x00000000
* @retval None
*/
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
{
uint32_t temp = 0;
/* Check the parameters */
assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
/*select SYSYCFG CFGR1 register*/
temp = SYSCFG->CFGR1;
/* clear mem_mode */
temp &= MEM_REMAP_MASK;
/* set memoryRemap value*/
temp |= SYSCFG_MemoryRemap;
SYSCFG->CFGR1 |= temp;
}
/**
* @brief Selects the GPIO pin used as EXTI Line.
* @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
* EXTI lines where x can be (A..D)
*
* @param EXTI_PinSourcex: specifies the EXTI line to be configured.
* This parameter can be EXTI_PinSourcex where x can be (0..15)
*
* @retval None
*/
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
{
uint32_t tmp = 0x00;
/* Check the parameters */
assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
}
/**
* @}
*/

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/**
******************************************************************************
* @file hk32f030m_wwdg.c
* @version V1.0.1
* author Rakan.Z/wing.Wang
* @date 2019-08-15
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "hk32f030m_wwdg.h"
#include "hk32f030m_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* --------------------- WWDG registers bit mask ---------------------------- */
/* CFR register bit mask */
#define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
#define CFR_W_MASK ((uint32_t)0xFFFFFF80)
#define BIT_MASK ((uint8_t)0x7F)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup WWDG_Private_Functions
* @{
*/
/** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
* @brief Prescaler, Refresh window and Counter configuration functions
*
@verbatim
==============================================================================
##### Prescaler, Refresh window and Counter configuration functions #####
==============================================================================
@endverbatim
* @{
*/
/**
* @brief Deinitializes the WWDG peripheral registers to their default reset values.
* @param None
* @retval None
*/
void WWDG_DeInit(void)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
}
/**
* @brief Sets the WWDG Prescaler.
* @param WWDG_Prescaler: specifies the WWDG Prescaler.
* This parameter can be one of the following values:
* @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
* @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
* @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
* @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
* @retval None
*/
void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
{
uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
/* Clear WDGTB[1:0] bits */
tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
/* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
tmpreg |= WWDG_Prescaler;
/* Store the new value */
WWDG->CFR = tmpreg;
}
/**
* @brief Sets the WWDG window value.
* @param WindowValue: specifies the window value to be compared to the downcounter.
* This parameter value must be lower than 0x80.
* @retval None
*/
void WWDG_SetWindowValue(uint8_t WindowValue)
{
__IO uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
/* Clear W[6:0] bits */
tmpreg = WWDG->CFR & CFR_W_MASK;
/* Set W[6:0] bits according to WindowValue value */
tmpreg |= WindowValue & (uint32_t) BIT_MASK;
/* Store the new value */
WWDG->CFR = tmpreg;
}
/**
* @brief Enables the WWDG Early Wakeup interrupt(EWI).
* @note Once enabled this interrupt cannot be disabled except by a system reset.
* @param None
* @retval None
*/
void WWDG_EnableIT(void)
{
WWDG->CFR |= WWDG_CFR_EWI;
}
/**
* @brief Sets the WWDG counter value.
* @param Counter: specifies the watchdog counter value.
* This parameter must be a number between 0x40 and 0x7F (to prevent
* generating an immediate reset).
* @retval None
*/
void WWDG_SetCounter(uint8_t Counter)
{
/* Check the parameters */
assert_param(IS_WWDG_COUNTER(Counter));
/* Write to T[6:0] bits to configure the counter value, no need to do
a read-modify-write; writing a 0 to WDGA bit does nothing */
WWDG->CR = Counter & BIT_MASK;
}
/**
* @}
*/
/** @defgroup WWDG_Group2 WWDG activation functions
* @brief WWDG activation functions
*
@verbatim
==============================================================================
##### WWDG activation function #####
==============================================================================
@endverbatim
* @{
*/
/**
* @brief Enables WWDG and load the counter value.
* @param Counter: specifies the watchdog counter value.
* This parameter must be a number between 0x40 and 0x7F (to prevent
* generating an immediate reset).
* @retval None
*/
void WWDG_Enable(uint8_t Counter)
{
/* Check the parameters */
assert_param(IS_WWDG_COUNTER(Counter));
WWDG->CR = WWDG_CR_WDGA | Counter;
}
/**
* @}
*/
/** @defgroup WWDG_Group3 Interrupts and flags management functions
* @brief Interrupts and flags management functions
*
@verbatim
==============================================================================
##### Interrupts and flags management functions #####
==============================================================================
@endverbatim
* @{
*/
/**
* @brief Checks whether the Early Wakeup interrupt flag is set or not.
* @param None
* @retval The new state of the Early Wakeup interrupt flag (SET or RESET).
*/
FlagStatus WWDG_GetFlagStatus(void)
{
FlagStatus bitstatus = RESET;
if ((WWDG->SR) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/**
* @brief Clears Early Wakeup interrupt flag.
* @param None
* @retval None
*/
void WWDG_ClearFlag(void)
{
WWDG->SR = (uint32_t)RESET;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/