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bootloader: flash page erase is on-demand, now fits in 2K 

Flash pages are only erased as needed during the flash routine, which makes flashing faster as well as making the transfer consistent.

Later datasheets have the flash clock set to 2MHz. I've set it to 2MHz here. I may undo this change later depending on how slow loading a 14K firmware feels.

Was able to save enough space to reduce bootloader size from almost 2.5K to 2K exactly. Adjusted flash offsets to start from 0x800.

GPIO values are now mostly reset to power-on defaults.

Fixed some formatting. Removed dead code.
This commit is contained in:
true 2023-06-25 05:01:16 -07:00
parent d5cbabf830
commit 46a3ab6007
15 changed files with 336 additions and 249 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
bootloader_hk32f030m_uart_xmodem/.cproject
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10
bootloader_hk32f030m_uart_xmodem/bootloader_hk32f030m_uart_xmodem _dbg.launch
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@ -2,12 +2,13 @@
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5
bootloader_hk32f030m_uart_xmodem/code/inc/flash.h
View File

@ -15,8 +15,9 @@
#define FLASH_SIZE 16384 // size of overall flash available on MCU #define FLASH_SIZE 16384 // size of overall flash available on MCU
#define FLASH_ERASE_PAGE_SIZE ((uint16_t)0x80) // erase page size #define FLASH_ERASE_PAGE_SIZE ((uint16_t)0x80) // erase page size
#define FLASH_ERASE_PAGE_MASK 0x7f // bitmask of page size
#define USER_APP_START_ADDR ((uint32_t)FLASH_BASE + 0xa00) // 2560 bytes (20 pages) rsvd for bootloader #define USER_APP_START_ADDR ((uint32_t)FLASH_BASE + 0x800) // 2048 bytes (16 pages) rsvd for bootloader
#define USER_APP_END_ADDR ((uint32_t)FLASH_BASE + FLASH_SIZE) #define USER_APP_END_ADDR ((uint32_t)FLASH_BASE + FLASH_SIZE)
@ -32,7 +33,7 @@ typedef enum {
BL_flash_status flash_erase_user_app(); BL_flash_status flash_erase_page(uint32_t addr);
BL_flash_status flash_write(uint32_t addr, uint8_t *data, uint16_t length); BL_flash_status flash_write(uint32_t addr, uint8_t *data, uint16_t length);
void jump_to_user_app(); void jump_to_user_app();

4
bootloader_hk32f030m_uart_xmodem/code/inc/usart.h
View File

@ -9,7 +9,7 @@
#define CODE_INC_USART_H_ #define CODE_INC_USART_H_
#define COMM_TIMEOUT 512000; #define COMM_TIMEOUT 0xffff;
@ -24,7 +24,7 @@ typedef enum {
void comm_init(); void comm_init();
BL_comm_status comm_rx(uint8_t *data, uint16_t length); BL_comm_status comm_rx(uint8_t *data, uint16_t length);
BL_comm_status comm_tx_str(uint8_t *data); BL_comm_status comm_tx_str(char *data);
BL_comm_status comm_tx_byte(uint8_t data); BL_comm_status comm_tx_byte(uint8_t data);

1
bootloader_hk32f030m_uart_xmodem/code/inc/user_io.h
View File

@ -29,7 +29,6 @@
void user_io_init(); void user_io_init();
void user_led_init(); void user_led_init();
void user_led_set(uint8_t lit);

4
bootloader_hk32f030m_uart_xmodem/code/inc/xmodem.h
View File

@ -72,7 +72,9 @@ typedef enum {
X_ERROR = 0xFFu /**< Generic error. */ X_ERROR = 0xFFu /**< Generic error. */
} BL_xmodem_status; } BL_xmodem_status;
void xmodem_receive(void);
BL_xmodem_status xmodem_receive(void);

45
bootloader_hk32f030m_uart_xmodem/code/src/flash.c
View File

@ -11,49 +11,22 @@
/** /**
* @brief This function erases the user application area, from start to end of flash. * @brief This function erases a single flash page.
* @return status: Report about the success of the erasing. * @return status: Report about the success of the erasing.
*/ */
__attribute__ ((long_call, section(".ramfunc"))) BL_flash_status flash_erase_user_app() __attribute__ ((long_call, section(".ramfunc"))) BL_flash_status flash_erase_page(uint32_t addr)
{ {
// uint32_t timeout; BL_flash_status status = FLASH_ERROR;
uint32_t page;
FLASH_Unlock(); FLASH_Unlock();
for (page = USER_APP_START_ADDR; page < USER_APP_END_ADDR; page += FLASH_ERASE_PAGE_SIZE) { if (FLASH_ErasePage(addr) == FLASH_COMPLETE) {
if (FLASH_ErasePage(page) != FLASH_COMPLETE) { status = FLASH_OK;
FLASH_Lock();
return FLASH_ERROR;
}
/*
// clear end of operation bit
FLASH->SR &= ~FLASH_FLAG_EOP;
// start erasing page
FLASH->CR |= FLASH_CR_PER;
FLASH->AR = page;
FLASH->CR |= FLASH_CR_STRT;
// wait wait for operation to complete
timeout = FLASH_ER_PRG_TIMEOUT;
while ((FLASH->SR & FLASH_FLAG_BSY)) {
timeout--;
if (!timeout) {
FLASH_Lock();
return FLASH_ERROR;
}
}
// disable page erase bit
FLASH->CR &= ~FLASH_CR_PER;
*/
} }
FLASH_Lock(); FLASH_Lock();
return FLASH_OK; return status;
} }
/** /**
@ -109,6 +82,12 @@ void jump_to_user_app()
USART1->CR1 = 0; USART1->CR1 = 0;
USART1->BRR = 0; USART1->BRR = 0;
// configure GPIO back to default
GPIOA->PUPDR = (uint32_t)0xffff; // although marked as reserved, it is the default per datasheet
GPIOA->MODER = (uint32_t)0xffff;
GPIOB->MODER = (uint32_t)0xfbff;
GPIOD->MODER = (uint32_t)0xfbff;
// disable configured interrupts // disable configured interrupts
// NVIC->ICER[0] = 0; // NVIC->ICER[0] = 0;

46
bootloader_hk32f030m_uart_xmodem/code/src/main.c
View File

@ -22,8 +22,8 @@
int main(void) int main(void)
{ {
uint8_t btn; uint32_t i;
//volatile uint16_t timeout = 0xffff; uint32_t btn;
// ensure the bootloader is write protected // ensure the bootloader is write protected
// TODO // TODO
@ -31,9 +31,6 @@ int main(void)
// configure button and LED // configure button and LED
user_io_init(); user_io_init();
// need a small delay to ensure the button pullup/down will charge/discharge pin capacitance
//while (--timeout);
// get button state // get button state
btn = BTN_PORT->IDR & (1 << BTN_PIN); btn = BTN_PORT->IDR & (1 << BTN_PIN);
#if BTN_ACT_DIR == 0 #if BTN_ACT_DIR == 0
@ -41,34 +38,45 @@ int main(void)
#endif #endif
// bootloader activation methods // bootloader activation methods
if (btn // button pushed i = *(volatile uint32_t *)USER_APP_START_ADDR; // first byte of user flash
|| (*(volatile uint32_t *)USER_APP_START_ADDR) == 0x00000000 // flash empty if (btn || (i == 0x00000000) || (i = 0xffffffff)) { // is button pushed, or flash empty?
|| (*(volatile uint32_t *)USER_APP_START_ADDR) == 0xFFFFFFFF) { // flash empty // bootloader is activated; configure systick to flash LED
// bootloader is activated, show it
user_led_init(); user_led_init();
// configure serial comms and print welcome banner // configure serial comms and print welcome banner
// todo: implement autobaud? // todo: implement autobaud?
comm_init(); comm_init();
const uint8_t *banner_bar = (uint8_t *)"\r\n================================================\r\n"; comm_tx_byte('\r');
comm_tx_str((uint8_t *)banner_bar); comm_tx_byte('\n');
comm_tx_str((uint8_t *)"trueControl HK32F XMODEM Flash Bootloader v0.0.1");
comm_tx_str((uint8_t *)banner_bar); for (i = 0; i < 31; i++) {
comm_tx_byte('=');
}
comm_tx_str("\r\ntrueControl HK32F Loader v0.0.2\r\n");
for (i = 0; i < 31; i++) {
comm_tx_byte('=');
}
// wait for firmware load or reset // wait for firmware load or reset
while(1) { while(1) {
comm_tx_str((uint8_t*)"\r\nsend binary file using XMODEM to update firmware"); // announce bootloader start
comm_tx_str((uint8_t*)"\r\nthe first data block will take time. it's normal\r\n\r\n"); comm_tx_str("\r\n\r\nsend firmware file using XMODEM\r\n\r\n");
xmodem_receive();
// start listening for data and letting user know to send XMODEM data
if (xmodem_receive() == X_OK) {
comm_tx_str("\r\nflash updated; booting.\r\n\r\n");
break;
}
// if xmodem exits, there was a failure. repeat the process. // if xmodem exits, there was a failure. repeat the process.
comm_tx_str((uint8_t*)"\r\nfailed to update. try again.\r\n"); comm_tx_str("\r\nfailed to update; try again.\r\n");
} }
} }
// bootloader is not activated; jump to user code // bootloader is either done not activated; jump to user code
jump_to_user_app(); jump_to_user_app();
} }

72
bootloader_hk32f030m_uart_xmodem/code/src/usart.c
View File

@ -41,16 +41,14 @@ uint16_t rxlen = 0;
*/ */
void comm_init() void comm_init()
{ {
// USART_InitTypeDef usart;
// NVIC_InitTypeDef nvic;
// enable GPIO clock // enable GPIO clock
RCC_AHBPeriphClockCmd(USART_TX_GPIO_CLK | USART_RX_GPIO_CLK, ENABLE); // RCC_AHBPeriphClockCmd(USART_TX_GPIO_CLK | USART_RX_GPIO_CLK, ENABLE);
// configure USART GPIO // configure USART GPIO
GPIO_PinAFConfig(USART_TX_PORT, USART_TX_PINSRC, GPIO_AF_1); GPIO_PinAFConfig(USART_TX_PORT, USART_TX_PINSRC, GPIO_AF_1);
GPIO_PinAFConfig(USART_RX_PORT, USART_RX_PINSRC, GPIO_AF_1); GPIO_PinAFConfig(USART_RX_PORT, USART_RX_PINSRC, GPIO_AF_1);
/* these have been configured in user_io.c to save space
USART_RX_PORT->MODER &= ~(GPIO_MODER_MODER0 << 2 * USART_RX_PIN); USART_RX_PORT->MODER &= ~(GPIO_MODER_MODER0 << 2 * USART_RX_PIN);
USART_RX_PORT->MODER |= (GPIO_Mode_AF << 2 * USART_RX_PIN); // alt function USART_RX_PORT->MODER |= (GPIO_Mode_AF << 2 * USART_RX_PIN); // alt function
@ -58,46 +56,25 @@ void comm_init()
USART_TX_PORT->OTYPER &= ~(GPIO_OTYPER_OT_0 << USART_TX_PIN); // push pull USART_TX_PORT->OTYPER &= ~(GPIO_OTYPER_OT_0 << USART_TX_PIN); // push pull
USART_TX_PORT->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEEDR0 << 2 * USART_TX_PIN); // slow USART_TX_PORT->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEEDR0 << 2 * USART_TX_PIN); // slow
USART_TX_PORT->MODER |= (GPIO_Mode_AF << 2 * USART_TX_PIN); // alt function USART_TX_PORT->MODER |= (GPIO_Mode_AF << 2 * USART_TX_PIN); // alt function
// configure NVIC
/*
nvic.NVIC_IRQChannel = USART1_IRQn;
nvic.NVIC_IRQChannelPriority = 1;
nvic.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&nvic);
*/ */
// enable USART clock // enable USART clock
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
/*
// configure USART peripheral
usart.USART_BaudRate = BAUDRATE;
usart.USART_WordLength = USART_WordLength_8b;
usart.USART_StopBits = USART_StopBits_1;
usart.USART_Parity = USART_Parity_No;
usart.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
usart.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_Init(USART1, &usart);
*/
// configure USART peripheral manually // configure USART peripheral manually
// we do this as the library uses division which bloats flash space // we do this as the library bloats flash space (division, verbose, ...)
USART1->CR1 = 0; // disable USART USART1->CR1 = 0; // disable USART
USART1->CR1 = USART_Mode_Rx | USART_Mode_Tx; // 8 bits, no parity, tx/rx enabled USART1->CR1 = USART_Mode_Rx | USART_Mode_Tx; // 8 bits, no parity, tx/rx enabled
USART1->CR2 = 0; // 1 stop bit USART1->CR2 = 0; // 1 stop bit
USART1->CR3 = 0; USART1->CR3 = 0;
USART1->BRR = 0x45; // 115200 baud rate @8MHz (per datasheet) USART1->BRR = 0x45; // 115200 baud rate @8MHz (per datasheet)
// enable USART interrupts
// USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
// enable USART // enable USART
USART1->CR1 |= USART_CR1_UE; USART1->CR1 |= USART_CR1_UE;
} }
/** /**
* @brief Receives data from USART. * @brief Receives data from USART in a polling manner.
* @param *data: Array to save the received data. * @param *data: Array to save the received data.
* @param length: Size of the data. * @param length: Size of the data.
* @return status: Report about the success of the receiving. * @return status: Report about the success of the receiving.
@ -107,24 +84,8 @@ BL_comm_status comm_rx(uint8_t *data, uint16_t length)
uint16_t i; uint16_t i;
uint16_t timeout; uint16_t timeout;
/* for (i = 0; i < length; i++) {
// wait for more data to arrive
timeout = COMM_TIMEOUT; timeout = COMM_TIMEOUT;
while (rxlen < length) {
timeout--;
if (!timeout) return COMM_RX_TIMEOUT;
}
// copy data to final buffer
for (i = 0; i < length; i++) {
data[i] = rxbuf[rxptr++];
if (rxptr >= RX_BUF_LEN) rxptr = 0;
rxlen--;
}
*/
for (i = 0; i < length; i++) {
timeout = 0xffff;
while (!(USART1->ISR & USART_ISR_RXNE_Msk) && timeout) { while (!(USART1->ISR & USART_ISR_RXNE_Msk) && timeout) {
timeout--; timeout--;
} }
@ -160,7 +121,7 @@ BL_comm_status comm_tx_byte(uint8_t data)
* @param *data: String array. * @param *data: String array.
* @return status: Report about the success of the transmission. * @return status: Report about the success of the transmission.
*/ */
BL_comm_status comm_tx_str(uint8_t *data) BL_comm_status comm_tx_str(char *data)
{ {
uint8_t i; uint8_t i;
uint16_t len = 0; uint16_t len = 0;
@ -176,24 +137,3 @@ BL_comm_status comm_tx_str(uint8_t *data)
return COMM_OK; return COMM_OK;
} }
/*
void USART1_IRQHandler()
{
uint8_t data;
if (USART1->ISR & USART_ISR_RXNE_Msk) {
// read data
data = USART1->RDR;
// only add data if there is room
if (rxlen >= RX_BUF_LEN) return;
rxlen++;
// next position
if (++rxptr >= RX_BUF_LEN) rxptr = 0;
// save data
rxbuf[rxptr] = data;
}
}
*/

48
bootloader_hk32f030m_uart_xmodem/code/src/user_io.c
View File

@ -14,8 +14,9 @@
void user_io_init() void user_io_init()
{ {
// enable gpio clocks // enable gpio clocks
RCC_AHBPeriphClockCmd(BTN_CLK | LED_CLK, ENABLE); RCC_AHBPeriphClockCmd(BTN_CLK | LED_CLK | RCC_AHBPeriph_GPIOB, ENABLE);
/* --original method, not space efficient
// configure led // configure led
#if LED_ACT_DIR == 0 #if LED_ACT_DIR == 0
LED_PORT->BSRR = (1 << LED_PIN); // idle high LED_PORT->BSRR = (1 << LED_PIN); // idle high
@ -25,16 +26,44 @@ void user_io_init()
LED_PORT->OTYPER &= ~(GPIO_OTYPER_OT_0 << LED_PIN); // push pull LED_PORT->OTYPER &= ~(GPIO_OTYPER_OT_0 << LED_PIN); // push pull
LED_PORT->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEEDR0 << 2 * LED_PIN); // slow LED_PORT->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEEDR0 << 2 * LED_PIN); // slow
LED_PORT->MODER &= ~(GPIO_MODER_MODER0 << 2 * LED_PIN); LED_PORT->MODER &= ~(GPIO_MODER_MODER0 << 2 * LED_PIN);
LED_PORT->MODER |= (GPIO_Mode_OUT << 2 * LED_PIN); // output LED_PORT->MODER = (GPIO_Mode_OUT << 2 * LED_PIN); // output
// configure button // configure button
BTN_PORT->MODER &= ~(GPIO_MODER_MODER0 << 2 * BTN_PIN); // input BTN_PORT->MODER &= ~(GPIO_MODER_MODER0 << 2 * BTN_PIN); // input
BTN_PORT->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << 2 * BTN_PIN); BTN_PORT->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << 2 * BTN_PIN);
#if BTN_ACT_DIR == 0 #if BTN_ACT_DIR == 0
BTN_PORT->PUPDR |= (GPIO_PuPd_UP << 2 * BTN_PIN); // pulled high //BTN_PORT->PUPDR |= (GPIO_PuPd_UP << 2 * BTN_PIN); // pulled high
BTN_PORT->PUPDR = (GPIO_PuPd_UP << 2 * BTN_PIN); // pulled high
#else #else
BTN_PORT->PUPDR |= (GPIO_PuPd_DOWN << 2 * BTN_PIN); // pulled low //BTN_PORT->PUPDR |= (GPIO_PuPd_DOWN << 2 * BTN_PIN); // pulled low
BTN_PORT->PUPDR = (GPIO_PuPd_DOWN << 2 * BTN_PIN); // pulled low
#endif #endif
*/
/* new method, configure USART pins at the same time as LED and btn
* at they are on the same ports
*/
// default MODER for GPIOB and GPIOD are 0xFBFF
// pin 5 _must_ be configured as AF, otherwise you'll kill debugging!
// configure button as input
BTN_PORT->MODER = 0x0;
#if BTN_ACT_DIR == 0
//BTN_PORT->PUPDR |= (GPIO_PuPd_UP << 2 * BTN_PIN); // pulled high
BTN_PORT->PUPDR = (GPIO_PuPd_UP << 2 * BTN_PIN); // pulled high
#else
//BTN_PORT->PUPDR |= (GPIO_PuPd_DOWN << 2 * BTN_PIN); // pulled low
BTN_PORT->PUPDR = (GPIO_PuPd_DOWN << 2 * BTN_PIN); // pulled low
#endif
// configure LED as PP output, USART TX as AF
LED_PORT->OTYPER = 0;
LED_PORT->OSPEEDR = 0;
LED_PORT->MODER = 0x800 | (GPIO_Mode_OUT << (2 * LED_PIN)) | (GPIO_Mode_AF << (2 * 1));
// configure USART RX as AF
GPIOB->MODER = 0x800 | (GPIO_Mode_AF << (2 * 4));
} }
void user_led_init() void user_led_init()
@ -43,14 +72,3 @@ void user_led_init()
SysTick_Config(8000000 / 20); SysTick_Config(8000000 / 20);
} }
void user_led_set(uint8_t lit)
{
#if LED_ACT_DIR == 0
if (lit) LED_PORT->BRR = (1 << LED_PIN);
else LED_PORT->BSRR = (1 << LED_PIN);
#else
if (lit) LED_PORT->BSRR = (1 << LED_PIN);
else LED_PORT->BRR = (1 << LED_PIN);
#endif
}

55
bootloader_hk32f030m_uart_xmodem/code/src/xmodem.c
View File

@ -34,7 +34,7 @@ static BL_xmodem_status xmodem_error_handler(uint8_t *error_number, uint8_t max_
* @param void * @param void
* @return void * @return void
*/ */
void xmodem_receive(void) BL_xmodem_status xmodem_receive(void)
{ {
volatile BL_xmodem_status status = X_OK; volatile BL_xmodem_status status = X_OK;
uint8_t error_number = 0u; uint8_t error_number = 0u;
@ -51,7 +51,7 @@ void xmodem_receive(void)
BL_comm_status status_c = comm_rx(&header, 1); BL_comm_status status_c = comm_rx(&header, 1);
/* Spam the host (until we receive something) with ACSII "C", to notify it, we want to use CRC-16. */ /* Spam the host (until we receive something) with ACSII "C", to notify it, we want to use CRC-16. */
if ((status_c != COMM_OK) && (x_first_packet_rcvd == false)) { if ((status_c != COMM_OK) && (x_first_packet_rcvd == 0)) {
comm_tx_byte(X_C); comm_tx_byte(X_C);
} }
@ -96,9 +96,7 @@ void xmodem_receive(void)
case X_EOT: { case X_EOT: {
/* ACK, feedback to user (as a text), then jump to user application. */ /* ACK, feedback to user (as a text), then jump to user application. */
comm_tx_byte(X_ACK); comm_tx_byte(X_ACK);
comm_tx_str((uint8_t*)"\r\nfirmware updated.\r\nstarting firmware.\r\n\r\n"); return X_OK;
jump_to_user_app();
break;
} }
/* Abort from host. */ /* Abort from host. */
@ -116,6 +114,8 @@ void xmodem_receive(void)
} }
} }
} }
return status;
} }
/** /**
@ -127,22 +127,19 @@ void xmodem_receive(void)
static uint16_t xmodem_calc_crc(uint8_t *data, uint16_t length) static uint16_t xmodem_calc_crc(uint8_t *data, uint16_t length)
{ {
uint16_t crc = 0u; uint16_t crc = 0u;
while (length)
{ while (length) {
length--; length--;
crc = crc ^ ((uint16_t)*data++ << 8u); crc = crc ^ ((uint16_t)*data++ << 8u);
for (uint8_t i = 0u; i < 8u; i++) for (uint8_t i = 0u; i < 8u; i++) {
{ if (crc & 0x8000u) {
if (crc & 0x8000u)
{
crc = (crc << 1u) ^ 0x1021u; crc = (crc << 1u) ^ 0x1021u;
} } else {
else
{
crc = crc << 1u; crc = crc << 1u;
} }
} }
} }
return crc; return crc;
} }
@ -154,7 +151,8 @@ static uint16_t xmodem_calc_crc(uint8_t *data, uint16_t length)
static BL_xmodem_status xmodem_handle_packet(uint8_t header) static BL_xmodem_status xmodem_handle_packet(uint8_t header)
{ {
BL_xmodem_status status = X_OK; BL_xmodem_status status = X_OK;
uint16_t size = 0u; uint16_t size = 0;
uint32_t i;
/* 2 bytes for packet number, 1024 for data, 2 for CRC*/ /* 2 bytes for packet number, 1024 for data, 2 for CRC*/
uint8_t rcvd_packet_number[X_PACKET_NUMBER_SIZE]; uint8_t rcvd_packet_number[X_PACKET_NUMBER_SIZE];
@ -190,13 +188,9 @@ static BL_xmodem_status xmodem_handle_packet(uint8_t header)
status |= X_ERROR_UART; status |= X_ERROR_UART;
} }
/* If it is the first packet, then erase the memory. */ /* If it is the first packet, then mark it. If you want to erase all flash, do it here. */
if ((status == X_OK) && (x_first_packet_rcvd == false)) { if ((status == X_OK)) { // && (x_first_packet_rcvd == 0)) {
if (flash_erase_user_app() == FLASH_OK) { x_first_packet_rcvd = 1;
x_first_packet_rcvd = true;
} else {
status |= X_ERROR_FLASH;
}
} }
/* Error handling and flashing. */ /* Error handling and flashing. */
@ -219,12 +213,23 @@ static BL_xmodem_status xmodem_handle_packet(uint8_t header)
} }
/* Do the actual flashing if there weren't any errors. */ /* Do the actual flashing if there weren't any errors. */
if ((status == X_OK) && if (status == X_OK) {
(flash_write(xmodem_flash_w_addr, rcvd_packet_data, size)) != FLASH_OK) { /* first, erase pages depending on size */
for (i = 0; i < size; i += FLASH_ERASE_PAGE_SIZE) {
if (flash_erase_page(xmodem_flash_w_addr + i) != FLASH_OK) {
/* Flashing error. */ /* Flashing error. */
status |= X_ERROR_FLASH; status |= X_ERROR_FLASH;
} }
}
/* then write data to these cleared pages */
if (status == X_OK) {
if (flash_write(xmodem_flash_w_addr, rcvd_packet_data, size) != FLASH_OK) {
/* Flashing error. */
status |= X_ERROR_FLASH;
}
}
}
/* Raise the packet number and the address counters (if there weren't any errors). */ /* Raise the packet number and the address counters (if there weren't any errors). */
if (status == X_OK) { if (status == X_OK) {

74
bootloader_hk32f030m_uart_xmodem/driver/CMSIS/HK32F030M/Source/startup_hk32f030mf4p6.s
View File

@ -112,8 +112,8 @@ Infinite_Loop:
g_pfnVectors: g_pfnVectors:
.word _estack .word _estack
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word Default_Handler // NMI_Handler
.word HardFault_Handler .word Default_Handler // HardFault_Handler
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
@ -121,43 +121,43 @@ g_pfnVectors:
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word SVC_Handler .word Default_Handler // SVC_Handler
.word 0 .word 0
.word 0 .word 0
.word PendSV_Handler .word Default_Handler // PendSV_Handler
.word SysTick_Handler .word SysTick_Handler
.word WWDG_IRQHandler /* Window WatchDog */ // .word WWDG_IRQHandler /* Window WatchDog */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word EXTI11_IRQHandler /* EXTI Line 11 interrupt(AWU_WKP) */ // .word EXTI11_IRQHandler /* EXTI Line 11 interrupt(AWU_WKP) */
.word FLASH_IRQHandler /* FLASH */ // .word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */ // .word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line 0 */ // .word EXTI0_IRQHandler /* EXTI Line 0 */
.word EXTI1_IRQHandler /* EXTI Line 1 */ // .word EXTI1_IRQHandler /* EXTI Line 1 */
.word EXTI2_IRQHandler /* EXTI Line 2 */ // .word EXTI2_IRQHandler /* EXTI Line 2 */
.word EXTI3_IRQHandler /* EXTI Line 3 */ // .word EXTI3_IRQHandler /* EXTI Line 3 */
.word EXTI4_IRQHandler /* EXTI Line 4 */ // .word EXTI4_IRQHandler /* EXTI Line 4 */
.word EXTI5_IRQHandler /* EXTI Line 5 */ // .word EXTI5_IRQHandler /* EXTI Line 5 */
.word TIM1_BRK_IRQHandler /* TIM1 break interrupt */ // .word TIM1_BRK_IRQHandler /* TIM1 break interrupt */
.word ADC1_IRQHandler /* ADC1 interrupt, combined with EXTI line 8 */ // .word ADC1_IRQHandler /* ADC1 interrupt, combined with EXTI line 8 */
.word TIM1_UP_TRG_COM_IRQHandler /* TIM1 Update, Trigger and Commutation */ // .word TIM1_UP_TRG_COM_IRQHandler /* TIM1 Update, Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ // .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */ // .word TIM2_IRQHandler /* TIM2 */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word TIM6_IRQHandler /* TIM6 */ // .word TIM6_IRQHandler /* TIM6 */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word EXTI6_IRQHandler /* EXTI Line 6 */ // .word EXTI6_IRQHandler /* EXTI Line 6 */
.word EXTI7_IRQHandler /* EXTI Line 7 */ // .word EXTI7_IRQHandler /* EXTI Line 7 */
.word I2C1_IRQHandler /* I2C1 global interrupt, combined with EXTI Line 10 */ // .word I2C1_IRQHandler /* I2C1 global interrupt, combined with EXTI Line 10 */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word SPI1_IRQHandler /* SPI1 */ // .word SPI1_IRQHandler /* SPI1 */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word USART1_IRQHandler /* USART1 global interrupt, combined with EXTI Line 9 */ // .word USART1_IRQHandler /* USART1 global interrupt, combined with EXTI Line 9 */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word 0 /* Reserved */ // .word 0 /* Reserved */
.word 0 /* Reserved */ // .word 0 /* Reserved */
/******************************************************************************* /*******************************************************************************
* *
@ -182,6 +182,7 @@ g_pfnVectors:
.weak SysTick_Handler .weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler .thumb_set SysTick_Handler,Default_Handler
/*
.weak WWDG_IRQHandler .weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler .thumb_set WWDG_IRQHandler,Default_Handler
@ -244,3 +245,4 @@ g_pfnVectors:
.weak USART1_IRQHandler .weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler .thumb_set USART1_IRQHandler,Default_Handler
*/

15
bootloader_hk32f030m_uart_xmodem/driver/CMSIS/HK32F030M/Source/system_hk32f030m.c
View File

@ -170,7 +170,7 @@ static void SetSysClockToHSI(void)
* Datasheet and RM was updated in 2023 which derated flash programming from 4MHz * Datasheet and RM was updated in 2023 which derated flash programming from 4MHz
* 0x07 = 4MHz, 0x08 = 2MHz. change as you see fit */ * 0x07 = 4MHz, 0x08 = 2MHz. change as you see fit */
RCC->CFGR4 &= ~(RCC_RCC_CFGR4_FLITFCLK_PRE | RCC_RCC_CFGR4_FLITFCLK_SE); RCC->CFGR4 &= ~(RCC_RCC_CFGR4_FLITFCLK_PRE | RCC_RCC_CFGR4_FLITFCLK_SE);
RCC->CFGR4 |= (((uint32_t)0x07) << RCC_RCC_CFGR4_FLITFCLK_PRE_Pos); RCC->CFGR4 |= (((uint32_t)0x08) << RCC_RCC_CFGR4_FLITFCLK_PRE_Pos);
/* Wait until HSI is ready; if timeout is reached, then exit */ /* Wait until HSI is ready; if timeout is reached, then exit */
do { do {
@ -391,19 +391,16 @@ void SystemCoreClockUpdate (void)
/* Get SYSCLK source -------------------------------------------------------*/ /* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS; tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp) switch (tmp) {
{ case RCC_CFGR_SWS_EXTCLK: // EXTCLK used as system clock
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
SystemCoreClock = HCLK_FREQ;
break;
case RCC_CFGR_SWS_EXTCLK: /* EXTCLK used as system clock */
SystemCoreClock = EXTCLK_VALUE; SystemCoreClock = EXTCLK_VALUE;
break; break;
case RCC_CFGR_SWS_LSI: /* LSI used as system clock */ case RCC_CFGR_SWS_LSI: // LSI used as system clock
SystemCoreClock = LSI_VALUE; SystemCoreClock = LSI_VALUE;
break; break;
default: /* HSI used as system clock */ case RCC_CFGR_SWS_HSI: // HSI used as system clock
default:
SystemCoreClock = HCLK_FREQ; SystemCoreClock = HCLK_FREQ;
break; break;
} }