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bootloader: flash page erase is on-demand, now fits in 2K

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Flash pages are only erased as needed during the flash routine, which makes flashing faster as well as making the transfer consistent.

Later datasheets have the flash clock set to 2MHz. I've set it to 2MHz here. I may undo this change later depending on how slow loading a 14K firmware feels.

Was able to save enough space to reduce bootloader size from almost 2.5K to 2K exactly. Adjusted flash offsets to start from 0x800.

GPIO values are now mostly reset to power-on defaults.

Fixed some formatting. Removed dead code.
This commit is contained in:
true
2023-06-25 05:01:16 -07:00
parent d5cbabf830
commit 46a3ab6007
15 changed files with 336 additions and 249 deletions
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74
bootloader_hk32f030m_uart_xmodem/driver/CMSIS/HK32F030M/Source/startup_hk32f030mf4p6.s
View File

@@ -112,8 +112,8 @@ Infinite_Loop:
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word Default_Handler // NMI_Handler
.word Default_Handler // HardFault_Handler
.word 0
.word 0
.word 0
@@ -121,43 +121,43 @@ g_pfnVectors:
.word 0
.word 0
.word 0
.word SVC_Handler
.word Default_Handler // SVC_Handler
.word 0
.word 0
.word PendSV_Handler
.word Default_Handler // PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler /* Window WatchDog */
.word 0 /* Reserved */
.word EXTI11_IRQHandler /* EXTI Line 11 interrupt(AWU_WKP) */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line 0 */
.word EXTI1_IRQHandler /* EXTI Line 1 */
.word EXTI2_IRQHandler /* EXTI Line 2 */
.word EXTI3_IRQHandler /* EXTI Line 3 */
.word EXTI4_IRQHandler /* EXTI Line 4 */
.word EXTI5_IRQHandler /* EXTI Line 5 */
.word TIM1_BRK_IRQHandler /* TIM1 break interrupt */
.word ADC1_IRQHandler /* ADC1 interrupt, combined with EXTI line 8 */
.word TIM1_UP_TRG_COM_IRQHandler /* TIM1 Update, Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word 0 /* Reserved */
.word TIM6_IRQHandler /* TIM6 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word EXTI6_IRQHandler /* EXTI Line 6 */
.word EXTI7_IRQHandler /* EXTI Line 7 */
.word I2C1_IRQHandler /* I2C1 global interrupt, combined with EXTI Line 10 */
.word 0 /* Reserved */
.word SPI1_IRQHandler /* SPI1 */
.word 0 /* Reserved */
.word USART1_IRQHandler /* USART1 global interrupt, combined with EXTI Line 9 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
// .word WWDG_IRQHandler /* Window WatchDog */
// .word 0 /* Reserved */
// .word EXTI11_IRQHandler /* EXTI Line 11 interrupt(AWU_WKP) */
// .word FLASH_IRQHandler /* FLASH */
// .word RCC_IRQHandler /* RCC */
// .word EXTI0_IRQHandler /* EXTI Line 0 */
// .word EXTI1_IRQHandler /* EXTI Line 1 */
// .word EXTI2_IRQHandler /* EXTI Line 2 */
// .word EXTI3_IRQHandler /* EXTI Line 3 */
// .word EXTI4_IRQHandler /* EXTI Line 4 */
// .word EXTI5_IRQHandler /* EXTI Line 5 */
// .word TIM1_BRK_IRQHandler /* TIM1 break interrupt */
// .word ADC1_IRQHandler /* ADC1 interrupt, combined with EXTI line 8 */
// .word TIM1_UP_TRG_COM_IRQHandler /* TIM1 Update, Trigger and Commutation */
// .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
// .word TIM2_IRQHandler /* TIM2 */
// .word 0 /* Reserved */
// .word TIM6_IRQHandler /* TIM6 */
// .word 0 /* Reserved */
// .word 0 /* Reserved */
// .word 0 /* Reserved */
// .word EXTI6_IRQHandler /* EXTI Line 6 */
// .word EXTI7_IRQHandler /* EXTI Line 7 */
// .word I2C1_IRQHandler /* I2C1 global interrupt, combined with EXTI Line 10 */
// .word 0 /* Reserved */
// .word SPI1_IRQHandler /* SPI1 */
// .word 0 /* Reserved */
// .word USART1_IRQHandler /* USART1 global interrupt, combined with EXTI Line 9 */
// .word 0 /* Reserved */
// .word 0 /* Reserved */
// .word 0 /* Reserved */
// .word 0 /* Reserved */
/*******************************************************************************
*
@@ -182,6 +182,7 @@ g_pfnVectors:
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
/*
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
@@ -244,3 +245,4 @@ g_pfnVectors:
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
*/

49
bootloader_hk32f030m_uart_xmodem/driver/CMSIS/HK32F030M/Source/system_hk32f030m.c
View File

@@ -170,7 +170,7 @@ static void SetSysClockToHSI(void)
* Datasheet and RM was updated in 2023 which derated flash programming from 4MHz
* 0x07 = 4MHz, 0x08 = 2MHz. change as you see fit */
RCC->CFGR4 &= ~(RCC_RCC_CFGR4_FLITFCLK_PRE | RCC_RCC_CFGR4_FLITFCLK_SE);
RCC->CFGR4 |= (((uint32_t)0x07) << RCC_RCC_CFGR4_FLITFCLK_PRE_Pos);
RCC->CFGR4 |= (((uint32_t)0x08) << RCC_RCC_CFGR4_FLITFCLK_PRE_Pos);
/* Wait until HSI is ready; if timeout is reached, then exit */
do {
@@ -386,33 +386,30 @@ static void SetSysClockToEXTCLK(void)
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, presc = 0;
uint32_t tmp = 0, presc = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
SystemCoreClock = HCLK_FREQ;
break;
case RCC_CFGR_SWS_EXTCLK: /* EXTCLK used as system clock */
SystemCoreClock = EXTCLK_VALUE;
break;
case RCC_CFGR_SWS_LSI: /* LSI used as system clock */
SystemCoreClock = LSI_VALUE;
break;
switch (tmp) {
case RCC_CFGR_SWS_EXTCLK: // EXTCLK used as system clock
SystemCoreClock = EXTCLK_VALUE;
break;
case RCC_CFGR_SWS_LSI: // LSI used as system clock
SystemCoreClock = LSI_VALUE;
break;
default: /* HSI used as system clock */
SystemCoreClock = HCLK_FREQ;
break;
}
case RCC_CFGR_SWS_HSI: // HSI used as system clock
default:
SystemCoreClock = HCLK_FREQ;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = RCC->CFGR & RCC_CFGR_HPRE;
tmp = tmp >> 4;
presc = AHBPrescTable[tmp];
/* HCLK clock frequency */
SystemCoreClock = SystemCoreClock/presc;
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = RCC->CFGR & RCC_CFGR_HPRE;
tmp = tmp >> 4;
presc = AHBPrescTable[tmp];
/* HCLK clock frequency */
SystemCoreClock = SystemCoreClock/presc;
}