initial WIP

lots of code copied over, things filled in to hopefully get the LED matrix lighting up. untested.
2026-05-08 11:54:12 -07:00
commit d95af918fa
77 changed files with 24395 additions and 0 deletions
--- a/firmware/app/system_ch32x035.c
+++ b/firmware/app/system_ch32x035.c
@@ -0,0 +1,101 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : system_ch32x035.c
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2023/04/06
+ * Description        : CH32X035 Device Peripheral Access Layer System Source File.
+*********************************************************************************
+* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+* Attention: This software (modified or not) and binary are used for 
+* microcontroller manufactured by Nanjing Qinheng Microelectronics.
+*******************************************************************************/
+#include "ch32x035.h"
+
+/* 
+* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after 
+* reset the HSI is used as SYSCLK source).
+*/
+
+//#define SYSCLK_FREQ_8MHz_HSI   8000000
+//#define SYSCLK_FREQ_12MHz_HSI  12000000
+//#define SYSCLK_FREQ_16MHz_HSI  16000000
+//#define SYSCLK_FREQ_24MHz_HSI  24000000
+//#define SYSCLK_FREQ_48MHz_HSI  HSI_VALUE
+
+/* Clock Definitions */
+uint32_t SystemCoreClock         = HSI_VALUE;                    /* System Clock Frequency (Core Clock) */
+
+__I uint8_t AHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8};
+
+
+/*********************************************************************
+ * @fn      SystemInit
+ *
+ * @brief   Setup the microcontroller system Initialize the Embedded Flash Interface,
+ *        update the SystemCoreClock variable.
+ *
+ * @return  none
+ */
+void SystemInit(void)
+{
+    RCC->CTLR |= (uint32_t)0x00000001;
+    RCC->CFGR0 |= (uint32_t)0x00000050;
+    RCC->CFGR0 &= (uint32_t)0xF8FFFF5F;
+    SetSysClock_HSI(HCLK_24MHZ);
+}
+
+/*********************************************************************
+ * @fn      SystemCoreClockUpdate
+ *
+ * @brief   Update SystemCoreClock variable according to Clock Register Values.
+ *
+ * @return  none
+ */
+void SystemCoreClockUpdate(void)
+{
+    uint32_t tmp = 0;
+
+    SystemCoreClock = HSI_VALUE;
+    tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)];
+
+    if(((RCC->CFGR0 & RCC_HPRE) >> 4) < 8)
+    {
+        SystemCoreClock /= tmp;
+    }
+    else
+    {
+        SystemCoreClock >>= tmp;
+    }
+}
+
+
+/*********************************************************************
+ * @fn      SetSysClock_HSI
+ *
+ * @brief   Sets System clock frequency to specified and configure HCLK prescalers.
+ *
+ * @return  none
+ */
+void SetSysClock_HSI(uint32_t divider)
+{
+    uint32_t actlr;
+
+    /* Flash 2 wait state */
+    actlr = FLASH->ACTLR & ((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR = actlr | (uint32_t)FLASH_ACTLR_LATENCY_2;
+
+    /* HCLK = SYSCLK = APB1 */
+    RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
+    RCC->CFGR0 |= (uint32_t)divider;
+
+    // set wait states depending on speed
+    if (divider > RCC_HPRE_DIV1) {          // 48MHz is already set to 2 cycles
+        if (divider >= RCC_HPRE_DIV1) {     // 24MHz is 1 cycle
+            actlr |= (uint32_t)FLASH_ACTLR_LATENCY_0;
+        } else {                            // all others are 0 cycle
+            actlr |= (uint32_t)FLASH_ACTLR_LATENCY_1;
+        }
+
+        FLASH->ACTLR = actlr;
+    }
+}