fix setting clock divider to /1 when it should be /2

misinterpreted docs. too much ARM in my life.
the system sets up the clock divider with /2 and expects it to stay there.
was setting the divider to /1 thinking it only affected peripherals.
adjusted timings to compensate for the new divider.

fw/HackSpaceCon_AS7/HSC_Wand/rgbled.cpp

@@ -34,15 +34,13 @@ uint8_t rgbled[3 * RGB_COUNT];
 void conf_rgb_timer()
 {
     // this timer will run at half speed.
-    // so 8MHz / 2 (prescale) / 1 (CLK_PER) = 4MHz
-    // this will allow a full cycle time of ~61Hz. 
-    
-    _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, 0); // disable CLK_PER divider
+    // so 8MHz / 2 (timer prescale) / 2 (CLK_PER) = 2MHz
+    // this will allow a cycle time with 33333 counts to be 60Hz.
 
     disable_rgb_timer();
     
-    TCB0.CTRLA = TCB_CLKSEL_CLKDIV2_gc;     // prescale timer to run at half speed
-    TCB0.CCMP = 0xffff;                     // count to full
+    TCB0.CTRLA = TCB_CLKSEL_CLKDIV2_gc;    // prescale timer to run at half speed
+    TCB0.CCMP = 33333 - 1;                 // count to full
     TCB0.CNT = 0;
 }